1 /*
2 * bf5xx-ac97.c -- AC97 support for the ADI blackfin chip.
3 *
4 * Author: Roy Huang
5 * Created: 11th. June 2007
6 * Copyright: Analog Device Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/interrupt.h>
17 #include <linux/wait.h>
18 #include <linux/delay.h>
19
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/ac97_codec.h>
23 #include <sound/initval.h>
24 #include <sound/soc.h>
25
26 #include <asm/irq.h>
27 #include <asm/portmux.h>
28 #include <linux/mutex.h>
29 #include <linux/gpio.h>
30
31 #include "bf5xx-sport.h"
32 #include "bf5xx-ac97.h"
33
34 #if defined(CONFIG_BF54x)
35 #define PIN_REQ_SPORT_0 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, \
36 P_SPORT0_RFS, P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
37
38 #define PIN_REQ_SPORT_1 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, \
39 P_SPORT1_RFS, P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
40
41 #define PIN_REQ_SPORT_2 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, \
42 P_SPORT2_RFS, P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0}
43
44 #define PIN_REQ_SPORT_3 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, \
45 P_SPORT3_RFS, P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0}
46 #else
47 #define PIN_REQ_SPORT_0 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
48 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
49
50 #define PIN_REQ_SPORT_1 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
51 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
52 #endif
53
54 static int *cmd_count;
55 static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
56
57 static u16 sport_req[][7] = {
58 PIN_REQ_SPORT_0,
59 #ifdef PIN_REQ_SPORT_1
60 PIN_REQ_SPORT_1,
61 #endif
62 #ifdef PIN_REQ_SPORT_2
63 PIN_REQ_SPORT_2,
64 #endif
65 #ifdef PIN_REQ_SPORT_3
66 PIN_REQ_SPORT_3,
67 #endif
68 };
69
70 static struct sport_param sport_params[4] = {
71 {
72 .dma_rx_chan = CH_SPORT0_RX,
73 .dma_tx_chan = CH_SPORT0_TX,
74 .err_irq = IRQ_SPORT0_ERROR,
75 .regs = (struct sport_register *)SPORT0_TCR1,
76 },
77 #ifdef PIN_REQ_SPORT_1
78 {
79 .dma_rx_chan = CH_SPORT1_RX,
80 .dma_tx_chan = CH_SPORT1_TX,
81 .err_irq = IRQ_SPORT1_ERROR,
82 .regs = (struct sport_register *)SPORT1_TCR1,
83 },
84 #endif
85 #ifdef PIN_REQ_SPORT_2
86 {
87 .dma_rx_chan = CH_SPORT2_RX,
88 .dma_tx_chan = CH_SPORT2_TX,
89 .err_irq = IRQ_SPORT2_ERROR,
90 .regs = (struct sport_register *)SPORT2_TCR1,
91 },
92 #endif
93 #ifdef PIN_REQ_SPORT_3
94 {
95 .dma_rx_chan = CH_SPORT3_RX,
96 .dma_tx_chan = CH_SPORT3_TX,
97 .err_irq = IRQ_SPORT3_ERROR,
98 .regs = (struct sport_register *)SPORT3_TCR1,
99 }
100 #endif
101 };
102
bf5xx_pcm_to_ac97(struct ac97_frame * dst,const __u16 * src,size_t count,unsigned int chan_mask)103 void bf5xx_pcm_to_ac97(struct ac97_frame *dst, const __u16 *src,
104 size_t count, unsigned int chan_mask)
105 {
106 while (count--) {
107 dst->ac97_tag = TAG_VALID;
108 if (chan_mask & SP_FL) {
109 dst->ac97_pcm_r = *src++;
110 dst->ac97_tag |= TAG_PCM_RIGHT;
111 }
112 if (chan_mask & SP_FR) {
113 dst->ac97_pcm_l = *src++;
114 dst->ac97_tag |= TAG_PCM_LEFT;
115
116 }
117 #if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
118 if (chan_mask & SP_SR) {
119 dst->ac97_sl = *src++;
120 dst->ac97_tag |= TAG_PCM_SL;
121 }
122 if (chan_mask & SP_SL) {
123 dst->ac97_sr = *src++;
124 dst->ac97_tag |= TAG_PCM_SR;
125 }
126 if (chan_mask & SP_LFE) {
127 dst->ac97_lfe = *src++;
128 dst->ac97_tag |= TAG_PCM_LFE;
129 }
130 if (chan_mask & SP_FC) {
131 dst->ac97_center = *src++;
132 dst->ac97_tag |= TAG_PCM_CENTER;
133 }
134 #endif
135 dst++;
136 }
137 }
138 EXPORT_SYMBOL(bf5xx_pcm_to_ac97);
139
bf5xx_ac97_to_pcm(const struct ac97_frame * src,__u16 * dst,size_t count)140 void bf5xx_ac97_to_pcm(const struct ac97_frame *src, __u16 *dst,
141 size_t count)
142 {
143 while (count--) {
144 *(dst++) = src->ac97_pcm_l;
145 *(dst++) = src->ac97_pcm_r;
146 src++;
147 }
148 }
149 EXPORT_SYMBOL(bf5xx_ac97_to_pcm);
150
sport_tx_curr_frag(struct sport_device * sport)151 static unsigned int sport_tx_curr_frag(struct sport_device *sport)
152 {
153 return sport->tx_curr_frag = sport_curr_offset_tx(sport) /
154 sport->tx_fragsize;
155 }
156
enqueue_cmd(struct snd_ac97 * ac97,__u16 addr,__u16 data)157 static void enqueue_cmd(struct snd_ac97 *ac97, __u16 addr, __u16 data)
158 {
159 struct sport_device *sport = sport_handle;
160 int nextfrag = sport_tx_curr_frag(sport);
161 struct ac97_frame *nextwrite;
162
163 sport_incfrag(sport, &nextfrag, 1);
164
165 nextwrite = (struct ac97_frame *)(sport->tx_buf +
166 nextfrag * sport->tx_fragsize);
167 pr_debug("sport->tx_buf:%p, nextfrag:0x%x nextwrite:%p, cmd_count:%d\n",
168 sport->tx_buf, nextfrag, nextwrite, cmd_count[nextfrag]);
169 nextwrite[cmd_count[nextfrag]].ac97_tag |= TAG_CMD;
170 nextwrite[cmd_count[nextfrag]].ac97_addr = addr;
171 nextwrite[cmd_count[nextfrag]].ac97_data = data;
172 ++cmd_count[nextfrag];
173 pr_debug("ac97_sport: Inserting %02x/%04x into fragment %d\n",
174 addr >> 8, data, nextfrag);
175 }
176
bf5xx_ac97_read(struct snd_ac97 * ac97,unsigned short reg)177 static unsigned short bf5xx_ac97_read(struct snd_ac97 *ac97,
178 unsigned short reg)
179 {
180 struct ac97_frame out_frame[2], in_frame[2];
181
182 pr_debug("%s enter 0x%x\n", __func__, reg);
183
184 /* When dma descriptor is enabled, the register should not be read */
185 if (sport_handle->tx_run || sport_handle->rx_run) {
186 pr_err("Could you send a mail to cliff.cai@analog.com "
187 "to report this?\n");
188 return -EFAULT;
189 }
190
191 memset(&out_frame, 0, 2 * sizeof(struct ac97_frame));
192 memset(&in_frame, 0, 2 * sizeof(struct ac97_frame));
193 out_frame[0].ac97_tag = TAG_VALID | TAG_CMD;
194 out_frame[0].ac97_addr = ((reg << 8) | 0x8000);
195 sport_send_and_recv(sport_handle, (unsigned char *)&out_frame,
196 (unsigned char *)&in_frame,
197 2 * sizeof(struct ac97_frame));
198 return in_frame[1].ac97_data;
199 }
200
bf5xx_ac97_write(struct snd_ac97 * ac97,unsigned short reg,unsigned short val)201 void bf5xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
202 unsigned short val)
203 {
204 pr_debug("%s enter 0x%x:0x%04x\n", __func__, reg, val);
205
206 if (sport_handle->tx_run) {
207 enqueue_cmd(ac97, (reg << 8), val); /* write */
208 enqueue_cmd(ac97, (reg << 8) | 0x8000, 0); /* read back */
209 } else {
210 struct ac97_frame frame;
211 memset(&frame, 0, sizeof(struct ac97_frame));
212 frame.ac97_tag = TAG_VALID | TAG_CMD;
213 frame.ac97_addr = (reg << 8);
214 frame.ac97_data = val;
215 sport_send_and_recv(sport_handle, (unsigned char *)&frame, \
216 NULL, sizeof(struct ac97_frame));
217 }
218 }
219
bf5xx_ac97_warm_reset(struct snd_ac97 * ac97)220 static void bf5xx_ac97_warm_reset(struct snd_ac97 *ac97)
221 {
222 #if defined(CONFIG_BF54x) || defined(CONFIG_BF561) || \
223 (defined(BF537_FAMILY) && (CONFIG_SND_BF5XX_SPORT_NUM == 1))
224
225 #define CONCAT(a, b, c) a ## b ## c
226 #define BFIN_SPORT_RFS(x) CONCAT(P_SPORT, x, _RFS)
227
228 u16 per = BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM);
229 u16 gpio = P_IDENT(BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM));
230
231 pr_debug("%s enter\n", __func__);
232
233 peripheral_free(per);
234 gpio_request(gpio, "bf5xx-ac97");
235 gpio_direction_output(gpio, 1);
236 udelay(2);
237 gpio_set_value(gpio, 0);
238 udelay(1);
239 gpio_free(gpio);
240 peripheral_request(per, "soc-audio");
241 #else
242 pr_info("%s: Not implemented\n", __func__);
243 #endif
244 }
245
bf5xx_ac97_cold_reset(struct snd_ac97 * ac97)246 static void bf5xx_ac97_cold_reset(struct snd_ac97 *ac97)
247 {
248 #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
249 pr_debug("%s enter\n", __func__);
250
251 /* It is specified for bf548-ezkit */
252 gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 0);
253 /* Keep reset pin low for 1 ms */
254 mdelay(1);
255 gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
256 /* Wait for bit clock recover */
257 mdelay(1);
258 #else
259 pr_info("%s: Not implemented\n", __func__);
260 #endif
261 }
262
263 struct snd_ac97_bus_ops soc_ac97_ops = {
264 .read = bf5xx_ac97_read,
265 .write = bf5xx_ac97_write,
266 .warm_reset = bf5xx_ac97_warm_reset,
267 .reset = bf5xx_ac97_cold_reset,
268 };
269 EXPORT_SYMBOL_GPL(soc_ac97_ops);
270
271 #ifdef CONFIG_PM
bf5xx_ac97_suspend(struct snd_soc_dai * dai)272 static int bf5xx_ac97_suspend(struct snd_soc_dai *dai)
273 {
274 struct sport_device *sport =
275 (struct sport_device *)dai->private_data;
276
277 pr_debug("%s : sport %d\n", __func__, dai->id);
278 if (!dai->active)
279 return 0;
280 if (dai->capture.active)
281 sport_rx_stop(sport);
282 if (dai->playback.active)
283 sport_tx_stop(sport);
284 return 0;
285 }
286
bf5xx_ac97_resume(struct snd_soc_dai * dai)287 static int bf5xx_ac97_resume(struct snd_soc_dai *dai)
288 {
289 int ret;
290 struct sport_device *sport =
291 (struct sport_device *)dai->private_data;
292
293 pr_debug("%s : sport %d\n", __func__, dai->id);
294 if (!dai->active)
295 return 0;
296
297 ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
298 if (ret) {
299 pr_err("SPORT is busy!\n");
300 return -EBUSY;
301 }
302
303 ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
304 if (ret) {
305 pr_err("SPORT is busy!\n");
306 return -EBUSY;
307 }
308
309 ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
310 if (ret) {
311 pr_err("SPORT is busy!\n");
312 return -EBUSY;
313 }
314
315 if (dai->capture.active)
316 sport_rx_start(sport);
317 if (dai->playback.active)
318 sport_tx_start(sport);
319 return 0;
320 }
321
322 #else
323 #define bf5xx_ac97_suspend NULL
324 #define bf5xx_ac97_resume NULL
325 #endif
326
bf5xx_ac97_probe(struct platform_device * pdev,struct snd_soc_dai * dai)327 static int bf5xx_ac97_probe(struct platform_device *pdev,
328 struct snd_soc_dai *dai)
329 {
330 int ret = 0;
331 cmd_count = (int *)get_zeroed_page(GFP_KERNEL);
332 if (cmd_count == NULL)
333 return -ENOMEM;
334
335 if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
336 pr_err("Requesting Peripherals failed\n");
337 ret = -EFAULT;
338 goto peripheral_err;
339 }
340
341 #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
342 /* Request PB3 as reset pin */
343 if (gpio_request(CONFIG_SND_BF5XX_RESET_GPIO_NUM, "SND_AD198x RESET")) {
344 pr_err("Failed to request GPIO_%d for reset\n",
345 CONFIG_SND_BF5XX_RESET_GPIO_NUM);
346 ret = -1;
347 goto gpio_err;
348 }
349 gpio_direction_output(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
350 #endif
351 sport_handle = sport_init(&sport_params[sport_num], 2, \
352 sizeof(struct ac97_frame), NULL);
353 if (!sport_handle) {
354 ret = -ENODEV;
355 goto sport_err;
356 }
357 /*SPORT works in TDM mode to simulate AC97 transfers*/
358 ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
359 if (ret) {
360 pr_err("SPORT is busy!\n");
361 ret = -EBUSY;
362 goto sport_config_err;
363 }
364
365 ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
366 if (ret) {
367 pr_err("SPORT is busy!\n");
368 ret = -EBUSY;
369 goto sport_config_err;
370 }
371
372 ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
373 if (ret) {
374 pr_err("SPORT is busy!\n");
375 ret = -EBUSY;
376 goto sport_config_err;
377 }
378
379 return 0;
380
381 sport_config_err:
382 kfree(sport_handle);
383 sport_err:
384 #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
385 gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
386 #endif
387 gpio_err:
388 peripheral_free_list(&sport_req[sport_num][0]);
389 peripheral_err:
390 free_page((unsigned long)cmd_count);
391 cmd_count = NULL;
392
393 return ret;
394 }
395
bf5xx_ac97_remove(struct platform_device * pdev,struct snd_soc_dai * dai)396 static void bf5xx_ac97_remove(struct platform_device *pdev,
397 struct snd_soc_dai *dai)
398 {
399 free_page((unsigned long)cmd_count);
400 cmd_count = NULL;
401 peripheral_free_list(&sport_req[sport_num][0]);
402 #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
403 gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
404 #endif
405 }
406
407 struct snd_soc_dai bfin_ac97_dai = {
408 .name = "bf5xx-ac97",
409 .id = 0,
410 .ac97_control = 1,
411 .probe = bf5xx_ac97_probe,
412 .remove = bf5xx_ac97_remove,
413 .suspend = bf5xx_ac97_suspend,
414 .resume = bf5xx_ac97_resume,
415 .playback = {
416 .stream_name = "AC97 Playback",
417 .channels_min = 2,
418 #if defined(CONFIG_SND_BF5XX_MULTICHAN_SUPPORT)
419 .channels_max = 6,
420 #else
421 .channels_max = 2,
422 #endif
423 .rates = SNDRV_PCM_RATE_48000,
424 .formats = SNDRV_PCM_FMTBIT_S16_LE, },
425 .capture = {
426 .stream_name = "AC97 Capture",
427 .channels_min = 2,
428 .channels_max = 2,
429 .rates = SNDRV_PCM_RATE_48000,
430 .formats = SNDRV_PCM_FMTBIT_S16_LE, },
431 };
432 EXPORT_SYMBOL_GPL(bfin_ac97_dai);
433
bfin_ac97_init(void)434 static int __init bfin_ac97_init(void)
435 {
436 return snd_soc_register_dai(&bfin_ac97_dai);
437 }
438 module_init(bfin_ac97_init);
439
bfin_ac97_exit(void)440 static void __exit bfin_ac97_exit(void)
441 {
442 snd_soc_unregister_dai(&bfin_ac97_dai);
443 }
444 module_exit(bfin_ac97_exit);
445
446 MODULE_AUTHOR("Roy Huang");
447 MODULE_DESCRIPTION("AC97 driver for ADI Blackfin");
448 MODULE_LICENSE("GPL");
449