99 			rtl_write_dword(rtlpriv, IDR0, ((u32 *)(val))[0]);  in rtl92se_set_hw_reg()
127 			rtl_write_dword(rtlpriv, BSSIDR, ((u32 *)(val))[0]);  in rtl92se_set_hw_reg()
311 			rtl_write_dword(rtlpriv, RCR, ((u32 *) (val))[0]);  in rtl92se_set_hw_reg()
724 	rtl_write_dword(rtlpriv, RDQDA, rtlpci->rx_ring[RX_MPDU_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
725 	rtl_write_dword(rtlpriv, RCDA, rtlpci->rx_ring[RX_CMD_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
728 	rtl_write_dword(rtlpriv, TBKDA, rtlpci->tx_ring[BK_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
729 	rtl_write_dword(rtlpriv, TBEDA, rtlpci->tx_ring[BE_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
730 	rtl_write_dword(rtlpriv, TVIDA, rtlpci->tx_ring[VI_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
731 	rtl_write_dword(rtlpriv, TVODA, rtlpci->tx_ring[VO_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
732 	rtl_write_dword(rtlpriv, TBDA, rtlpci->tx_ring[BEACON_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
733 	rtl_write_dword(rtlpriv, TCDA, rtlpci->tx_ring[TXCMD_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
734 	rtl_write_dword(rtlpriv, TMDA, rtlpci->tx_ring[MGNT_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
735 	rtl_write_dword(rtlpriv, THPDA, rtlpci->tx_ring[HIGH_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
736 	rtl_write_dword(rtlpriv, HDA, rtlpci->tx_ring[HCCA_QUEUE].dma);  in _rtl92se_macconfig_before_fwdownload()
792 	rtl_write_dword(rtlpriv, TCR, rtl_read_dword(rtlpriv, TCR) |  in _rtl92se_macconfig_after_fwdownload()
796 	rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);  in _rtl92se_macconfig_after_fwdownload()
842 			rtl_write_dword(rtlpriv, ARFR0 + i * 4, 0x1f0ff0f0);  in _rtl92se_macconfig_after_fwdownload()
858 	rtl_write_dword(rtlpriv, DARFRC, 0x04010000);  in _rtl92se_macconfig_after_fwdownload()
859 	rtl_write_dword(rtlpriv, DARFRC + 4, 0x09070605);  in _rtl92se_macconfig_after_fwdownload()
860 	rtl_write_dword(rtlpriv, RARFRC, 0x04010000);  in _rtl92se_macconfig_after_fwdownload()
861 	rtl_write_dword(rtlpriv, RARFRC + 4, 0x09070605);  in _rtl92se_macconfig_after_fwdownload()
927 	rtl_write_dword(rtlpriv, INIRTSMCS_SEL, reg_rrsr);  in _rtl92se_hw_configure()
1010 	rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);  in rtl92se_hw_init()
1014 	rtl_write_dword(rtlpriv, CMDR, 0x37FC);  in rtl92se_hw_init()
1079 		rtl_write_dword(rtlpriv, TXDESC_MSK, 0xFFFFCFFF);  in rtl92se_hw_init()
1089 		rtl_write_dword(rtlpriv, WFM5, FW_RA_INIT);  in rtl92se_hw_init()
1093 		rtl_write_dword(rtlpriv, WFM5, FW_RA_RESET);  in rtl92se_hw_init()
1095 		rtl_write_dword(rtlpriv, WFM5, FW_RA_ACTIVE);  in rtl92se_hw_init()
1097 		rtl_write_dword(rtlpriv, WFM5, FW_RA_REFRESH);  in rtl92se_hw_init()
1115 		rtl_write_dword(rtlpriv, wdcapra_add[i], 0x5e4322);  in rtl92se_hw_init()
1194 	rtl_write_dword(rtlpriv, TCR, temp & (~BIT(8)));  in _rtl92se_set_media_status()
1195 	rtl_write_dword(rtlpriv, TCR, temp | BIT(8));  in _rtl92se_set_media_status()
1227 		rtl_write_dword(rtlpriv, EDCAPARA_BK, 0xa44f);  in rtl92se_set_qos()
1233 		rtl_write_dword(rtlpriv, EDCAPARA_VI, 0x5e4322);  in rtl92se_set_qos()
1236 		rtl_write_dword(rtlpriv, EDCAPARA_VO, 0x2f3222);  in rtl92se_set_qos()
1249 	rtl_write_dword(rtlpriv, INTA_MASK, rtlpci->irq_mask[0]);  in rtl92se_enable_interrupt()
1251 	rtl_write_dword(rtlpriv, INTA_MASK + 4, rtlpci->irq_mask[1] & 0x3F);  in rtl92se_enable_interrupt()
1264 	rtl_write_dword(rtlpriv, INTA_MASK, 0);  in rtl92se_disable_interrupt()
1265 	rtl_write_dword(rtlpriv, INTA_MASK + 4, 0);  in rtl92se_disable_interrupt()
1561 	rtl_write_dword(rtlpriv, ISR, *p_inta);  in rtl92se_interrupt_recognized()
1564 	rtl_write_dword(rtlpriv, ISR + 4, *p_intb);  in rtl92se_interrupt_recognized()
2106 	rtl_write_dword(rtlpriv, ARFR0 + ratr_index * 4, ratr_value);  in rtl92se_update_hal_rate_table()
2269 	rtl_write_dword(rtlpriv, 0x2c4, ratr_bitmap);  in rtl92se_update_hal_rate_mask()
2270 	rtl_write_dword(rtlpriv, WFM5, (FW_RA_UPDATE_MASK | (mask << 8)));  in rtl92se_update_hal_rate_mask()
2547 		rtl_write_dword(rtlpriv, RCR, rtlpci->receive_config);  in rtl92se_allow_all_destaddr()