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Searched refs:camdivn (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-s3c24xx/
Dclock-s3c244x.c47 unsigned long camdivn; in s3c2440_setparent_armclk() local
59 camdivn = __raw_readl(S3C2440_CAMDIVN); in s3c2440_setparent_armclk()
60 camdivn &= ~S3C2440_CAMDIVN_DVSEN; in s3c2440_setparent_armclk()
61 camdivn |= dvs; in s3c2440_setparent_armclk()
62 __raw_writel(camdivn, S3C2440_CAMDIVN); in s3c2440_setparent_armclk()
77 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); in s3c244x_clk_add() local
83 (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); in s3c244x_clk_add()
85 clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f; in s3c244x_clk_add()
Ds3c2442.c86 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); in s3c2442_camif_upll_setrate() local
90 camdivn &= ~S3C2442_CAMDIVN_CAMCLK_DIV3; in s3c2442_camif_upll_setrate()
93 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_SEL; in s3c2442_camif_upll_setrate()
95 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; in s3c2442_camif_upll_setrate()
96 camdivn |= S3C2442_CAMDIVN_CAMCLK_DIV3; in s3c2442_camif_upll_setrate()
98 camdivn &= ~S3C2440_CAMDIVN_CAMCLK_MASK; in s3c2442_camif_upll_setrate()
99 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; in s3c2442_camif_upll_setrate()
100 camdivn |= (((parent_rate / rate) / 2) - 1); in s3c2442_camif_upll_setrate()
103 __raw_writel(camdivn, S3C2440_CAMDIVN); in s3c2442_camif_upll_setrate()
Dclock-s3c2440.c74 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); in s3c2440_camif_upll_setrate() local
78 camdivn &= ~(S3C2440_CAMDIVN_CAMCLK_SEL | S3C2440_CAMDIVN_CAMCLK_MASK); in s3c2440_camif_upll_setrate()
81 camdivn |= S3C2440_CAMDIVN_CAMCLK_SEL; in s3c2440_camif_upll_setrate()
82 camdivn |= (((parent_rate / rate) / 2) - 1); in s3c2440_camif_upll_setrate()
85 __raw_writel(camdivn, S3C2440_CAMDIVN); in s3c2440_camif_upll_setrate()
93 unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); in s3c2440_camif_upll_getrate() local
95 if (!(camdivn & S3C2440_CAMDIVN_CAMCLK_SEL)) in s3c2440_camif_upll_getrate()
98 camdivn &= S3C2440_CAMDIVN_CAMCLK_MASK; in s3c2440_camif_upll_getrate()
100 return parent_rate / (camdivn + 1) / 2; in s3c2440_camif_upll_getrate()