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Searched refs:ge (Results 1 – 23 of 23) sorted by relevance

/arch/powerpc/boot/dts/
Dge_imp3a.dts19 compatible = "ge,imp3a";
41 compatible = "ge,imp3a-firmware-mirror", "cfi-flash";
57 compatible = "ge,imp3a-paged-flash", "cfi-flash";
81 compatible = "ge,imp3a-fpga-regs";
89 compatible = "ge,imp3a-fpga-pic", "gef,fpga-pic-1.00";
96 compatible = "ge,imp3a-gpio";
102 compatible = "ge,imp3a-fpga-wdt", "gef,fpga-wdt-1.00",
/arch/arm/mach-orion5x/
DMakefile20 obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
22 obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
/arch/arm/mach-dove/
Dcommon.c73 struct clk *xor0, *xor1, *ge, *gephy; in dove_clk_init() local
95 ge = dove_register_gate("ge", "gephy", CLOCK_GATING_BIT_GBE); in dove_clk_init()
104 orion_clkdev_add(NULL, "mv643xx_eth_port.0", ge); in dove_clk_init()
/arch/arm64/mm/
Dcache.S67 b.ge loop3
69 b.ge loop2
/arch/sh/lib/
Dmemset-sh4.S82 cmp/ge r0, r6
Dmemcpy-sh4.S273 cmp/ge r7, r6 ! 55 MT
/arch/arm/lib/
Dcopy_template.S161 ldr1b r1, r4, ge, abort=21f
164 str1b r0, r4, ge, abort=21f
/arch/powerpc/sysdev/
DMakefile73 obj-$(CONFIG_GE_FPGA) += ge/
/arch/arm/boot/dts/
Dvt8500.dtsi110 compatible = "wm,prizm-ge-rops";
Dwm8650.dtsi139 compatible = "wm,prizm-ge-rops";
Dwm8505.dtsi162 compatible = "wm,prizm-ge-rops";
Dwm8850.dtsi146 compatible = "wm,prizm-ge-rops";
/arch/arm64/kernel/
Dentry.S255 b.ge el1_dbg
373 b.ge el0_dbg
406 b.ge el0_dbg
Dhead.S541 b.ge 1f
/arch/arm64/kernel/vdso/
Dgettimeofday.S156 b.ge 6f
/arch/ia64/kernel/
Dminstate.h220 cmp.ge p6,p7 = 33,r17; \
Dfsys.S282 cmp.ge p6,p0 = r8,r2
Dentry.S73 cmp4.ge p6,p7=r8,r0
638 cmp.ge p6,p7=r8,r0 // syscall executed successfully?
Divt.S396 cmp.ge p10,p11=r16,r24 // access to per_cpu_data?
/arch/sh/kernel/cpu/sh2a/
Dentry.S146 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
/arch/sh/kernel/cpu/sh2/
Dentry.S181 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
/arch/mips/include/asm/octeon/
Dcvmx-pciercx-defs.h2116 uint32_t ge:1; member
2122 uint32_t ge:1;
/arch/mips/pci/
Dpcie-octeon.c472 pciercx_cfg070.s.ge = 1; /* ECRC generation enable. */ in __cvmx_pcie_rc_initialize_config_space()