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Searched refs:PHY_CTRL (Results 1 – 8 of 8) sorted by relevance

/drivers/net/ethernet/intel/e1000/
De1000_ethtool.c1197 e1000_write_phy_reg(hw, PHY_CTRL, 0x8100); in e1000_nonintegrated_phy_loopback()
1209 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); in e1000_nonintegrated_phy_loopback()
1211 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); in e1000_nonintegrated_phy_loopback()
1217 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); in e1000_nonintegrated_phy_loopback()
1245 e1000_write_phy_reg(hw, PHY_CTRL, 0x9140); in e1000_integrated_phy_loopback()
1247 e1000_write_phy_reg(hw, PHY_CTRL, 0x8140); in e1000_integrated_phy_loopback()
1253 e1000_write_phy_reg(hw, PHY_CTRL, 0x4140); in e1000_integrated_phy_loopback()
1324 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); in e1000_set_phy_loopback()
1326 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg); in e1000_set_phy_loopback()
1377 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); in e1000_loopback_cleanup()
[all …]
De1000_main.c447 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); in e1000_power_up_phy()
449 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); in e1000_power_up_phy()
484 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg); in e1000_power_down_phy()
486 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg); in e1000_power_down_phy()
4602 !e1000_read_phy_reg(hw, PHY_CTRL, in e1000_smartspeed()
4606 e1000_write_phy_reg(hw, PHY_CTRL, in e1000_smartspeed()
4617 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) { in e1000_smartspeed()
4620 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl); in e1000_smartspeed()
4691 case PHY_CTRL: in e1000_mii_ioctl()
4726 case PHY_CTRL: in e1000_mii_ioctl()
De1000_hw.c1393 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_copper_link_autoneg()
1398 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data); in e1000_copper_link_autoneg()
1728 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &mii_ctrl_reg); in e1000_phy_force_speed_duplex()
1815 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, mii_ctrl_reg); in e1000_phy_force_speed_duplex()
1990 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_config_mac_to_phy()
3201 ret_val = e1000_read_phy_reg(hw, PHY_CTRL, &phy_data); in e1000_phy_reset()
3206 ret_val = e1000_write_phy_reg(hw, PHY_CTRL, phy_data); in e1000_phy_reset()
De1000_hw.h2508 #define PHY_CTRL 0x00 /* Control Register */ macro
/drivers/net/ethernet/intel/e1000e/
Dich8lan.c1757 mac_reg = er32(PHY_CTRL); in e1000_oem_bits_config_ich8lan()
2386 phy_ctrl = er32(PHY_CTRL); in e1000_set_d0_lplu_state_ich8lan()
2390 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
2411 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d0_lplu_state_ich8lan()
2469 phy_ctrl = er32(PHY_CTRL); in e1000_set_d3_lplu_state_ich8lan()
2473 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state_ich8lan()
2510 ew32(PHY_CTRL, phy_ctrl); in e1000_set_d3_lplu_state_ich8lan()
4027 phy_ctrl = er32(PHY_CTRL); in e1000_kmrn_lock_loss_workaround_ich8lan()
4030 ew32(PHY_CTRL, phy_ctrl); in e1000_kmrn_lock_loss_workaround_ich8lan()
4084 reg = er32(PHY_CTRL); in e1000e_igp3_phy_powerdown_workaround_ich8lan()
[all …]
Dphy.c2665 (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) in e1000_access_phy_wakeup_reg_bm()
/drivers/net/ethernet/icplus/
Dipg.c177 ipg_w8(IPG_PC_RSVD_MASK & data, PHY_CTRL); in ipg_write_phy_ctl()
197 phyctrlpolarity) & IPG_PC_RSVD_MASK, PHY_CTRL); in send_end()
206 bit_data = ((ipg_r8(PHY_CTRL) & IPG_PC_MGMTDATA) >> 1) & 1; in read_phy_bit()
251 polarity = ipg_r8(PHY_CTRL); in mdio_read()
342 polarity = ipg_r8(PHY_CTRL); in mdio_write()
375 ipg_r8(PHY_CTRL); in mdio_write()
487 phyctrl = ipg_r8(PHY_CTRL); in ipg_config_autoneg()
Dipg.h81 PHY_CTRL = 0x76, enumerator