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Searched refs:__iomem (Results 1 – 25 of 1888) sorted by relevance

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/drivers/usb/musb/
Dmusb_regs.h321 static inline void musb_write_txfifosz(void __iomem *mbase, u8 c_size) in musb_write_txfifosz()
326 static inline void musb_write_txfifoadd(void __iomem *mbase, u16 c_off) in musb_write_txfifoadd()
331 static inline void musb_write_rxfifosz(void __iomem *mbase, u8 c_size) in musb_write_rxfifosz()
336 static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off) in musb_write_rxfifoadd()
341 static inline void musb_write_ulpi_buscontrol(void __iomem *mbase, u8 val) in musb_write_ulpi_buscontrol()
346 static inline u8 musb_read_txfifosz(void __iomem *mbase) in musb_read_txfifosz()
351 static inline u16 musb_read_txfifoadd(void __iomem *mbase) in musb_read_txfifoadd()
356 static inline u8 musb_read_rxfifosz(void __iomem *mbase) in musb_read_rxfifosz()
361 static inline u16 musb_read_rxfifoadd(void __iomem *mbase) in musb_read_rxfifoadd()
366 static inline u8 musb_read_ulpi_buscontrol(void __iomem *mbase) in musb_read_ulpi_buscontrol()
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Dmusb_io.h44 static inline u16 musb_readw(const void __iomem *addr, unsigned offset) in musb_readw()
47 static inline u32 musb_readl(const void __iomem *addr, unsigned offset) in musb_readl()
51 static inline void musb_writew(void __iomem *addr, unsigned offset, u16 data) in musb_writew()
54 static inline void musb_writel(void __iomem *addr, unsigned offset, u32 data) in musb_writel()
63 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) in musb_readb()
77 static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data) in musb_writeb()
92 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) in musb_readb()
95 static inline void musb_writeb(void __iomem *addr, unsigned offset, u8 data) in musb_writeb()
102 static inline u8 musb_readb(const void __iomem *addr, unsigned offset) in musb_readb()
105 static inline u16 musb_readw(const void __iomem *addr, unsigned offset) in musb_readw()
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/drivers/net/ethernet/stmicro/stmmac/
Dcommon.h330 struct dma_desc *p, void __iomem *ioaddr);
355 int (*init) (void __iomem *ioaddr, int pbl, int fb, int mb,
358 void (*dump_regs) (void __iomem *ioaddr);
361 void (*dma_mode) (void __iomem *ioaddr, int txmode, int rxmode);
364 void __iomem *ioaddr);
365 void (*enable_dma_transmission) (void __iomem *ioaddr);
366 void (*enable_dma_irq) (void __iomem *ioaddr);
367 void (*disable_dma_irq) (void __iomem *ioaddr);
368 void (*start_tx) (void __iomem *ioaddr);
369 void (*stop_tx) (void __iomem *ioaddr);
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/drivers/media/platform/s5p-jpeg/
Djpeg-hw.h32 static inline void jpeg_reset(void __iomem *regs) in jpeg_reset()
45 static inline void jpeg_poweron(void __iomem *regs) in jpeg_poweron()
50 static inline void jpeg_input_raw_mode(void __iomem *regs, unsigned long mode) in jpeg_input_raw_mode()
66 static inline void jpeg_input_raw_y16(void __iomem *regs, bool y16) in jpeg_input_raw_y16()
78 static inline void jpeg_proc_mode(void __iomem *regs, unsigned long mode) in jpeg_proc_mode()
93 static inline void jpeg_subsampling_mode(void __iomem *regs, unsigned int mode) in jpeg_subsampling_mode()
108 static inline unsigned int jpeg_get_subsampling_mode(void __iomem *regs) in jpeg_get_subsampling_mode()
113 static inline void jpeg_dri(void __iomem *regs, unsigned int dri) in jpeg_dri()
128 static inline void jpeg_qtbl(void __iomem *regs, unsigned int t, unsigned int n) in jpeg_qtbl()
138 static inline void jpeg_htbl_ac(void __iomem *regs, unsigned int t) in jpeg_htbl_ac()
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/drivers/video/nvidia/
Dnv_type.h107 u8 __iomem *FbStart;
143 u32 __iomem *dmaBase;
159 volatile u32 __iomem *REGS;
160 volatile u32 __iomem *PCRTC0;
161 volatile u32 __iomem *PCRTC;
162 volatile u32 __iomem *PRAMDAC0;
163 volatile u32 __iomem *PFB;
164 volatile u32 __iomem *PFIFO;
165 volatile u32 __iomem *PGRAPH;
166 volatile u32 __iomem *PEXTDEV;
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/drivers/video/riva/
Driva_hw.h78 #define NV_WR08(p,i,d) (__raw_writeb((d), (void __iomem *)(p) + (i)))
79 #define NV_RD08(p,i) (__raw_readb((void __iomem *)(p) + (i)))
80 #define NV_WR16(p,i,d) (__raw_writew((d), (void __iomem *)(p) + (i)))
81 #define NV_RD16(p,i) (__raw_readw((void __iomem *)(p) + (i)))
82 #define NV_WR32(p,i,d) (__raw_writel((d), (void __iomem *)(p) + (i)))
83 #define NV_RD32(p,i) (__raw_readl((void __iomem *)(p) + (i)))
85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i)))
86 #define VGA_RD08(p,i) (readb((void __iomem *)(p) + (i)))
444 volatile U032 __iomem *PCRTC0;
445 volatile U032 __iomem *PCRTC;
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/drivers/staging/media/davinci_vpfe/
Ddm365_ipipe_hw.h494 static inline u32 regr_ip(void *__iomem addr, u32 offset) in regr_ip()
499 static inline void regw_ip(void *__iomem addr, u32 val, u32 offset) in regw_ip()
504 static inline u32 w_ip_table(void *__iomem addr, u32 val, u32 offset) in w_ip_table()
511 static inline u32 regr_rsz(void *__iomem addr, u32 offset) in regr_rsz()
516 static inline u32 regw_rsz(void *__iomem addr, u32 val, u32 offset) in regw_rsz()
524 int resizer_set_outaddr(void *__iomem rsz_base, struct resizer_params *params,
526 int rsz_enable(void *__iomem rsz_base, int rsz_id, int enable);
527 void rsz_src_enable(void *__iomem rsz_base, int enable);
531 void ipipe_set_d2f_regs(void *__iomem base_addr, unsigned int id,
533 void ipipe_set_rgb2rgb_regs(void *__iomem base_addr, unsigned int id,
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/drivers/misc/ibmasm/
Dlowlevel.h55 static inline int sp_interrupt_pending(void __iomem *base_address) in sp_interrupt_pending()
60 static inline int uart_interrupt_pending(void __iomem *base_address) in uart_interrupt_pending()
65 static inline void ibmasm_enable_interrupts(void __iomem *base_address, int mask) in ibmasm_enable_interrupts()
67 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_enable_interrupts()
71 static inline void ibmasm_disable_interrupts(void __iomem *base_address, int mask) in ibmasm_disable_interrupts()
73 void __iomem *ctrl_reg = base_address + INTR_CONTROL_REGISTER; in ibmasm_disable_interrupts()
77 static inline void enable_sp_interrupts(void __iomem *base_address) in enable_sp_interrupts()
82 static inline void disable_sp_interrupts(void __iomem *base_address) in disable_sp_interrupts()
87 static inline void enable_uart_interrupts(void __iomem *base_address) in enable_uart_interrupts()
92 static inline void disable_uart_interrupts(void __iomem *base_address) in disable_uart_interrupts()
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/drivers/video/kyro/
DSTG4000Interface.h20 extern int InitialiseRamdac(volatile STG4000REG __iomem *pSTGReg, u32 displayDepth,
25 extern void DisableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
26 extern void EnableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
31 extern void DisableVGA(volatile STG4000REG __iomem *pSTGReg);
32 extern void StopVTG(volatile STG4000REG __iomem *pSTGReg);
33 extern void StartVTG(volatile STG4000REG __iomem *pSTGReg);
34 extern void SetupVTG(volatile STG4000REG __iomem *pSTGReg,
38 extern int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev);
43 extern void ResetOverlayRegisters(volatile STG4000REG __iomem *pSTGReg);
45 extern int CreateOverlaySurface(volatile STG4000REG __iomem *pSTGReg,
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/drivers/video/mb862xx/
Dmb862xxfb.h57 void __iomem *fb_base; /* remapped framebuffer */
58 void __iomem *mmio_base; /* remapped registers */
64 void __iomem *host; /* relocatable reg. bases */
65 void __iomem *i2c;
66 void __iomem *disp;
67 void __iomem *disp1;
68 void __iomem *cap;
69 void __iomem *cap1;
70 void __iomem *draw;
71 void __iomem *geo;
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/drivers/sh/intc/
Daccess.c78 void __iomem *ptr = (void __iomem *)addr; in test_8()
85 void __iomem *ptr = (void __iomem *)addr; in test_16()
92 void __iomem *ptr = (void __iomem *)addr; in test_32()
99 void __iomem *ptr = (void __iomem *)addr; in write_8()
108 void __iomem *ptr = (void __iomem *)addr; in write_16()
117 void __iomem *ptr = (void __iomem *)addr; in write_32()
126 void __iomem *ptr = (void __iomem *)addr; in modify_8()
140 void __iomem *ptr = (void __iomem *)addr; in modify_16()
154 void __iomem *ptr = (void __iomem *)addr; in modify_32()
/drivers/staging/tidspbridge/hw/
Dhw_mmu.h45 extern hw_status hw_mmu_enable(void __iomem *base_address);
47 extern hw_status hw_mmu_disable(void __iomem *base_address);
49 extern hw_status hw_mmu_num_locked_set(void __iomem *base_address,
52 extern hw_status hw_mmu_victim_num_set(void __iomem *base_address,
56 extern hw_status hw_mmu_event_ack(void __iomem *base_address,
59 extern hw_status hw_mmu_event_disable(void __iomem *base_address,
62 extern hw_status hw_mmu_event_enable(void __iomem *base_address,
65 extern hw_status hw_mmu_event_status(void __iomem *base_address,
68 extern hw_status hw_mmu_fault_addr_read(void __iomem *base_address,
72 extern hw_status hw_mmu_ttb_set(void __iomem *base_address,
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Dhw_mmu.c90 static hw_status mmu_set_cam_entry(void __iomem *base_address,
135 static hw_status mmu_set_ram_entry(void __iomem *base_address,
143 hw_status hw_mmu_enable(void __iomem *base_address) in hw_mmu_enable()
152 hw_status hw_mmu_disable(void __iomem *base_address) in hw_mmu_disable()
161 hw_status hw_mmu_num_locked_set(void __iomem *base_address, in hw_mmu_num_locked_set()
171 hw_status hw_mmu_victim_num_set(void __iomem *base_address, in hw_mmu_victim_num_set()
181 hw_status hw_mmu_event_ack(void __iomem *base_address, u32 irq_mask) in hw_mmu_event_ack()
190 hw_status hw_mmu_event_disable(void __iomem *base_address, u32 irq_mask) in hw_mmu_event_disable()
202 hw_status hw_mmu_event_enable(void __iomem *base_address, u32 irq_mask) in hw_mmu_event_enable()
214 hw_status hw_mmu_event_status(void __iomem *base_address, u32 *irq_mask) in hw_mmu_event_status()
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/drivers/net/ethernet/brocade/bna/
Dbfa_ioc.h39 void __iomem *pci_bar_kva;
77 void __iomem *hfn_mbox_cmd;
78 void __iomem *hfn_mbox;
79 void __iomem *lpu_mbox_cmd;
80 void __iomem *lpu_mbox;
81 void __iomem *lpu_read_stat;
82 void __iomem *pss_ctl_reg;
83 void __iomem *pss_err_status_reg;
84 void __iomem *app_pll_fast_ctl_reg;
85 void __iomem *app_pll_slow_ctl_reg;
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/drivers/ntb/
Dntb_hw.h84 void __iomem *vbase;
98 void __iomem *reg_base;
106 void __iomem *pdb;
107 void __iomem *pdb_mask;
108 void __iomem *sdb;
109 void __iomem *sbar2_xlat;
110 void __iomem *sbar4_xlat;
111 void __iomem *spad_write;
112 void __iomem *spad_read;
113 void __iomem *lnk_cntl;
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/drivers/gpio/
Dgpio-generic.c65 static void bgpio_write8(void __iomem *reg, unsigned long data) in bgpio_write8()
70 static unsigned long bgpio_read8(void __iomem *reg) in bgpio_read8()
75 static void bgpio_write16(void __iomem *reg, unsigned long data) in bgpio_write16()
80 static unsigned long bgpio_read16(void __iomem *reg) in bgpio_read16()
85 static void bgpio_write32(void __iomem *reg, unsigned long data) in bgpio_write32()
90 static unsigned long bgpio_read32(void __iomem *reg) in bgpio_read32()
96 static void bgpio_write64(void __iomem *reg, unsigned long data) in bgpio_write64()
101 static unsigned long bgpio_read64(void __iomem *reg) in bgpio_read64()
107 static void bgpio_write16be(void __iomem *reg, unsigned long data) in bgpio_write16be()
112 static unsigned long bgpio_read16be(void __iomem *reg) in bgpio_read16be()
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/drivers/parport/
Dparport_sunbpp.c52 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_disable_irq()
62 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_enable_irq()
72 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_write_data()
80 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_read_data()
87 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in status_sunbpp_to_pc()
110 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in control_sunbpp_to_pc()
138 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_frob_control()
197 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_data_forward()
207 struct bpp_regs __iomem *regs = (struct bpp_regs __iomem *)p->base; in parport_sunbpp_data_reverse()
271 struct bpp_regs __iomem *regs; in bpp_probe()
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/drivers/clk/tegra/
Dclk.h67 void __iomem *reg;
84 const char *parent_name, void __iomem *reg,
212 void __iomem *clk_base;
213 void __iomem *pmc;
244 void __iomem *clk_base, void __iomem *pmc,
250 void __iomem *clk_base, void __iomem *pmc,
256 void __iomem *clk_base, void __iomem *pmc,
264 void __iomem *clk_base, void __iomem *pmc,
272 void __iomem *clk_base, void __iomem *pmc,
280 void __iomem *clk_base, void __iomem *pmc,
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/drivers/block/
DDAC960.h2272 void __iomem *BaseAddress;
2273 void __iomem *MemoryMappedAddress;
2517 void dma_addr_writeql(dma_addr_t addr, void __iomem *write_address) in dma_addr_writeql()
2636 void DAC960_GEM_HardwareMailboxNewCommand(void __iomem *ControllerBaseAddress) in DAC960_GEM_HardwareMailboxNewCommand()
2646 void DAC960_GEM_AcknowledgeHardwareMailboxStatus(void __iomem *ControllerBaseAddress) in DAC960_GEM_AcknowledgeHardwareMailboxStatus()
2656 void DAC960_GEM_GenerateInterrupt(void __iomem *ControllerBaseAddress) in DAC960_GEM_GenerateInterrupt()
2666 void DAC960_GEM_ControllerReset(void __iomem *ControllerBaseAddress) in DAC960_GEM_ControllerReset()
2676 void DAC960_GEM_MemoryMailboxNewCommand(void __iomem *ControllerBaseAddress) in DAC960_GEM_MemoryMailboxNewCommand()
2686 bool DAC960_GEM_HardwareMailboxFullP(void __iomem *ControllerBaseAddress) in DAC960_GEM_HardwareMailboxFullP()
2696 bool DAC960_GEM_InitializationInProgressP(void __iomem *ControllerBaseAddress) in DAC960_GEM_InitializationInProgressP()
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/drivers/ide/
Dscc_pata.c220 reg = in_be32((void __iomem *)cckctrl_port); in scc_set_pio_mode()
227 out_be32((void __iomem *)piosht_port, reg); in scc_set_pio_mode()
229 out_be32((void __iomem *)pioct_port, reg); in scc_set_pio_mode()
258 reg = in_be32((void __iomem *)cckctrl_port); in scc_set_dma_mode()
269 out_be32((void __iomem *)sdmact_port, JCHDCTxtbl[offset][idx]); in scc_set_dma_mode()
270 out_be32((void __iomem *)scrcst_port, JCSTWTxtbl[offset][idx]); in scc_set_dma_mode()
272 …out_be32((void __iomem *)tdvhsel_port, (in_be32((void __iomem *)tdvhsel_port) & ~TDVHSEL_SLAVE) | … in scc_set_dma_mode()
274 out_be32((void __iomem *)mdmact_port, JCHDCTxtbl[offset][idx]); in scc_set_dma_mode()
275 out_be32((void __iomem *)mcrcst_port, JCSTWTxtbl[offset][idx]); in scc_set_dma_mode()
276 …out_be32((void __iomem *)tdvhsel_port, (in_be32((void __iomem *)tdvhsel_port) & ~TDVHSEL_MASTER) |… in scc_set_dma_mode()
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Dsgiioc4.c112 if (readl((void __iomem *)intr_addr) & 0x03) in sgiioc4_checkirq()
128 intr_reg = readl((void __iomem *)other_ir); in sgiioc4_clearirq()
153 readl((void __iomem *)io_ports->irq_addr); in sgiioc4_clearirq()
155 readl((void __iomem *)(io_ports->irq_addr + 4)); in sgiioc4_clearirq()
169 writel(0x03, (void __iomem *)other_ir); in sgiioc4_clearirq()
171 intr_reg = readl((void __iomem *)other_ir); in sgiioc4_clearirq()
181 unsigned int reg = readl((void __iomem *)ioc4_dma_addr); in sgiioc4_dma_start()
184 writel(temp_reg, (void __iomem *)ioc4_dma_addr); in sgiioc4_dma_start()
194 ioc4_dma = readl((void __iomem *)ioc4_dma_addr); in sgiioc4_ide_dma_stop()
197 ioc4_dma = readl((void __iomem *)ioc4_dma_addr); in sgiioc4_ide_dma_stop()
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/drivers/atm/
Deni.h36 void __iomem *start; /* counting in bytes */
41 void __iomem *send; /* base, 0 if unused */
54 void __iomem *recv; /* receive buffer */
75 void __iomem *ioaddr;
76 void __iomem *phy; /* PHY interface chip registers */
77 void __iomem *reg; /* register base */
78 void __iomem *ram; /* RAM base */
79 void __iomem *vci; /* VCI table */
80 void __iomem *rx_dma; /* RX DMA queue */
81 void __iomem *tx_dma; /* TX DMA queue */
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/drivers/media/pci/cx18/
Dcx18-io.h38 static inline u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr) in cx18_raw_readl()
44 void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_raw_writel_noretry()
49 static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_raw_writel()
60 static inline u32 cx18_readl(struct cx18 *cx, const void __iomem *addr) in cx18_readl()
66 void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_writel_noretry()
71 static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr) in cx18_writel()
82 void cx18_writel_expect(struct cx18 *cx, u32 val, void __iomem *addr, in cx18_writel_expect()
98 static inline u16 cx18_readw(struct cx18 *cx, const void __iomem *addr) in cx18_readw()
104 void cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr) in cx18_writew_noretry()
109 static inline void cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr) in cx18_writew()
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/drivers/char/hw_random/
Dpasemi-rng.c47 void __iomem *rng_regs = (void __iomem *)rng->priv; in pasemi_rng_data_present()
62 void __iomem *rng_regs = (void __iomem *)rng->priv; in pasemi_rng_data_read()
69 void __iomem *rng_regs = (void __iomem *)rng->priv; in pasemi_rng_init()
81 void __iomem *rng_regs = (void __iomem *)rng->priv; in pasemi_rng_cleanup()
99 void __iomem *rng_regs; in rng_probe()
127 void __iomem *rng_regs = (void __iomem *)pasemi_rng.priv; in rng_remove()
/drivers/dma/
Dfsldma.h118 void __iomem *regs; /* DGSR register base */
139 struct fsldma_chan_regs __iomem *regs;
164 static u64 in_be64(const u64 __iomem *addr) in in_be64()
166 return ((u64)in_be32((u32 __iomem *)addr) << 32) | in in_be64()
167 (in_be32((u32 __iomem *)addr + 1)); in in_be64()
170 static void out_be64(u64 __iomem *addr, u64 val) in out_be64()
172 out_be32((u32 __iomem *)addr, val >> 32); in out_be64()
173 out_be32((u32 __iomem *)addr + 1, (u32)val); in out_be64()
177 static u64 in_le64(const u64 __iomem *addr) in in_le64()
179 return ((u64)in_le32((u32 __iomem *)addr + 1) << 32) | in in_le64()
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