Searched refs:dss (Results 1 – 6 of 6) sorted by relevance
95 } dss; variable107 __raw_writel(val, dss.base + idx.idx); in dss_write_reg()112 return __raw_readl(dss.base + idx.idx); in dss_read_reg()116 dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)118 dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])132 dss.ctx_valid = true; in dss_save_context()141 if (!dss.ctx_valid) in dss_restore_context()160 struct omap_dss_board_info *board_data = dss.pdev->dev.platform_data; in dss_get_ctx_loss_count()166 cnt = board_data->get_context_loss_count(&dss.pdev->dev); in dss_get_ctx_loss_count()279 fclk_rate = clk_get_rate(dss.dss_clk); in dss_dump_clocks()[all …]
3 omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o display.o \
22 querying about clock configuration and register configuration of dss,
3 obj-$(CONFIG_OMAP2_DSS) += dss/
6 source "drivers/video/omap2/dss/Kconfig"
154 u8 dss; member340 chip->dss = bits_per_word_to_dss(spi->bits_per_word); in ep93xx_spi_setup()434 cr0 |= chip->dss; in ep93xx_spi_chip_setup()437 chip->spi->mode, chip->div_cpsr, chip->div_scr, chip->dss); in ep93xx_spi_chip_setup()746 tmp_chip.dss = bits_per_word_to_dss(t->bits_per_word); in ep93xx_spi_process_transfer()