/drivers/edac/ |
D | i7300_edac.c | 599 edac_dbg(2, "\tMTR%d CH%d: DIMMs are %sPresent (mtr)\n", in decode_mtr() 622 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr() 624 edac_dbg(2, "\t\tELECTRICAL THROTTLING is %s\n", in decode_mtr() 627 edac_dbg(2, "\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr)); in decode_mtr() 628 edac_dbg(2, "\t\tNUMRANK: %s\n", in decode_mtr() 630 edac_dbg(2, "\t\tNUMROW: %s\n", in decode_mtr() 635 edac_dbg(2, "\t\tNUMCOL: %s\n", in decode_mtr() 640 edac_dbg(2, "\t\tSIZE: %d MB\n", dinfo->megabytes); in decode_mtr() 656 edac_dbg(2, "\t\tECC code is 8-byte-over-32-byte SECDED+ code\n"); in decode_mtr() 658 edac_dbg(2, "\t\tECC code is on Lockstep mode\n"); in decode_mtr() [all …]
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D | i5400_edac.c | 551 …edac_dbg(0, "\t\tDIMM= %d Channels= %d,%d (Branch= %d DRAM Bank= %d Buffer ID = %d rdwr= %s ras=… in i5400_proccess_non_recoverable_info() 603 edac_dbg(0, "\tCorrected bits= 0x%lx\n", allErrors); in i5400_process_nonfatal_error_info() 624 edac_dbg(0, "\t\tDIMM= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5400_process_nonfatal_error_info() 689 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5400_check_error() 775 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5400_get_devices() 778 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5400_get_devices() 782 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5400_get_devices() 872 edac_dbg(0, "ERROR: trying to access an invalid dimm: %d\n", in determine_mtr() 893 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr() 898 edac_dbg(2, "\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr)); in decode_mtr() [all …]
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D | edac_mc.c | 76 edac_dbg(4, " channel->chan_idx = %d\n", chan->chan_idx); in edac_mc_dump_channel() 77 edac_dbg(4, " channel = %p\n", chan); in edac_mc_dump_channel() 78 edac_dbg(4, " channel->csrow = %p\n", chan->csrow); in edac_mc_dump_channel() 79 edac_dbg(4, " channel->dimm = %p\n", chan->dimm); in edac_mc_dump_channel() 88 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", in edac_mc_dump_dimm() 91 edac_dbg(4, " dimm = %p\n", dimm); in edac_mc_dump_dimm() 92 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); in edac_mc_dump_dimm() 93 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm() 94 edac_dbg(4, " dimm->grain = %d\n", dimm->grain); in edac_mc_dump_dimm() 95 edac_dbg(4, " dimm->nr_pages = 0x%x\n", dimm->nr_pages); in edac_mc_dump_dimm() [all …]
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D | edac_pci_sysfs.c | 81 edac_dbg(0, "\n"); in edac_pci_instance_release() 164 edac_dbg(0, "\n"); in edac_pci_create_instance_kobj() 180 edac_dbg(2, "failed to register instance pci%d\n", idx); in edac_pci_create_instance_kobj() 186 edac_dbg(1, "Register instance 'pci%d' kobject\n", idx); in edac_pci_create_instance_kobj() 203 edac_dbg(0, "\n"); in edac_pci_unregister_sysfs_instance_kobj() 319 edac_dbg(0, "here to module_put(THIS_MODULE)\n"); in edac_pci_release_main_kobj() 347 edac_dbg(0, "\n"); in edac_pci_main_kobj_setup() 358 edac_dbg(1, "no edac_subsys\n"); in edac_pci_main_kobj_setup() 368 edac_dbg(1, "try_module_get() failed\n"); in edac_pci_main_kobj_setup() 375 edac_dbg(1, "Failed to allocate\n"); in edac_pci_main_kobj_setup() [all …]
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D | i5000_edac.c | 487 edac_dbg(0, "\t\tCSROW= %d Channel= %d (DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_fatal_error_info() 566 edac_dbg(0, "\tUncorrected bits= 0x%x\n", ue_errors); in i5000_process_nonfatal_error_info() 582 …edac_dbg(0, "\t\tCSROW= %d Channels= %d,%d (Branch= %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n… in i5000_process_nonfatal_error_info() 636 edac_dbg(0, "\tCorrected bits= 0x%x\n", ce_errors); in i5000_process_nonfatal_error_info() 654 edac_dbg(0, "\t\tCSROW= %d Channel= %d (Branch %d DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n", in i5000_process_nonfatal_error_info() 768 edac_dbg(4, "MC%d\n", mci->mc_idx); in i5000_check_error() 839 edac_dbg(1, "System Address, processor bus- PCI Bus ID: %s %x:%x\n", in i5000_get_devices() 842 edac_dbg(1, "Branchmap, control and errors - PCI Bus ID: %s %x:%x\n", in i5000_get_devices() 846 edac_dbg(1, "FSB Error Regs - PCI Bus ID: %s %x:%x\n", in i5000_get_devices() 971 edac_dbg(2, "\tMTR%d=0x%x: DIMMs are %sPresent\n", in decode_mtr() [all …]
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D | i3200_edac.c | 116 edac_dbg(0, "In single channel mode\n"); in how_many_channels() 119 edac_dbg(0, "In dual channel mode\n"); in how_many_channels() 124 edac_dbg(0, "2 DIMMS per channel disabled\n"); in how_many_channels() 126 edac_dbg(0, "2 DIMMS per channel enabled\n"); in how_many_channels() 258 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3200_check() 304 edac_dbg(0, "drb[0][%d] = %d, drb[1][%d] = %d\n", i, drbs[0][i], i, drbs[1][i]); in i3200_get_drbs() 350 edac_dbg(0, "MC:\n"); in i3200_probe1() 370 edac_dbg(3, "MC: init mci\n"); in i3200_probe1() 406 edac_dbg(0, "csrow %d, channel %d%s, size = %ld Mb\n", i, j, in i3200_probe1() 421 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3200_probe1() [all …]
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D | edac_device_sysfs.c | 205 edac_dbg(4, "control index=%d\n", edac_dev->dev_idx); in edac_device_ctrl_master_release() 236 edac_dbg(1, "\n"); in edac_device_register_sysfs_main_kobj() 241 edac_dbg(1, "no edac_subsys error\n"); in edac_device_register_sysfs_main_kobj() 267 edac_dbg(1, "Failed to register '.../edac/%s'\n", in edac_device_register_sysfs_main_kobj() 277 edac_dbg(4, "Registered '.../edac/%s' kobject\n", edac_dev->name); in edac_device_register_sysfs_main_kobj() 298 edac_dbg(0, "\n"); in edac_device_unregister_sysfs_main_kobj() 299 edac_dbg(4, "name of kobject is: %s\n", kobject_name(&dev->kobj)); in edac_device_unregister_sysfs_main_kobj() 337 edac_dbg(1, "\n"); in edac_device_ctrl_instance_release() 443 edac_dbg(1, "\n"); in edac_device_ctrl_block_release() 525 edac_dbg(4, "Instance '%s' inst_p=%p block '%s' block_p=%p\n", in edac_device_create_block() [all …]
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D | r82600_edac.c | 208 edac_dbg(1, "MC%d\n", mci->mc_idx); in r82600_check() 239 edac_dbg(1, "Row=%d DRBA = %#0x\n", index, drbar); in r82600_init_csrows() 244 edac_dbg(1, "Row=%d, Boundary Address=%#0x, Last = %#0x\n", in r82600_init_csrows() 280 edac_dbg(0, "\n"); in r82600_probe1() 285 edac_dbg(2, "sdram refresh rate = %#0x\n", sdram_refresh_rate); in r82600_probe1() 286 edac_dbg(2, "DRAMC register = %#0x\n", dramcr); in r82600_probe1() 297 edac_dbg(0, "mci = %p\n", mci); in r82600_probe1() 313 edac_dbg(3, "mci = %p - Scrubbing disabled! EAP: %#0x\n", in r82600_probe1() 331 edac_dbg(3, "failed edac_mc_add_mc()\n"); in r82600_probe1() 338 edac_dbg(3, "Disabling Hardware Scrub (scrub on error)\n"); in r82600_probe1() [all …]
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D | edac_pci.c | 48 edac_dbg(1, "\n"); in edac_pci_alloc_ctl_info() 83 edac_dbg(1, "\n"); in edac_pci_free_ctl_info() 100 edac_dbg(1, "\n"); in find_edac_pci_by_dev() 125 edac_dbg(1, "\n"); in add_edac_pci_to_global_list() 229 edac_dbg(3, "checking\n"); in edac_pci_workq_function() 264 edac_dbg(0, "\n"); in edac_pci_workq_setup() 279 edac_dbg(0, "\n"); in edac_pci_workq_teardown() 296 edac_dbg(0, "\n"); in edac_pci_reset_delay_period() 336 edac_dbg(0, "\n"); in edac_pci_add_device() 396 edac_dbg(0, "\n"); in edac_pci_del_device() [all …]
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D | sb_edac.c | 385 edac_dbg(0, "Invalid number of ranks: %d (max = 4) raw value = %x (%04x)\n", in numrank() 398 edac_dbg(0, "Invalid number of rows: %d (should be between 14 and 17) raw value = %x (%04x)\n", in numrow() 411 edac_dbg(0, "Invalid number of cols: %d (max = 4) raw value = %x (%04x)\n", in numcol() 479 edac_dbg(1, "Associated %02x.%02x.%d with %p\n", in get_pdev_slot_func() 528 edac_dbg(0, "mc#%d: Node ID: %d, source ID: %d\n", in get_dimm_config() 535 edac_dbg(0, "Memory mirror is enabled\n"); in get_dimm_config() 538 edac_dbg(0, "Memory mirror is disabled\n"); in get_dimm_config() 544 edac_dbg(0, "Lockstep is enabled\n"); in get_dimm_config() 548 edac_dbg(0, "Lockstep is disabled\n"); in get_dimm_config() 553 edac_dbg(0, "address map is on closed page mode\n"); in get_dimm_config() [all …]
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D | e7xxx_edac.c | 169 edac_dbg(3, "\n"); in e7xxx_find_channel() 189 edac_dbg(3, "\n"); in ctl_page_to_phys() 211 edac_dbg(3, "\n"); in process_ce() 228 edac_dbg(3, "\n"); in process_ce_no_info() 238 edac_dbg(3, "\n"); in process_ue() 251 edac_dbg(3, "\n"); in process_ue_no_info() 337 edac_dbg(3, "\n"); in e7xxx_check() 386 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e7xxx_init_csrows() 432 edac_dbg(0, "mci\n"); in e7xxx_probe1() 455 edac_dbg(3, "init mci\n"); in e7xxx_probe1() [all …]
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D | amd64_edac.c | 322 edac_dbg(2, "sys_addr 0x%lx doesn't match any node\n", in find_mc_by_sys_addr() 415 edac_dbg(2, "InputAddr 0x%lx matches csrow %d (node %d)\n", in input_addr_to_csrow() 422 edac_dbg(2, "no matching csrow for InputAddr 0x%lx (MC node %d)\n", in input_addr_to_csrow() 451 edac_dbg(1, " revision %d for node %d does not support DHAR\n", in amd64_get_dram_hole_info() 458 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this system\n"); in amd64_get_dram_hole_info() 463 edac_dbg(1, " Dram Memory Hoisting is DISABLED on this node %d\n", in amd64_get_dram_hole_info() 494 edac_dbg(1, " DHAR info for node %d base 0x%lx offset 0x%lx size 0x%lx\n", in amd64_get_dram_hole_info() 547 edac_dbg(2, "using DHAR to translate SysAddr 0x%lx to DramAddr 0x%lx\n", in sys_addr_to_dram_addr() 566 edac_dbg(2, "using DRAM Base register to translate SysAddr 0x%lx to DramAddr 0x%lx\n", in sys_addr_to_dram_addr() 603 edac_dbg(2, " Intlv Shift=%d DramAddr=0x%lx maps to InputAddr=0x%lx\n", in dram_addr_to_input_addr() [all …]
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D | i82443bxgx_edac.c | 181 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82443bxgx_edacmc_check() 204 edac_dbg(1, "MC%d: Row=%d DRB = %#0x\n", in i82443bxgx_init_csrows() 208 edac_dbg(1, "MC%d: Row=%d, Boundary Address=%#0x, Last = %#0x\n", in i82443bxgx_init_csrows() 243 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_probe1() 261 edac_dbg(0, "MC: mci = %p\n", mci); in i82443bxgx_edacmc_probe1() 277 edac_dbg(0, "Unknown/reserved DRAM type value in DRAMC register!\n"); in i82443bxgx_edacmc_probe1() 306 edac_dbg(0, "Unknown/reserved ECC state in NBXCFG register!\n"); in i82443bxgx_edacmc_probe1() 330 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82443bxgx_edacmc_probe1() 345 edac_dbg(3, "MC: success\n"); in i82443bxgx_edacmc_probe1() 361 edac_dbg(0, "MC:\n"); in i82443bxgx_edacmc_init_one() [all …]
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D | i82860_edac.c | 139 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82860_check() 170 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82860_init_csrows() 212 edac_dbg(3, "init mci\n"); in i82860_probe1() 231 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82860_probe1() 247 edac_dbg(3, "success\n"); in i82860_probe1() 262 edac_dbg(0, "\n"); in i82860_init_one() 280 edac_dbg(0, "\n"); in i82860_remove_one() 313 edac_dbg(3, "\n"); in i82860_init() 326 edac_dbg(0, "860 pci_get_device fail\n"); in i82860_init() 334 edac_dbg(0, "860 init fail\n"); in i82860_init() [all …]
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D | x38_edac.c | 106 edac_dbg(0, "In single channel mode\n"); in how_many_channel() 109 edac_dbg(0, "In dual channel mode\n"); in how_many_channel() 246 edac_dbg(1, "MC%d\n", mci->mc_idx); in x38_check() 334 edac_dbg(0, "MC:\n"); in x38_probe1() 355 edac_dbg(3, "MC: init mci\n"); in x38_probe1() 405 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in x38_probe1() 410 edac_dbg(3, "MC: success\n"); in x38_probe1() 425 edac_dbg(0, "MC:\n"); in x38_init_one() 441 edac_dbg(0, "\n"); in x38_remove_one() 474 edac_dbg(3, "MC:\n"); in x38_init() [all …]
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D | i82875p_edac.c | 266 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82875p_check() 374 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82875p_init_csrows() 407 edac_dbg(0, "\n"); in i82875p_probe1() 428 edac_dbg(3, "init mci\n"); in i82875p_probe1() 439 edac_dbg(3, "init pvt\n"); in i82875p_probe1() 450 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82875p_probe1() 466 edac_dbg(3, "success\n"); in i82875p_probe1() 487 edac_dbg(0, "\n"); in i82875p_init_one() 506 edac_dbg(0, "\n"); in i82875p_remove_one() 552 edac_dbg(3, "\n"); in i82875p_init() [all …]
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D | edac_device.c | 43 edac_dbg(3, "\tedac_dev = %p dev_idx=%d\n", in edac_device_dump_device() 45 edac_dbg(4, "\tedac_dev->edac_check = %p\n", edac_dev->edac_check); in edac_device_dump_device() 46 edac_dbg(3, "\tdev = %p\n", edac_dev->dev); in edac_device_dump_device() 47 edac_dbg(3, "\tmod_name:ctl_name = %s:%s\n", in edac_device_dump_device() 49 edac_dbg(3, "\tpvt_info = %p\n\n", edac_dev->pvt_info); in edac_device_dump_device() 86 edac_dbg(4, "instances=%d blocks=%d\n", nr_instances, nr_blocks); in edac_device_alloc_ctl_info() 159 edac_dbg(4, "edac_dev=%p next after end=%p\n", in edac_device_alloc_ctl_info() 181 edac_dbg(4, "instance=%d inst_p=%p block=#%d block_p=%p name='%s'\n", in edac_device_alloc_ctl_info() 195 edac_dbg(4, "THIS BLOCK_ATTRIB=%p\n", in edac_device_alloc_ctl_info() 215 edac_dbg(4, "alloc-attrib=%p attrib_name='%s' attrib-spec=%p spec-name=%s\n", in edac_device_alloc_ctl_info() [all …]
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D | i82975x_edac.c | 334 edac_dbg(1, "MC%d\n", mci->mc_idx); in i82975x_check() 405 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in i82975x_init_csrows() 488 edac_dbg(0, "\n"); in i82975x_probe1() 492 edac_dbg(3, "failed, MCHBAR disabled!\n"); in i82975x_probe1() 557 edac_dbg(3, "init mci\n"); in i82975x_probe1() 568 edac_dbg(3, "init pvt\n"); in i82975x_probe1() 577 edac_dbg(3, "failed edac_mc_add_mc()\n"); in i82975x_probe1() 582 edac_dbg(3, "success\n"); in i82975x_probe1() 600 edac_dbg(0, "\n"); in i82975x_init_one() 618 edac_dbg(0, "\n"); in i82975x_remove_one() [all …]
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D | i3000_edac.c | 278 edac_dbg(1, "MC%d\n", mci->mc_idx); in i3000_check() 325 edac_dbg(0, "MC:\n"); in i3000_probe1() 369 edac_dbg(3, "MC: init mci\n"); in i3000_probe1() 402 edac_dbg(3, "MC: (%d) cumul_size 0x%x\n", i, cumul_size); in i3000_probe1() 431 edac_dbg(3, "MC: failed edac_mc_add_mc()\n"); in i3000_probe1() 447 edac_dbg(3, "MC: success\n"); in i3000_probe1() 462 edac_dbg(0, "MC:\n"); in i3000_init_one() 478 edac_dbg(0, "\n"); in i3000_remove_one() 512 edac_dbg(3, "MC:\n"); in i3000_init() 526 edac_dbg(0, "i3000 pci_get_device fail\n"); in i3000_init() [all …]
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D | i7core_edac.c | 519 edac_dbg(0, "QPI %d control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n", in get_dimm_config() 524 edac_dbg(0, "ECC enabled with x%d SDCC\n", ECCx8(pvt) ? 8 : 4); in get_dimm_config() 530 edac_dbg(0, "ECC disabled\n"); in get_dimm_config() 535 edac_dbg(0, "DOD Max limits: DIMMS: %d, %d-ranked, %d-banked x%x x 0x%x\n", in get_dimm_config() 549 edac_dbg(0, "Channel %i is not active\n", i); in get_dimm_config() 553 edac_dbg(0, "Channel %i is disabled\n", i); in get_dimm_config() 584 edac_dbg(0, "Ch%d phy rd%d, wr%d (0x%08x): %s%s%s%cDIMMs\n", in get_dimm_config() 610 edac_dbg(0, "\tdimm %d %d Mb offset: %x, bank: %d, rank: %d, row: %#x, col: %#x\n", in get_dimm_config() 649 edac_dbg(1, "\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i); in get_dimm_config() 651 edac_dbg(1, "\t\t%#x\t%#x\t%#x\n", in get_dimm_config() [all …]
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D | amd76x_edac.c | 183 edac_dbg(3, "\n"); in amd76x_check() 244 edac_dbg(0, "\n"); in amd76x_probe1() 259 edac_dbg(0, "mci = %p\n", mci); in amd76x_probe1() 279 edac_dbg(3, "failed edac_mc_add_mc()\n"); in amd76x_probe1() 295 edac_dbg(3, "success\n"); in amd76x_probe1() 307 edac_dbg(0, "\n"); in amd76x_init_one() 325 edac_dbg(0, "\n"); in amd76x_remove_one()
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D | edac_mc_sysfs.c | 290 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); in csrow_attr_release() 380 edac_dbg(0, "creating (virtual) csrow node %s\n", in edac_create_csrow_object() 430 edac_dbg(1, in edac_create_csrow_objects() 469 edac_dbg(1, "Removing csrow %d channel %d sysfs nodes\n", in edac_delete_csrow_objects() 590 edac_dbg(1, "Releasing dimm device %s\n", dev_name(dev)); in dimm_attr_release() 621 edac_dbg(0, "creating rank/dimm device %s\n", dev_name(&dimm->dev)); in edac_create_dimm_object() 888 edac_dbg(1, "Releasing csrow device %s\n", dev_name(dev)); in mci_attr_release() 981 edac_dbg(0, "creating bus %s\n", mci->bus.name); in edac_create_sysfs_mci_device() 996 edac_dbg(0, "creating device %s\n", dev_name(&mci->dev)); in edac_create_sysfs_mci_device() 999 edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); in edac_create_sysfs_mci_device() [all …]
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D | e752x_edac.c | 312 edac_dbg(3, "\n"); in ctl_page_to_phys() 338 edac_dbg(3, "\n"); in do_process_ce() 397 edac_dbg(3, "\n"); in do_process_ue() 456 edac_dbg(3, "\n"); in process_ue_no_info_wr() 985 edac_dbg(3, "\n"); in e752x_check() 1105 edac_dbg(3, "(%d) cumul_size 0x%x\n", index, cumul_size); in e752x_init_csrows() 1131 edac_dbg(3, "Initializing rank at (%i,%i)\n", index, i); in e752x_init_csrows() 1272 edac_dbg(0, "mci\n"); in e752x_probe1() 1273 edac_dbg(0, "Starting Probe1\n"); in e752x_probe1() 1303 edac_dbg(3, "init mci\n"); in e752x_probe1() [all …]
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D | mv64x60_edac.c | 172 edac_dbg(3, "failed edac_pci_add_device()\n"); in mv64x60_pci_err_probe() 197 edac_dbg(3, "success\n"); in mv64x60_pci_err_probe() 213 edac_dbg(0, "\n"); in mv64x60_pci_err_remove() 339 edac_dbg(3, "failed edac_device_add_device()\n"); in mv64x60_sram_err_probe() 366 edac_dbg(3, "success\n"); in mv64x60_sram_err_probe() 382 edac_dbg(0, "\n"); in mv64x60_sram_err_remove() 534 edac_dbg(3, "failed edac_device_add_device()\n"); in mv64x60_cpu_err_probe() 561 edac_dbg(3, "success\n"); in mv64x60_cpu_err_probe() 577 edac_dbg(0, "\n"); in mv64x60_cpu_err_remove() 769 edac_dbg(3, "init mci\n"); in mv64x60_mc_err_probe() [all …]
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D | cpc925_edac.c | 319 edac_dbg(1, "start 0x%lx, size 0x%lx\n", start, size); in get_total_mem() 324 edac_dbg(0, "total_mem 0x%lx\n", pdata->total_mem); in get_total_mem() 514 edac_dbg(0, "ECC physical address 0x%lx\n", pa); in cpc925_mc_get_pfn() 854 edac_dbg(0, "Successfully added edac device for %s\n", in cpc925_add_edac_devices() 886 edac_dbg(0, "Successfully deleted edac device for %s\n", in cpc925_del_edac_devices() 902 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate() 930 edac_dbg(0, "%s channel\n", (dual > 0) ? "Dual" : "Single"); in cpc925_mc_get_channels() 945 edac_dbg(0, "%s platform device found!\n", pdev->name); in cpc925_probe() 1027 edac_dbg(0, "success\n"); in cpc925_probe()
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