| /drivers/isdn/hardware/eicon/ |
| D | istream.c | 43 int final,
50 int *final,
74 int final, in diva_istream_write() argument
112 ((!length && final) ? DIVA_DFIFO_LAST : 0); in diva_istream_write()
152 int *final, in diva_istream_read() argument
159 *final = 0; in diva_istream_read()
194 *final = 1; in diva_istream_read()
210 if (*final) { in diva_istream_read()
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| D | divasync.h | 175 int final,
182 int *final,
190 int *final);
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| D | di.h | 105 int final,
112 int *final,
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| D | di.c | 617 int final = 0; in isdn_ind() local
623 &final, NULL, NULL); in isdn_ind()
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| /drivers/crypto/ |
| D | atmel-sha.c | 343 size_t length, int final) in atmel_sha_xmit_cpu() argument
350 ctx->digcnt[1], ctx->digcnt[0], length, final); in atmel_sha_xmit_cpu()
359 if (final) in atmel_sha_xmit_cpu()
373 size_t length1, dma_addr_t dma_addr2, size_t length2, int final) in atmel_sha_xmit_pdc() argument
379 ctx->digcnt[1], ctx->digcnt[0], length1, final); in atmel_sha_xmit_pdc()
397 if (final) in atmel_sha_xmit_pdc()
417 size_t length1, dma_addr_t dma_addr2, size_t length2, int final) in atmel_sha_xmit_dma() argument
424 ctx->digcnt[1], ctx->digcnt[0], length1, final); in atmel_sha_xmit_dma()
465 if (final) in atmel_sha_xmit_dma()
478 size_t length1, dma_addr_t dma_addr2, size_t length2, int final) in atmel_sha_xmit_start() argument
[all …]
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| D | omap-sham.c | 196 int final, int dma);
370 int final, int dma) in omap_sham_write_ctrl_omap2() argument
389 if (final) in omap_sham_write_ctrl_omap2()
415 int final, int dma) in omap_sham_write_ctrl_omap4() argument
442 if (final) { in omap_sham_write_ctrl_omap4()
474 size_t length, int final) in omap_sham_xmit_cpu() argument
481 ctx->digcnt, length, final); in omap_sham_xmit_cpu()
483 dd->pdata->write_ctrl(dd, length, final, 0); in omap_sham_xmit_cpu()
492 if (final) in omap_sham_xmit_cpu()
514 size_t length, int final, int is_sg) in omap_sham_xmit_dma() argument
[all …]
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| D | padlock-sha.c | 249 .final = padlock_sha1_final,
273 .final = padlock_sha256_final,
496 .final = padlock_sha1_final_nano,
515 .final = padlock_sha256_final_nano,
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| D | mv_cesa.c | 981 .final = mv_hash_final,
1005 .final = mv_hash_final,
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| D | bfin_crc.c | 509 .final = bfin_crypto_crc_final,
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| /drivers/net/wireless/rtlwifi/rtl8188ee/ |
| D | phy.c | 1456 u8 final, bool btxonly) in fill_iqk() argument
1461 if (final == 0xFF) { in fill_iqk()
1466 x = result[final][0]; in fill_iqk()
1473 y = result[final][1]; in fill_iqk()
1485 reg = result[final][2]; in fill_iqk()
1487 reg = result[final][3] & 0x3F; in fill_iqk()
1489 reg = (result[final][3] >> 6) & 0xF; in fill_iqk()
1590 u8 final[2] = {0xFF, 0xFF}; in sim_comp() local
1608 final[(i / 4)] = c2; in sim_comp()
1610 final[(i / 4)] = c1; in sim_comp()
[all …]
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| /drivers/misc/ |
| D | pti.c | 112 int final; in pti_write_to_aperture() local
126 final = len - (dwordcnt << 2); /* final = trailing bytes */ in pti_write_to_aperture()
127 if (final == 0 && dwordcnt != 0) { /* always need a final dword */ in pti_write_to_aperture()
128 final += 4; in pti_write_to_aperture()
141 for (i = 0; i < final; i++) in pti_write_to_aperture()
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| /drivers/staging/rtl8192u/ieee80211/ |
| D | digest.c | 56 static void final(struct crypto_tfm *tfm, u8 *out) in final() function
98 ops->dit_final = final; in crypto_init_digest_ops()
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| /drivers/isdn/pcbit/ |
| D | edss1.c | 292 chan->fsm_state = action->final; in pcbit_fsm_event()
294 pcbit_state_change(dev, chan, action->init, event, action->final); in pcbit_fsm_event()
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| D | edss1.h | 83 unsigned short final; member
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| /drivers/crypto/caam/ |
| D | caamhash.c | 133 int (*final)(struct ahash_request *req); member
1241 state->final = ahash_final_ctx; in ahash_update_no_ctx()
1428 state->final = ahash_final_ctx; in ahash_update_first()
1437 state->final = ahash_final_no_ctx; in ahash_update_first()
1460 state->final = ahash_final_no_ctx; in ahash_init()
1485 return state->final(req); in ahash_final()
1534 .final = ahash_final,
1555 .final = ahash_final,
1576 .final = ahash_final,
1597 .final = ahash_final,
[all …]
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| /drivers/crypto/nx/ |
| D | nx-aes-xcbc.c | 221 .final = nx_xcbc_final,
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| D | nx-sha256.c | 232 .final = nx_sha256_final,
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| D | nx-sha512.c | 250 .final = nx_sha512_final,
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| /drivers/scsi/be2iscsi/ |
| D | be_main.h | 599 u8 final; member
613 u8 final; /* DWORD 3 */ member
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| /drivers/crypto/ux500/hash/ |
| D | hash_core.c | 1541 .final = ahash_final,
1563 .final = ahash_final,
1587 .final = ahash_final,
1611 .final = ahash_final,
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| /drivers/net/ethernet/tile/ |
| D | tilepro.c | 1999 bool final = (i == num_frags - 1); in tile_net_tx() local
2006 .send_completion = final, in tile_net_tx()
2007 .end_of_packet = final in tile_net_tx()
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| /drivers/gpu/drm/i915/ |
| D | intel_display.c | 4779 u32 val, final; in ironlake_init_pch_refclk() local
4828 final = val; in ironlake_init_pch_refclk()
4829 final &= ~DREF_NONSPREAD_SOURCE_MASK; in ironlake_init_pch_refclk()
4831 final |= DREF_NONSPREAD_CK505_ENABLE; in ironlake_init_pch_refclk()
4833 final |= DREF_NONSPREAD_SOURCE_ENABLE; in ironlake_init_pch_refclk()
4835 final &= ~DREF_SSC_SOURCE_MASK; in ironlake_init_pch_refclk()
4836 final &= ~DREF_CPU_SOURCE_OUTPUT_MASK; in ironlake_init_pch_refclk()
4837 final &= ~DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
4840 final |= DREF_SSC_SOURCE_ENABLE; in ironlake_init_pch_refclk()
4843 final |= DREF_SSC1_ENABLE; in ironlake_init_pch_refclk()
[all …]
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| D | intel_dp.c | 2629 struct edp_power_seq cur, vbt, spec, final; in intel_dp_init_panel_power_sequencer() local
2692 #define assign_final(field) final.field = (max(cur.field, vbt.field) == 0 ? \ in intel_dp_init_panel_power_sequencer()
2702 #define get_delay(field) (DIV_ROUND_UP(final.field, 10)) in intel_dp_init_panel_power_sequencer()
2718 *out = final; in intel_dp_init_panel_power_sequencer()
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| /drivers/scsi/ |
| D | 53c700.scr | 35 ; necessary amount of data and jumps to the next SG segment. The final
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| /drivers/staging/sep/ |
| D | sep_crypto.c | 3678 .final = sep_sha1_final,
3701 .final = sep_md5_final,
3724 .final = sep_sha224_final,
3747 .final = sep_sha256_final,
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