| /drivers/gpu/drm/nouveau/core/subdev/timer/ |
| D | base.c | 28 nouveau_timer_wait_eq(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) in nouveau_timer_wait_eq() argument
42 } while (ptimer->read(ptimer) - time0 < nsec); in nouveau_timer_wait_eq()
48 nouveau_timer_wait_ne(void *obj, u64 nsec, u32 addr, u32 mask, u32 data) in nouveau_timer_wait_ne() argument
62 } while (ptimer->read(ptimer) - time0 < nsec); in nouveau_timer_wait_ne()
68 nouveau_timer_wait_cb(void *obj, u64 nsec, bool (*func)(void *), void *data) in nouveau_timer_wait_cb() argument
77 } while (ptimer->read(ptimer) - time0 < nsec); in nouveau_timer_wait_cb()
83 nouveau_timer_alarm(void *obj, u32 nsec, struct nouveau_alarm *alarm) in nouveau_timer_alarm() argument
86 ptimer->alarm(ptimer, nsec, alarm); in nouveau_timer_alarm()
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| /drivers/pps/ |
| D | kapi.c | 43 ts->nsec += offset->nsec; in pps_add_offset()
44 while (ts->nsec >= NSEC_PER_SEC) { in pps_add_offset()
45 ts->nsec -= NSEC_PER_SEC; in pps_add_offset()
48 while (ts->nsec < 0) { in pps_add_offset()
49 ts->nsec += NSEC_PER_SEC; in pps_add_offset()
177 struct pps_ktime ts_real = { .sec = 0, .nsec = 0, .flags = 0 }; in pps_event()
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| D | sysfs.c | 41 (long long) pps->assert_tu.sec, pps->assert_tu.nsec, in pps_show_assert()
54 (long long) pps->clear_tu.sec, pps->clear_tu.nsec, in pps_show_clear()
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| D | pps.c | 166 fdata.timeout.nsec); in pps_cdev_ioctl()
168 ticks += fdata.timeout.nsec / (NSEC_PER_SEC / HZ); in pps_cdev_ioctl()
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| /drivers/gpu/drm/nouveau/core/include/subdev/ |
| D | timer.h | 21 bool nouveau_timer_wait_eq(void *, u64 nsec, u32 addr, u32 mask, u32 data);
22 bool nouveau_timer_wait_ne(void *, u64 nsec, u32 addr, u32 mask, u32 data);
23 bool nouveau_timer_wait_cb(void *, u64 nsec, bool (*func)(void *), void *data);
24 void nouveau_timer_alarm(void *, u32 nsec, struct nouveau_alarm *);
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | stmmac_hwtstamp.c | 54 static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec) in stmmac_init_systime() argument
60 writel(nsec, ioaddr + PTP_STNSUR); in stmmac_init_systime()
103 static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec, in stmmac_adjust_systime() argument
110 writel(((add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec), in stmmac_adjust_systime()
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| D | stmmac_ptp.c | 77 u32 sec, nsec; in stmmac_adjust_time() local
88 nsec = reminder; in stmmac_adjust_time()
92 priv->hw->ptp->adjust_systime(priv->ioaddr, sec, nsec, neg_adj); in stmmac_adjust_time()
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| D | common.h | 413 int (*init_systime) (void __iomem *ioaddr, u32 sec, u32 nsec);
415 int (*adjust_systime) (void __iomem *ioaddr, u32 sec, u32 nsec,
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| /drivers/misc/sgi-gru/ |
| D | gruhandles.c | 44 unsigned long nsec; in update_mcs_stats() local
46 nsec = CLKS2NSEC(clks); in update_mcs_stats()
48 atomic_long_add(nsec, &mcs_op_statistics[op].total); in update_mcs_stats()
49 if (mcs_op_statistics[op].max < nsec) in update_mcs_stats()
50 mcs_op_statistics[op].max = nsec; in update_mcs_stats()
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| /drivers/net/ethernet/mellanox/mlx4/ |
| D | en_clock.c | 106 u64 nsec; in mlx4_en_fill_hwtstamps() local
108 nsec = timecounter_cyc2time(&mdev->clock, timestamp); in mlx4_en_fill_hwtstamps()
111 hwts->hwtstamp = ns_to_ktime(nsec); in mlx4_en_fill_hwtstamps()
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| /drivers/ptp/ |
| D | ptp_chardev.c | 84 enable = req.perout.period.sec || req.perout.period.nsec; in ptp_ioctl()
115 pct->nsec = ts.tv_nsec; in ptp_ioctl()
119 pct->nsec = ts.tv_nsec; in ptp_ioctl()
124 pct->nsec = ts.tv_nsec; in ptp_ioctl()
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| D | ptp_sysfs.c | 112 event.index, event.t.sec, event.t.nsec); in extts_fifo_show()
128 &req.perout.start.sec, &req.perout.start.nsec, in period_store()
129 &req.perout.period.sec, &req.perout.period.nsec); in period_store()
135 enable = req.perout.period.sec || req.perout.period.nsec; in period_store()
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| D | ptp_clock.c | 68 dst->t.nsec = remainder; in enqueue_external_timestamp()
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| /drivers/char/ |
| D | mmtimer.c | 483 u64 nsec; in sgi_clock_get() local
485 nsec = rtc_time() * sgi_clock_period in sgi_clock_get()
487 *tp = ns_to_timespec(nsec); in sgi_clock_get()
495 u64 nsec; in sgi_clock_set() local
498 nsec = rtc_time() * sgi_clock_period; in sgi_clock_set()
500 sgi_clock_offset.tv_sec = tp->tv_sec - div_u64_rem(nsec, NSEC_PER_SEC, &rem); in sgi_clock_set()
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| /drivers/gpu/drm/nouveau/core/subdev/i2c/ |
| D | bit.c | 57 i2c_delay(struct nouveau_i2c_port *port, u32 nsec) in i2c_delay() argument
59 udelay((nsec + 500) / 1000); in i2c_delay()
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| /drivers/block/xen-blkback/ |
| D | blkback.c | 446 unsigned int nsec; member
908 seg[i].nsec = req->u.rw.seg[i].last_sect - in dispatch_rw_block_io()
913 preq.nr_sects += seg[i].nsec; in dispatch_rw_block_io()
931 if (((int)preq.sector_number|(int)seg[i].nsec) & in dispatch_rw_block_io()
964 seg[i].nsec << 9, in dispatch_rw_block_io()
978 preq.sector_number += seg[i].nsec; in dispatch_rw_block_io()
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| /drivers/net/phy/ |
| D | dp83640.c | 274 u32 sec, nsec, period; in periodic_output() local
298 nsec = clkreq->perout.start.nsec; in periodic_output()
300 period += clkreq->perout.period.nsec; in periodic_output()
309 ext_write(0, phydev, PAGE4, PTP_TDR, nsec & 0xffff); /* ns[15:0] */ in periodic_output()
310 ext_write(0, phydev, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */ in periodic_output()
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| /drivers/crypto/ |
| D | tegra-aes.c | 718 u64 nsec, tmp[2]; in tegra_aes_rng_reset() local
782 nsec = timespec_to_ns(&ts); in tegra_aes_rng_reset()
783 do_div(nsec, 1000); in tegra_aes_rng_reset()
784 nsec ^= dd->ctr << 56; in tegra_aes_rng_reset()
786 tmp[0] = nsec; in tegra_aes_rng_reset()
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| D | hifn_795x.c | 798 s64 nsec; in hifn_rng_data_present() local
800 nsec = ktime_to_ns(ktime_sub(ktime_get(), dev->rngtime)); in hifn_rng_data_present()
801 nsec -= dev->rng_wait_time; in hifn_rng_data_present()
802 if (nsec <= 0) in hifn_rng_data_present()
806 ndelay(nsec); in hifn_rng_data_present()
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| /drivers/net/ethernet/intel/igb/ |
| D | igb_ptp.c | 121 u32 sec, nsec, jk; in igb_ptp_read_i210() local
128 nsec = rd32(E1000_SYSTIML); in igb_ptp_read_i210()
132 ts->tv_nsec = nsec; in igb_ptp_read_i210()
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| /drivers/gpu/drm/nouveau/ |
| D | nv50_pm.c | 467 mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) in mclk_wait() argument
472 if (nsec > 1000) in mclk_wait()
473 hwsq_usec(hwsq, (nsec + 500) / 1000); in mclk_wait()
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| D | nvc0_pm.c | 470 mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) in mclk_wait() argument
472 udelay((nsec + 500) / 1000); in mclk_wait()
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| D | nva3_pm.c | 368 mclk_wait(struct nouveau_mem_exec_func *exec, u32 nsec) in mclk_wait() argument
372 udelay((nsec + 500) / 1000); in mclk_wait()
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| D | nouveau_pm.h | 193 void (*wait)(struct nouveau_mem_exec_func *, u32 nsec);
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| /drivers/scsi/aic7xxx_old/ |
| D | aic7xxx.reg | 1127 * gives us an 800 nsec timer. After a write to the SEECTL register,
1128 * the SEERDY goes high 800 nsec later. The one exception to this is
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