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Searched refs:radeon_crtc (Results 1 – 19 of 19) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_cursor.c36 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_lock_cursor() local
40 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
45 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
47 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
52 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
54 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
59 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
65 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_hide_cursor() local
69 WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
73 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
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Datombios_crtc.c40 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_overscan_setup() local
47 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
49 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
70 args.usOverscanRight = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
71 args.usOverscanLeft = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
72 args.usOverscanBottom = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
73 args.usOverscanTop = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
83 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_scaler_setup() local
87 to_radeon_encoder(radeon_crtc->encoder); in atombios_scaler_setup()
92 if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id) in atombios_scaler_setup()
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Dradeon_display.c38 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in avivo_crtc_load_lut() local
43 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in avivo_crtc_load_lut()
44 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
46 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
47 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
48 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
50 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
51 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
52 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
54 WREG32(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id); in avivo_crtc_load_lut()
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Dradeon_legacy_crtc.c38 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_overscan_setup() local
40 WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
41 WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
42 WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
50 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_legacy_rmx_mode_set() local
62 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set()
125 switch (radeon_crtc->rmx_type) { in radeon_legacy_rmx_mode_set()
295 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_dpms() local
301 if (radeon_crtc->crtc_id) in radeon_crtc_dpms()
323 radeon_crtc->enabled = true; in radeon_crtc_dpms()
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Drs600.c126 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip() local
127 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rs600_page_flip()
132 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
135 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
137 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
142 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rs600_page_flip()
150 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
153 …return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDIN… in rs600_page_flip()
254 struct radeon_crtc *radeon_crtc; in rs600_pm_prepare() local
259 radeon_crtc = to_radeon_crtc(crtc); in rs600_pm_prepare()
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Dradeon_legacy_encoders.c182 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_lvds_mode_set() local
220 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_lvds_mode_set()
241 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
243 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
582 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_primary_dac_mode_set() local
588 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_primary_dac_mode_set()
628 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
630 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
779 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tmds_int_mode_set() local
846 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_tmds_int_mode_set()
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Dradeon_legacy_tv.c239 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_get_std_mode() local
244 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_get_std_mode()
245 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_get_std_mode()
427 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_init_restarts() local
436 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_init_restarts()
437 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_init_restarts()
540 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_mode_set() local
557 radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tv_mode_set()
603 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_mode_set()
606 if (radeon_crtc->rmx_type != RMX_OFF) in radeon_legacy_tv_mode_set()
Dradeon_mode.h44 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
235 struct radeon_crtc *crtcs[6];
299 struct radeon_crtc { struct
716 struct radeon_crtc *radeon_crtc);
718 struct radeon_crtc *radeon_crtc);
733 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
Datombios_encoders.c995 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_dig_transmitter_setup() local
996 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup()
1473 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_yuv_setup() local
1489 (radeon_crtc->crtc_id << 18))); in atombios_yuv_setup()
1491 WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24))); in atombios_yuv_setup()
1497 args.ucCRTC = radeon_crtc->crtc_id; in atombios_yuv_setup()
1796 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_set_encoder_crtc_source() local
1813 args.v1.ucCRTC = radeon_crtc->crtc_id; in atombios_set_encoder_crtc_source()
1816 args.v1.ucCRTC = radeon_crtc->crtc_id; in atombios_set_encoder_crtc_source()
1818 args.v1.ucCRTC = radeon_crtc->crtc_id << 2; in atombios_set_encoder_crtc_source()
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Devergreen.c1204 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in evergreen_page_flip() local
1205 u32 tmp = RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset); in evergreen_page_flip()
1210 WREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in evergreen_page_flip()
1213 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, in evergreen_page_flip()
1215 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in evergreen_page_flip()
1218 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, in evergreen_page_flip()
1220 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in evergreen_page_flip()
1225 …if (RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PENDI… in evergreen_page_flip()
1233 WREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in evergreen_page_flip()
1236 …return RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & EVERGREEN_GRPH_SURFACE_UPDATE_PE… in evergreen_page_flip()
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Devergreen_hdmi.c156 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_audio_set_dto() local
169 WREG32(DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL(radeon_crtc->crtc_id)); in evergreen_audio_set_dto()
Drv770.c903 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip() local
904 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rv770_page_flip()
909 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
912 if (radeon_crtc->crtc_id) { in rv770_page_flip()
919 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
921 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
926 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rv770_page_flip()
934 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
937 …return RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDIN… in rv770_page_flip()
Dr100.c190 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip() local
196 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
200 if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET) in r100_page_flip()
208 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
211 return RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET; in r100_page_flip()
463 struct radeon_crtc *radeon_crtc; in r100_pm_prepare() local
468 radeon_crtc = to_radeon_crtc(crtc); in r100_pm_prepare()
469 if (radeon_crtc->enabled) { in r100_pm_prepare()
470 if (radeon_crtc->crtc_id) { in r100_pm_prepare()
494 struct radeon_crtc *radeon_crtc; in r100_pm_finish() local
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Dsi.c1466 struct radeon_crtc *radeon_crtc, in dce6_line_buffer_adjust() argument
1484 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
1492 WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, in dce6_line_buffer_adjust()
1495 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
1791 struct radeon_crtc *radeon_crtc, in dce6_program_watermarks() argument
1794 struct drm_display_mode *mode = &radeon_crtc->base.mode; in dce6_program_watermarks()
1805 if (radeon_crtc->base.enabled && num_heads && mode) { in dce6_program_watermarks()
1820 wm.vsc = radeon_crtc->vsc; in dce6_program_watermarks()
1822 if (radeon_crtc->rmx_type != RMX_OFF) in dce6_program_watermarks()
1854 c.full = dfixed_mul(c, radeon_crtc->hsc); in dce6_program_watermarks()
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Dradeon_pm.c675 struct radeon_crtc *radeon_crtc; in radeon_pm_compute_clocks() local
686 radeon_crtc = to_radeon_crtc(crtc); in radeon_pm_compute_clocks()
687 if (radeon_crtc->enabled) { in radeon_pm_compute_clocks()
688 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks()
Dradeon_kms.c217 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_info_ioctl() local
218 *value = radeon_crtc->crtc_id; in radeon_info_ioctl()
Dr600_cs.c827 struct radeon_crtc *radeon_crtc; in r600_cs_common_vline_parse() local
893 radeon_crtc = to_radeon_crtc(crtc); in r600_cs_common_vline_parse()
894 crtc_id = radeon_crtc->crtc_id; in r600_cs_common_vline_parse()
Drv515.c696 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *crtc) in atom_rv515_force_tv_scaler()
940 struct radeon_crtc *crtc, in rv515_crtc_bandwidth_compute()
Drs690.c251 struct radeon_crtc *crtc, in rs690_crtc_bandwidth_compute()