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Searched refs:regn (Results 1 – 6 of 6) sorted by relevance

/drivers/video/omap2/dss/
Ddpi.c170 static bool dpi_calc_pll_cb(int regn, int regm, unsigned long fint, in dpi_calc_pll_cb() argument
176 ctx->dsi_cinfo.regn = regn; in dpi_calc_pll_cb()
Ddsi.c1355 int regn, regn_start, regn_stop; in dsi_pll_calc() local
1369 for (regn = regn_start; regn <= regn_stop; ++regn) { in dsi_pll_calc()
1370 fint = clkin / regn; in dsi_pll_calc()
1381 if (func(regn, regm, fint, pll, data)) in dsi_pll_calc()
1395 if (cinfo->regn == 0 || cinfo->regn > dsi->regn_max) in dsi_calc_clock_rates()
1408 cinfo->fint = cinfo->clkin / cinfo->regn; in dsi_calc_clock_rates()
1463 dsi->current_cinfo.regn = cinfo->regn; in dsi_pll_set_clock_div()
1475 cinfo->regn, in dsi_pll_set_clock_div()
1506 l = FLD_MOD(l, cinfo->regn - 1, regn_start, regn_end); in dsi_pll_set_clock_div()
1703 seq_printf(s, "Fint\t\t%-16luregn %u\n", cinfo->fint, cinfo->regn); in dsi_dump_dsidev_clocks()
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Ddss.h133 u16 regn; member
281 typedef bool (*dsi_pll_calc_func)(int regn, int regm, unsigned long fint,
Dti_hdmi.h57 u16 regn; member
Dhdmi.c476 pi->regn = HDMI_DEFAULT_REGN; in hdmi_compute_pll()
478 refclk = clkin / pi->regn; in hdmi_compute_pll()
501 pi->regsd = ((pi->regm * clkin / 10) / (pi->regn * 250) + 5) / 10; in hdmi_compute_pll()
Dti_hdmi_4xxx_ip.c102 r = FLD_MOD(r, fmt->regn - 1, 8, 1); /* CFG1_PLL_REGN */ in hdmi_pll_init()