Searched refs:sor (Results 1 – 12 of 12) sorted by relevance
| /drivers/gpu/drm/nouveau/core/engine/disp/ |
| D | nve0.c | 70 priv->sor.nr = 4; in nve0_disp_ctor()
73 priv->sor.power = nv50_sor_power; in nve0_disp_ctor()
74 priv->sor.hda_eld = nvd0_hda_eld; in nve0_disp_ctor()
75 priv->sor.hdmi = nvd0_hdmi_ctrl; in nve0_disp_ctor()
76 priv->sor.dp = &nvd0_sor_dp_func; in nve0_disp_ctor()
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| D | nvf0.c | 70 priv->sor.nr = 4; in nvf0_disp_ctor()
73 priv->sor.power = nv50_sor_power; in nvf0_disp_ctor()
74 priv->sor.hda_eld = nvd0_hda_eld; in nvf0_disp_ctor()
75 priv->sor.hdmi = nvd0_hdmi_ctrl; in nvf0_disp_ctor()
76 priv->sor.dp = &nvd0_sor_dp_func; in nvf0_disp_ctor()
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| D | nva3.c | 83 priv->sor.nr = 4; in nva3_disp_ctor()
87 priv->sor.power = nv50_sor_power; in nva3_disp_ctor()
88 priv->sor.hda_eld = nva3_hda_eld; in nva3_disp_ctor()
89 priv->sor.hdmi = nva3_hdmi_ctrl; in nva3_disp_ctor()
90 priv->sor.dp = &nv94_sor_dp_func; in nva3_disp_ctor()
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| D | sornv50.c | 70 ret = priv->sor.power(priv, or, data); in nv50_sor_mthd()
73 ret = priv->sor.hda_eld(priv, or, args, size); in nv50_sor_mthd()
76 ret = priv->sor.hdmi(priv, head, or, data); in nv50_sor_mthd()
79 priv->sor.lvdsconf = data & NV50_DISP_SOR_LVDS_SCRIPT_ID; in nv50_sor_mthd()
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| D | nv94.c | 82 priv->sor.nr = 4; in nv94_disp_ctor()
86 priv->sor.power = nv50_sor_power; in nv94_disp_ctor()
87 priv->sor.hdmi = nv84_hdmi_ctrl; in nv94_disp_ctor()
88 priv->sor.dp = &nv94_sor_dp_func; in nv94_disp_ctor()
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| D | nva0.c | 69 priv->sor.nr = 2; in nva0_disp_ctor()
73 priv->sor.power = nv50_sor_power; in nva0_disp_ctor()
74 priv->sor.hdmi = nv84_hdmi_ctrl; in nva0_disp_ctor()
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| D | nv50.h | 32 int (*power)(struct nv50_disp_priv *, int sor, u32 data);
33 int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32);
34 int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32);
37 } sor; member
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| D | nv84.c | 82 priv->sor.nr = 2; in nv84_disp_ctor()
86 priv->sor.power = nv50_sor_power; in nv84_disp_ctor()
87 priv->sor.hdmi = nv84_hdmi_ctrl; in nv84_disp_ctor()
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| D | nvd0.c | 522 for (i = 0; i < priv->sor.nr; i++) { in nvd0_disp_base_init()
695 conf = priv->sor.lvdsconf; in exec_clkcmp()
814 nouveau_dp_train(&priv->base, priv->sor.dp, in nvd0_disp_intr_unk2_2()
975 priv->sor.nr = 4; in nvd0_disp_ctor()
978 priv->sor.power = nv50_sor_power; in nvd0_disp_ctor()
979 priv->sor.hda_eld = nvd0_hda_eld; in nvd0_disp_ctor()
980 priv->sor.hdmi = nvd0_hdmi_ctrl; in nvd0_disp_ctor()
981 priv->sor.dp = &nvd0_sor_dp_func; in nvd0_disp_ctor()
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| D | nv50.c | 625 for (i = 0; i < priv->sor.nr; i++) { in nv50_disp_base_init()
940 conf = priv->sor.lvdsconf; in exec_clkcmp()
1126 nouveau_dp_train(&priv->base, priv->sor.dp, in nv50_disp_intr_unk20_2()
1305 priv->sor.nr = 2; in nv50_disp_ctor()
1309 priv->sor.power = nv50_sor_power; in nv50_disp_ctor()
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| /drivers/gpu/drm/nouveau/core/include/subdev/bios/ |
| D | dcb.h | 39 struct sor_conf sor; member
48 struct sor_conf sor; member
53 struct sor_conf sor; member
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| /drivers/gpu/drm/nouveau/ |
| D | nouveau_bios.c | 1446 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
1471 entry->dpconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
1495 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4; in parse_dcb20_entry()
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