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1 /*
2  * Copyright 2012 Red Hat Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Ben Skeggs
23  */
24 
25 #include <engine/software.h>
26 #include <engine/disp.h>
27 
28 #include <core/class.h>
29 
30 #include "nv50.h"
31 
32 static struct nouveau_oclass
33 nvf0_disp_sclass[] = {
34 	{ NVF0_DISP_MAST_CLASS, &nvd0_disp_mast_ofuncs },
35 	{ NVF0_DISP_SYNC_CLASS, &nvd0_disp_sync_ofuncs },
36 	{ NVF0_DISP_OVLY_CLASS, &nvd0_disp_ovly_ofuncs },
37 	{ NVF0_DISP_OIMM_CLASS, &nvd0_disp_oimm_ofuncs },
38 	{ NVF0_DISP_CURS_CLASS, &nvd0_disp_curs_ofuncs },
39 	{}
40 };
41 
42 static struct nouveau_oclass
43 nvf0_disp_base_oclass[] = {
44 	{ NVF0_DISP_CLASS, &nvd0_disp_base_ofuncs, nva3_disp_base_omthds },
45 	{}
46 };
47 
48 static int
nvf0_disp_ctor(struct nouveau_object * parent,struct nouveau_object * engine,struct nouveau_oclass * oclass,void * data,u32 size,struct nouveau_object ** pobject)49 nvf0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
50 	       struct nouveau_oclass *oclass, void *data, u32 size,
51 	       struct nouveau_object **pobject)
52 {
53 	struct nv50_disp_priv *priv;
54 	int heads = nv_rd32(parent, 0x022448);
55 	int ret;
56 
57 	ret = nouveau_disp_create(parent, engine, oclass, heads,
58 				  "PDISP", "display", &priv);
59 	*pobject = nv_object(priv);
60 	if (ret)
61 		return ret;
62 
63 	nv_engine(priv)->sclass = nvf0_disp_base_oclass;
64 	nv_engine(priv)->cclass = &nv50_disp_cclass;
65 	nv_subdev(priv)->intr = nvd0_disp_intr;
66 	INIT_WORK(&priv->supervisor, nvd0_disp_intr_supervisor);
67 	priv->sclass = nvf0_disp_sclass;
68 	priv->head.nr = heads;
69 	priv->dac.nr = 3;
70 	priv->sor.nr = 4;
71 	priv->dac.power = nv50_dac_power;
72 	priv->dac.sense = nv50_dac_sense;
73 	priv->sor.power = nv50_sor_power;
74 	priv->sor.hda_eld = nvd0_hda_eld;
75 	priv->sor.hdmi = nvd0_hdmi_ctrl;
76 	priv->sor.dp = &nvd0_sor_dp_func;
77 	return 0;
78 }
79 
80 struct nouveau_oclass
81 nvf0_disp_oclass = {
82 	.handle = NV_ENGINE(DISP, 0x92),
83 	.ofuncs = &(struct nouveau_ofuncs) {
84 		.ctor = nvf0_disp_ctor,
85 		.dtor = _nouveau_disp_dtor,
86 		.init = _nouveau_disp_init,
87 		.fini = _nouveau_disp_fini,
88 	},
89 };
90