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Searched refs:sorconf (Results 1 – 9 of 9) sorted by relevance

/drivers/gpu/drm/nouveau/core/include/subdev/bios/
Ddcb.h34 } sorconf; member
/drivers/gpu/drm/nouveau/core/engine/disp/
Dsornv94.c44 return nv94_sor_soff(outp) + !(outp->sorconf.link & 1) * 0x80; in nv94_sor_loff()
Dsornvd0.c44 return nvd0_sor_soff(outp) + !(outp->sorconf.link & 1) * 0x80; in nvd0_sor_loff()
Dnv50.c1000 const int link = !(outp->sorconf.link & 1); in nv50_disp_intr_unk20_2_dp()
1166 const int link = !(outp->sorconf.link & 1); in nv50_disp_intr_unk40_0_tmds()
1169 const u16 mask = (outp->sorconf.link << 6) | outp->or; in nv50_disp_intr_unk40_0_tmds()
Dnvd0.c612 dcb->sorconf.link = mask; in exec_lookup()
/drivers/gpu/drm/nouveau/core/subdev/bios/
Ddcb.c149 outp->sorconf.link = outp->link; /*XXX*/ in dcb_outp_parse()
Dinit.c80 return !(init->outp->sorconf.link & 1); in init_link()
800 (init->outp->sorconf.link << 6), in init_dp_condition()
/drivers/gpu/drm/nouveau/
Dnv50_display.c1795 if (nv_encoder->dcb->sorconf.link & 1) { in nv50_sor_mode_set()
1850 if (nv_encoder->dcb->sorconf.link & 1) in nv50_sor_mode_set()
Dnouveau_bios.c1519 entry->duallink_possible = (entry->sorconf.link == 3); in parse_dcb20_entry()