1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25 #include <core/os.h>
26 #include <core/class.h>
27
28 #include <subdev/bios.h>
29 #include <subdev/bios/dcb.h>
30 #include <subdev/bios/dp.h>
31 #include <subdev/bios/init.h>
32
33 #include "nv50.h"
34
35 static inline u32
nv94_sor_soff(struct dcb_output * outp)36 nv94_sor_soff(struct dcb_output *outp)
37 {
38 return (ffs(outp->or) - 1) * 0x800;
39 }
40
41 static inline u32
nv94_sor_loff(struct dcb_output * outp)42 nv94_sor_loff(struct dcb_output *outp)
43 {
44 return nv94_sor_soff(outp) + !(outp->sorconf.link & 1) * 0x80;
45 }
46
47 static inline u32
nv94_sor_dp_lane_map(struct nv50_disp_priv * priv,u8 lane)48 nv94_sor_dp_lane_map(struct nv50_disp_priv *priv, u8 lane)
49 {
50 static const u8 nvaf[] = { 24, 16, 8, 0 }; /* thanks, apple.. */
51 static const u8 nv94[] = { 16, 8, 0, 24 };
52 if (nv_device(priv)->chipset == 0xaf)
53 return nvaf[lane];
54 return nv94[lane];
55 }
56
57 static int
nv94_sor_dp_pattern(struct nouveau_disp * disp,struct dcb_output * outp,int head,int pattern)58 nv94_sor_dp_pattern(struct nouveau_disp *disp, struct dcb_output *outp,
59 int head, int pattern)
60 {
61 struct nv50_disp_priv *priv = (void *)disp;
62 const u32 loff = nv94_sor_loff(outp);
63 nv_mask(priv, 0x61c10c + loff, 0x0f000000, pattern << 24);
64 return 0;
65 }
66
67 static int
nv94_sor_dp_lnk_ctl(struct nouveau_disp * disp,struct dcb_output * outp,int head,int link_nr,int link_bw,bool enh_frame)68 nv94_sor_dp_lnk_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
69 int head, int link_nr, int link_bw, bool enh_frame)
70 {
71 struct nv50_disp_priv *priv = (void *)disp;
72 const u32 soff = nv94_sor_soff(outp);
73 const u32 loff = nv94_sor_loff(outp);
74 u32 dpctrl = 0x00000000;
75 u32 clksor = 0x00000000;
76 u32 lane = 0;
77 int i;
78
79 dpctrl |= ((1 << link_nr) - 1) << 16;
80 if (enh_frame)
81 dpctrl |= 0x00004000;
82 if (link_bw > 0x06)
83 clksor |= 0x00040000;
84
85 for (i = 0; i < link_nr; i++)
86 lane |= 1 << (nv94_sor_dp_lane_map(priv, i) >> 3);
87
88 nv_mask(priv, 0x614300 + soff, 0x000c0000, clksor);
89 nv_mask(priv, 0x61c10c + loff, 0x001f4000, dpctrl);
90 nv_mask(priv, 0x61c130 + loff, 0x0000000f, lane);
91 return 0;
92 }
93
94 static int
nv94_sor_dp_drv_ctl(struct nouveau_disp * disp,struct dcb_output * outp,int head,int lane,int swing,int preem)95 nv94_sor_dp_drv_ctl(struct nouveau_disp *disp, struct dcb_output *outp,
96 int head, int lane, int swing, int preem)
97 {
98 struct nouveau_bios *bios = nouveau_bios(disp);
99 struct nv50_disp_priv *priv = (void *)disp;
100 const u32 loff = nv94_sor_loff(outp);
101 u32 addr, shift = nv94_sor_dp_lane_map(priv, lane);
102 u8 ver, hdr, cnt, len;
103 struct nvbios_dpout info;
104 struct nvbios_dpcfg ocfg;
105
106 addr = nvbios_dpout_match(bios, outp->hasht, outp->hashm,
107 &ver, &hdr, &cnt, &len, &info);
108 if (!addr)
109 return -ENODEV;
110
111 addr = nvbios_dpcfg_match(bios, addr, 0, swing, preem,
112 &ver, &hdr, &cnt, &len, &ocfg);
113 if (!addr)
114 return -EINVAL;
115
116 nv_mask(priv, 0x61c118 + loff, 0x000000ff << shift, ocfg.drv << shift);
117 nv_mask(priv, 0x61c120 + loff, 0x000000ff << shift, ocfg.pre << shift);
118 nv_mask(priv, 0x61c130 + loff, 0x0000ff00, ocfg.unk << 8);
119 return 0;
120 }
121
122 const struct nouveau_dp_func
123 nv94_sor_dp_func = {
124 .pattern = nv94_sor_dp_pattern,
125 .lnk_ctl = nv94_sor_dp_lnk_ctl,
126 .drv_ctl = nv94_sor_dp_drv_ctl,
127 };
128