1 #ifndef __MACH_IMX_CLK_H
2 #define __MACH_IMX_CLK_H
3
4 #include <linux/spinlock.h>
5 #include <linux/clk-provider.h>
6
7 extern spinlock_t imx_ccm_lock;
8
9 struct clk *imx_clk_pllv1(const char *name, const char *parent,
10 void __iomem *base);
11
12 struct clk *imx_clk_pllv2(const char *name, const char *parent,
13 void __iomem *base);
14
15 enum imx_pllv3_type {
16 IMX_PLLV3_GENERIC,
17 IMX_PLLV3_SYS,
18 IMX_PLLV3_USB,
19 IMX_PLLV3_AV,
20 IMX_PLLV3_ENET,
21 IMX_PLLV3_MLB,
22 };
23
24 struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
25 const char *parent_name, void __iomem *base, u32 div_mask);
26
27 struct clk *clk_register_gate2(struct device *dev, const char *name,
28 const char *parent_name, unsigned long flags,
29 void __iomem *reg, u8 bit_idx,
30 u8 clk_gate_flags, spinlock_t *lock);
31
imx_clk_gate2(const char * name,const char * parent,void __iomem * reg,u8 shift)32 static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
33 void __iomem *reg, u8 shift)
34 {
35 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
36 shift, 0, &imx_ccm_lock);
37 }
38
39 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
40 void __iomem *reg, u8 idx);
41
42 struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
43 void __iomem *reg, u8 shift, u8 width,
44 void __iomem *busy_reg, u8 busy_shift);
45
46 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
47 u8 width, void __iomem *busy_reg, u8 busy_shift,
48 const char **parent_names, int num_parents);
49
imx_clk_fixed(const char * name,int rate)50 static inline struct clk *imx_clk_fixed(const char *name, int rate)
51 {
52 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
53 }
54
imx_clk_divider(const char * name,const char * parent,void __iomem * reg,u8 shift,u8 width)55 static inline struct clk *imx_clk_divider(const char *name, const char *parent,
56 void __iomem *reg, u8 shift, u8 width)
57 {
58 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
59 reg, shift, width, 0, &imx_ccm_lock);
60 }
61
imx_clk_divider_flags(const char * name,const char * parent,void __iomem * reg,u8 shift,u8 width,unsigned long flags)62 static inline struct clk *imx_clk_divider_flags(const char *name,
63 const char *parent, void __iomem *reg, u8 shift, u8 width,
64 unsigned long flags)
65 {
66 return clk_register_divider(NULL, name, parent, flags,
67 reg, shift, width, 0, &imx_ccm_lock);
68 }
69
imx_clk_gate(const char * name,const char * parent,void __iomem * reg,u8 shift)70 static inline struct clk *imx_clk_gate(const char *name, const char *parent,
71 void __iomem *reg, u8 shift)
72 {
73 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
74 shift, 0, &imx_ccm_lock);
75 }
76
imx_clk_mux(const char * name,void __iomem * reg,u8 shift,u8 width,const char ** parents,int num_parents)77 static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
78 u8 shift, u8 width, const char **parents, int num_parents)
79 {
80 return clk_register_mux(NULL, name, parents, num_parents, 0, reg, shift,
81 width, 0, &imx_ccm_lock);
82 }
83
imx_clk_mux_flags(const char * name,void __iomem * reg,u8 shift,u8 width,const char ** parents,int num_parents,unsigned long flags)84 static inline struct clk *imx_clk_mux_flags(const char *name,
85 void __iomem *reg, u8 shift, u8 width, const char **parents,
86 int num_parents, unsigned long flags)
87 {
88 return clk_register_mux(NULL, name, parents, num_parents,
89 flags, reg, shift, width, 0,
90 &imx_ccm_lock);
91 }
92
imx_clk_fixed_factor(const char * name,const char * parent,unsigned int mult,unsigned int div)93 static inline struct clk *imx_clk_fixed_factor(const char *name,
94 const char *parent, unsigned int mult, unsigned int div)
95 {
96 return clk_register_fixed_factor(NULL, name, parent,
97 CLK_SET_RATE_PARENT, mult, div);
98 }
99
100 #endif
101