1 /*
2 * LILLY-1131 development board support
3 *
4 * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
5 *
6 * based on code for other MX31 boards,
7 *
8 * Copyright 2005-2007 Freescale Semiconductor
9 * Copyright (c) 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com>
10 * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 */
22
23 #include <linux/kernel.h>
24 #include <linux/types.h>
25 #include <linux/init.h>
26 #include <linux/gpio.h>
27 #include <linux/platform_device.h>
28
29 #include <asm/mach-types.h>
30 #include <asm/mach/arch.h>
31 #include <asm/mach/map.h>
32
33 #include "board-mx31lilly.h"
34 #include "common.h"
35 #include "devices-imx31.h"
36 #include "hardware.h"
37 #include "iomux-mx3.h"
38
39 /*
40 * This file contains board-specific initialization routines for the
41 * LILLY-1131 development board. If you design an own baseboard for the
42 * module, use this file as base for support code.
43 */
44
45 static unsigned int lilly_db_board_pins[] __initdata = {
46 MX31_PIN_CTS1__CTS1,
47 MX31_PIN_RTS1__RTS1,
48 MX31_PIN_TXD1__TXD1,
49 MX31_PIN_RXD1__RXD1,
50 MX31_PIN_CTS2__CTS2,
51 MX31_PIN_RTS2__RTS2,
52 MX31_PIN_TXD2__TXD2,
53 MX31_PIN_RXD2__RXD2,
54 MX31_PIN_CSPI3_MOSI__RXD3,
55 MX31_PIN_CSPI3_MISO__TXD3,
56 MX31_PIN_CSPI3_SCLK__RTS3,
57 MX31_PIN_CSPI3_SPI_RDY__CTS3,
58 MX31_PIN_SD1_DATA3__SD1_DATA3,
59 MX31_PIN_SD1_DATA2__SD1_DATA2,
60 MX31_PIN_SD1_DATA1__SD1_DATA1,
61 MX31_PIN_SD1_DATA0__SD1_DATA0,
62 MX31_PIN_SD1_CLK__SD1_CLK,
63 MX31_PIN_SD1_CMD__SD1_CMD,
64 MX31_PIN_LD0__LD0,
65 MX31_PIN_LD1__LD1,
66 MX31_PIN_LD2__LD2,
67 MX31_PIN_LD3__LD3,
68 MX31_PIN_LD4__LD4,
69 MX31_PIN_LD5__LD5,
70 MX31_PIN_LD6__LD6,
71 MX31_PIN_LD7__LD7,
72 MX31_PIN_LD8__LD8,
73 MX31_PIN_LD9__LD9,
74 MX31_PIN_LD10__LD10,
75 MX31_PIN_LD11__LD11,
76 MX31_PIN_LD12__LD12,
77 MX31_PIN_LD13__LD13,
78 MX31_PIN_LD14__LD14,
79 MX31_PIN_LD15__LD15,
80 MX31_PIN_LD16__LD16,
81 MX31_PIN_LD17__LD17,
82 MX31_PIN_VSYNC3__VSYNC3,
83 MX31_PIN_HSYNC__HSYNC,
84 MX31_PIN_FPSHIFT__FPSHIFT,
85 MX31_PIN_DRDY0__DRDY0,
86 MX31_PIN_CONTRAST__CONTRAST,
87 };
88
89 /* UART */
90 static const struct imxuart_platform_data uart_pdata __initconst = {
91 .flags = IMXUART_HAVE_RTSCTS,
92 };
93
94 /* MMC support */
95
mxc_mmc1_get_ro(struct device * dev)96 static int mxc_mmc1_get_ro(struct device *dev)
97 {
98 return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_LCS0));
99 }
100
101 static int gpio_det, gpio_wp;
102
103 #define MMC_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
104 PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
105
mxc_mmc1_init(struct device * dev,irq_handler_t detect_irq,void * data)106 static int mxc_mmc1_init(struct device *dev,
107 irq_handler_t detect_irq, void *data)
108 {
109 int ret;
110
111 gpio_det = IOMUX_TO_GPIO(MX31_PIN_GPIO1_1);
112 gpio_wp = IOMUX_TO_GPIO(MX31_PIN_LCS0);
113
114 mxc_iomux_set_pad(MX31_PIN_SD1_DATA0, MMC_PAD_CFG);
115 mxc_iomux_set_pad(MX31_PIN_SD1_DATA1, MMC_PAD_CFG);
116 mxc_iomux_set_pad(MX31_PIN_SD1_DATA2, MMC_PAD_CFG);
117 mxc_iomux_set_pad(MX31_PIN_SD1_DATA3, MMC_PAD_CFG);
118 mxc_iomux_set_pad(MX31_PIN_SD1_CLK, MMC_PAD_CFG);
119 mxc_iomux_set_pad(MX31_PIN_SD1_CMD, MMC_PAD_CFG);
120
121 ret = gpio_request(gpio_det, "MMC detect");
122 if (ret)
123 return ret;
124
125 ret = gpio_request(gpio_wp, "MMC w/p");
126 if (ret)
127 goto exit_free_det;
128
129 gpio_direction_input(gpio_det);
130 gpio_direction_input(gpio_wp);
131
132 ret = request_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)),
133 detect_irq,
134 IRQF_DISABLED | IRQF_TRIGGER_FALLING,
135 "MMC detect", data);
136 if (ret)
137 goto exit_free_wp;
138
139 return 0;
140
141 exit_free_wp:
142 gpio_free(gpio_wp);
143
144 exit_free_det:
145 gpio_free(gpio_det);
146
147 return ret;
148 }
149
mxc_mmc1_exit(struct device * dev,void * data)150 static void mxc_mmc1_exit(struct device *dev, void *data)
151 {
152 gpio_free(gpio_det);
153 gpio_free(gpio_wp);
154 free_irq(gpio_to_irq(IOMUX_TO_GPIO(MX31_PIN_GPIO1_1)), data);
155 }
156
157 static const struct imxmmc_platform_data mmc_pdata __initconst = {
158 .get_ro = mxc_mmc1_get_ro,
159 .init = mxc_mmc1_init,
160 .exit = mxc_mmc1_exit,
161 };
162
163 /* Framebuffer support */
164 static const struct fb_videomode fb_modedb = {
165 /* 640x480 TFT panel (IPS-056T) */
166 .name = "CRT-VGA",
167 .refresh = 64,
168 .xres = 640,
169 .yres = 480,
170 .pixclock = 30000,
171 .left_margin = 200,
172 .right_margin = 2,
173 .upper_margin = 2,
174 .lower_margin = 2,
175 .hsync_len = 3,
176 .vsync_len = 1,
177 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
178 .vmode = FB_VMODE_NONINTERLACED,
179 .flag = 0,
180 };
181
182 static struct mx3fb_platform_data fb_pdata __initdata = {
183 .name = "CRT-VGA",
184 .mode = &fb_modedb,
185 .num_modes = 1,
186 };
187
188 #define LCD_VCC_EN_GPIO (7)
189
mx31lilly_init_fb(void)190 static void __init mx31lilly_init_fb(void)
191 {
192 if (gpio_request(LCD_VCC_EN_GPIO, "LCD enable") != 0) {
193 printk(KERN_WARNING "unable to request LCD_VCC_EN pin.\n");
194 return;
195 }
196
197 imx31_add_ipu_core();
198 imx31_add_mx3_sdc_fb(&fb_pdata);
199 gpio_direction_output(LCD_VCC_EN_GPIO, 1);
200 }
201
mx31lilly_db_init(void)202 void __init mx31lilly_db_init(void)
203 {
204 mxc_iomux_setup_multiple_pins(lilly_db_board_pins,
205 ARRAY_SIZE(lilly_db_board_pins),
206 "development board pins");
207 imx31_add_imx_uart0(&uart_pdata);
208 imx31_add_imx_uart1(&uart_pdata);
209 imx31_add_imx_uart2(&uart_pdata);
210 imx31_add_mxc_mmc(0, &mmc_pdata);
211 mx31lilly_init_fb();
212 }
213