1 /*
2 * Header for code common to all OMAP2+ machines.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
10 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
12 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
13 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
14 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
15 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
16 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
17 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
18 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 675 Mass Ave, Cambridge, MA 02139, USA.
23 */
24
25 #ifndef __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
26 #define __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H
27 #ifndef __ASSEMBLER__
28
29 #include <linux/irq.h>
30 #include <linux/delay.h>
31 #include <linux/i2c.h>
32 #include <linux/i2c/twl.h>
33 #include <linux/i2c-omap.h>
34
35 #include <asm/proc-fns.h>
36
37 #include "i2c.h"
38 #include "serial.h"
39
40 #include "usb.h"
41
42 #define OMAP_INTC_START NR_IRQS
43
44 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP2)
45 int omap2_pm_init(void);
46 #else
omap2_pm_init(void)47 static inline int omap2_pm_init(void)
48 {
49 return 0;
50 }
51 #endif
52
53 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
54 int omap3_pm_init(void);
55 #else
omap3_pm_init(void)56 static inline int omap3_pm_init(void)
57 {
58 return 0;
59 }
60 #endif
61
62 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP4)
63 int omap4_pm_init(void);
64 #else
omap4_pm_init(void)65 static inline int omap4_pm_init(void)
66 {
67 return 0;
68 }
69 #endif
70
71 #ifdef CONFIG_OMAP_MUX
72 int omap_mux_late_init(void);
73 #else
omap_mux_late_init(void)74 static inline int omap_mux_late_init(void)
75 {
76 return 0;
77 }
78 #endif
79
80 extern void omap2_init_common_infrastructure(void);
81
82 extern void omap2_sync32k_timer_init(void);
83 extern void omap3_sync32k_timer_init(void);
84 extern void omap3_secure_sync32k_timer_init(void);
85 extern void omap3_gptimer_timer_init(void);
86 extern void omap4_local_timer_init(void);
87 extern void omap5_realtime_timer_init(void);
88
89 void omap2420_init_early(void);
90 void omap2430_init_early(void);
91 void omap3430_init_early(void);
92 void omap35xx_init_early(void);
93 void omap3630_init_early(void);
94 void omap3_init_early(void); /* Do not use this one */
95 void am33xx_init_early(void);
96 void am35xx_init_early(void);
97 void ti81xx_init_early(void);
98 void am33xx_init_early(void);
99 void omap4430_init_early(void);
100 void omap5_init_early(void);
101 void omap3_init_late(void); /* Do not use this one */
102 void omap4430_init_late(void);
103 void omap2420_init_late(void);
104 void omap2430_init_late(void);
105 void omap3430_init_late(void);
106 void omap35xx_init_late(void);
107 void omap3630_init_late(void);
108 void am35xx_init_late(void);
109 void ti81xx_init_late(void);
110 int omap2_common_pm_late_init(void);
111
112 #ifdef CONFIG_SOC_BUS
113 void omap_soc_device_init(void);
114 #else
omap_soc_device_init(void)115 static inline void omap_soc_device_init(void)
116 {
117 }
118 #endif
119
120 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
121 void omap2xxx_restart(char mode, const char *cmd);
122 #else
omap2xxx_restart(char mode,const char * cmd)123 static inline void omap2xxx_restart(char mode, const char *cmd)
124 {
125 }
126 #endif
127
128 #ifdef CONFIG_SOC_AM33XX
129 void am33xx_restart(char mode, const char *cmd);
130 #else
am33xx_restart(char mode,const char * cmd)131 static inline void am33xx_restart(char mode, const char *cmd)
132 {
133 }
134 #endif
135
136 #ifdef CONFIG_ARCH_OMAP3
137 void omap3xxx_restart(char mode, const char *cmd);
138 #else
omap3xxx_restart(char mode,const char * cmd)139 static inline void omap3xxx_restart(char mode, const char *cmd)
140 {
141 }
142 #endif
143
144 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
145 void omap44xx_restart(char mode, const char *cmd);
146 #else
omap44xx_restart(char mode,const char * cmd)147 static inline void omap44xx_restart(char mode, const char *cmd)
148 {
149 }
150 #endif
151
152 /* This gets called from mach-omap2/io.c, do not call this */
153 void __init omap2_set_globals_tap(u32 class, void __iomem *tap);
154
155 void __init omap242x_map_io(void);
156 void __init omap243x_map_io(void);
157 void __init omap3_map_io(void);
158 void __init am33xx_map_io(void);
159 void __init omap4_map_io(void);
160 void __init omap5_map_io(void);
161 void __init ti81xx_map_io(void);
162
163 /* omap_barriers_init() is OMAP4 only */
164 void omap_barriers_init(void);
165
166 /**
167 * omap_test_timeout - busy-loop, testing a condition
168 * @cond: condition to test until it evaluates to true
169 * @timeout: maximum number of microseconds in the timeout
170 * @index: loop index (integer)
171 *
172 * Loop waiting for @cond to become true or until at least @timeout
173 * microseconds have passed. To use, define some integer @index in the
174 * calling code. After running, if @index == @timeout, then the loop has
175 * timed out.
176 */
177 #define omap_test_timeout(cond, timeout, index) \
178 ({ \
179 for (index = 0; index < timeout; index++) { \
180 if (cond) \
181 break; \
182 udelay(1); \
183 } \
184 })
185
186 extern struct device *omap2_get_mpuss_device(void);
187 extern struct device *omap2_get_iva_device(void);
188 extern struct device *omap2_get_l3_device(void);
189 extern struct device *omap4_get_dsp_device(void);
190
191 void omap2_init_irq(void);
192 void omap3_init_irq(void);
193 void ti81xx_init_irq(void);
194 extern int omap_irq_pending(void);
195 void omap_intc_save_context(void);
196 void omap_intc_restore_context(void);
197 void omap3_intc_suspend(void);
198 void omap3_intc_prepare_idle(void);
199 void omap3_intc_resume_idle(void);
200 void omap2_intc_handle_irq(struct pt_regs *regs);
201 void omap3_intc_handle_irq(struct pt_regs *regs);
202 void omap_intc_of_init(void);
203 void omap_gic_of_init(void);
204
205 #ifdef CONFIG_CACHE_L2X0
206 extern void __iomem *omap4_get_l2cache_base(void);
207 #endif
208
209 struct device_node;
210 #ifdef CONFIG_OF
211 int __init intc_of_init(struct device_node *node,
212 struct device_node *parent);
213 #else
intc_of_init(struct device_node * node,struct device_node * parent)214 int __init intc_of_init(struct device_node *node,
215 struct device_node *parent)
216 {
217 return 0;
218 }
219 #endif
220
221 #ifdef CONFIG_SMP
222 extern void __iomem *omap4_get_scu_base(void);
223 #else
omap4_get_scu_base(void)224 static inline void __iomem *omap4_get_scu_base(void)
225 {
226 return NULL;
227 }
228 #endif
229
230 extern void __init gic_init_irq(void);
231 extern void gic_dist_disable(void);
232 extern bool gic_dist_disabled(void);
233 extern void gic_timer_retrigger(void);
234 extern void omap_smc1(u32 fn, u32 arg);
235 extern void __iomem *omap4_get_sar_ram_base(void);
236 extern void omap_do_wfi(void);
237
238 #ifdef CONFIG_SMP
239 /* Needed for secondary core boot */
240 extern void omap_secondary_startup(void);
241 extern void omap_secondary_startup_4460(void);
242 extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask);
243 extern void omap_auxcoreboot_addr(u32 cpu_addr);
244 extern u32 omap_read_auxcoreboot0(void);
245
246 extern void omap4_cpu_die(unsigned int cpu);
247
248 extern struct smp_operations omap4_smp_ops;
249
250 extern void omap5_secondary_startup(void);
251 #endif
252
253 #if defined(CONFIG_SMP) && defined(CONFIG_PM)
254 extern int omap4_mpuss_init(void);
255 extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
256 extern int omap4_finish_suspend(unsigned long cpu_state);
257 extern void omap4_cpu_resume(void);
258 extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
259 #else
omap4_enter_lowpower(unsigned int cpu,unsigned int power_state)260 static inline int omap4_enter_lowpower(unsigned int cpu,
261 unsigned int power_state)
262 {
263 cpu_do_idle();
264 return 0;
265 }
266
omap4_hotplug_cpu(unsigned int cpu,unsigned int power_state)267 static inline int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
268 {
269 cpu_do_idle();
270 return 0;
271 }
272
omap4_mpuss_init(void)273 static inline int omap4_mpuss_init(void)
274 {
275 return 0;
276 }
277
omap4_finish_suspend(unsigned long cpu_state)278 static inline int omap4_finish_suspend(unsigned long cpu_state)
279 {
280 return 0;
281 }
282
omap4_cpu_resume(void)283 static inline void omap4_cpu_resume(void)
284 {}
285
286 #endif
287
288 struct omap_sdrc_params;
289 extern void omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
290 struct omap_sdrc_params *sdrc_cs1);
291 struct omap2_hsmmc_info;
292 extern int omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers);
293 extern void omap_reserve(void);
294
295 struct omap_hwmod;
296 extern int omap_dss_reset(struct omap_hwmod *);
297
298 /* SoC specific clock initializer */
299 extern int (*omap_clk_init)(void);
300
301 #endif /* __ASSEMBLER__ */
302 #endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
303