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1 /*
2  * MSDI IP block reset
3  *
4  * Copyright (C) 2012 Texas Instruments, Inc.
5  * Paul Walmsley
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License
9  * version 2 as published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19  * 02110-1301 USA
20  *
21  * XXX What about pad muxing?
22  */
23 
24 #include <linux/kernel.h>
25 #include <linux/err.h>
26 #include <linux/platform_data/gpio-omap.h>
27 
28 #include "prm.h"
29 #include "common.h"
30 #include "control.h"
31 #include "omap_hwmod.h"
32 #include "omap_device.h"
33 #include "mux.h"
34 #include "mmc.h"
35 
36 /*
37  * MSDI_CON_OFFSET: offset in bytes of the MSDI IP block's CON register
38  *     from the IP block's base address
39  */
40 #define MSDI_CON_OFFSET				0x0c
41 
42 /* Register bitfields in the CON register */
43 #define MSDI_CON_POW_MASK			BIT(11)
44 #define MSDI_CON_CLKD_MASK			(0x3f << 0)
45 #define MSDI_CON_CLKD_SHIFT			0
46 
47 /* MSDI_TARGET_RESET_CLKD: clock divisor to use throughout the reset */
48 #define MSDI_TARGET_RESET_CLKD		0x3ff
49 
50 /**
51  * omap_msdi_reset - reset the MSDI IP block
52  * @oh: struct omap_hwmod *
53  *
54  * The MSDI IP block on OMAP2420 has to have both the POW and CLKD
55  * fields set inside its CON register for a reset to complete
56  * successfully.  This is not documented in the TRM.  For CLKD, we use
57  * the value that results in the lowest possible clock rate, to attempt
58  * to avoid disturbing any cards.
59  */
omap_msdi_reset(struct omap_hwmod * oh)60 int omap_msdi_reset(struct omap_hwmod *oh)
61 {
62 	u16 v = 0;
63 	int c = 0;
64 
65 	/* Write to the SOFTRESET bit */
66 	omap_hwmod_softreset(oh);
67 
68 	/* Enable the MSDI core and internal clock */
69 	v |= MSDI_CON_POW_MASK;
70 	v |= MSDI_TARGET_RESET_CLKD << MSDI_CON_CLKD_SHIFT;
71 	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
72 
73 	/* Poll on RESETDONE bit */
74 	omap_test_timeout((omap_hwmod_read(oh, oh->class->sysc->syss_offs)
75 			   & SYSS_RESETDONE_MASK),
76 			  MAX_MODULE_SOFTRESET_WAIT, c);
77 
78 	if (c == MAX_MODULE_SOFTRESET_WAIT)
79 		pr_warning("%s: %s: softreset failed (waited %d usec)\n",
80 			   __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT);
81 	else
82 		pr_debug("%s: %s: softreset in %d usec\n", __func__,
83 			 oh->name, c);
84 
85 	/* Disable the MSDI internal clock */
86 	v &= ~MSDI_CON_CLKD_MASK;
87 	omap_hwmod_write(v, oh, MSDI_CON_OFFSET);
88 
89 	return 0;
90 }
91 
92 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE)
93 
omap242x_mmc_mux(struct omap_mmc_platform_data * mmc_controller)94 static inline void omap242x_mmc_mux(struct omap_mmc_platform_data
95 				    *mmc_controller)
96 {
97 	if ((mmc_controller->slots[0].switch_pin > 0) && \
98 		(mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
99 		omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
100 					OMAP_PIN_INPUT_PULLUP);
101 	if ((mmc_controller->slots[0].gpio_wp > 0) && \
102 		(mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
103 		omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
104 					OMAP_PIN_INPUT_PULLUP);
105 
106 	omap_mux_init_signal("sdmmc_cmd", 0);
107 	omap_mux_init_signal("sdmmc_clki", 0);
108 	omap_mux_init_signal("sdmmc_clko", 0);
109 	omap_mux_init_signal("sdmmc_dat0", 0);
110 	omap_mux_init_signal("sdmmc_dat_dir0", 0);
111 	omap_mux_init_signal("sdmmc_cmd_dir", 0);
112 	if (mmc_controller->slots[0].caps & MMC_CAP_4_BIT_DATA) {
113 		omap_mux_init_signal("sdmmc_dat1", 0);
114 		omap_mux_init_signal("sdmmc_dat2", 0);
115 		omap_mux_init_signal("sdmmc_dat3", 0);
116 		omap_mux_init_signal("sdmmc_dat_dir1", 0);
117 		omap_mux_init_signal("sdmmc_dat_dir2", 0);
118 		omap_mux_init_signal("sdmmc_dat_dir3", 0);
119 	}
120 
121 	/*
122 	 * Use internal loop-back in MMC/SDIO Module Input Clock
123 	 * selection
124 	 */
125 	if (mmc_controller->slots[0].internal_clock) {
126 		u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
127 		v |= (1 << 24);
128 		omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
129 	}
130 }
131 
omap242x_init_mmc(struct omap_mmc_platform_data ** mmc_data)132 void __init omap242x_init_mmc(struct omap_mmc_platform_data **mmc_data)
133 {
134 	struct platform_device *pdev;
135 	struct omap_hwmod *oh;
136 	int id = 0;
137 	char *oh_name = "msdi1";
138 	char *dev_name = "mmci-omap";
139 
140 	if (!mmc_data[0]) {
141 		pr_err("%s fails: Incomplete platform data\n", __func__);
142 		return;
143 	}
144 
145 	omap242x_mmc_mux(mmc_data[0]);
146 
147 	oh = omap_hwmod_lookup(oh_name);
148 	if (!oh) {
149 		pr_err("Could not look up %s\n", oh_name);
150 		return;
151 	}
152 	pdev = omap_device_build(dev_name, id, oh, mmc_data[0],
153 				 sizeof(struct omap_mmc_platform_data));
154 	if (IS_ERR(pdev))
155 		WARN(1, "Can'd build omap_device for %s:%s.\n",
156 					dev_name, oh->name);
157 }
158 
159 #endif
160