1 /* 2 * omap_hwmod macros, structures 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011-2012 Texas Instruments, Inc. 6 * Paul Walmsley 7 * 8 * Created in collaboration with (alphabetical order): Benoît Cousson, 9 * Kevin Hilman, Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari 10 * Poussa, Anand Sawant, Santosh Shilimkar, Richard Woodruff 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License version 2 as 14 * published by the Free Software Foundation. 15 * 16 * These headers and macros are used to define OMAP on-chip module 17 * data and their integration with other OMAP modules and Linux. 18 * Copious documentation and references can also be found in the 19 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this 20 * writing). 21 * 22 * To do: 23 * - add interconnect error log structures 24 * - add pinmuxing 25 * - init_conn_id_bit (CONNID_BIT_VECTOR) 26 * - implement default hwmod SMS/SDRC flags? 27 * - move Linux-specific data ("non-ROM data") out 28 * 29 */ 30 #ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 31 #define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_OMAP_HWMOD_H 32 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/list.h> 36 #include <linux/ioport.h> 37 #include <linux/spinlock.h> 38 39 struct omap_device; 40 41 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type1; 42 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; 43 extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type3; 44 45 /* 46 * OCP SYSCONFIG bit shifts/masks TYPE1. These are for IPs compliant 47 * with the original PRCM protocol defined for OMAP2420 48 */ 49 #define SYSC_TYPE1_MIDLEMODE_SHIFT 12 50 #define SYSC_TYPE1_MIDLEMODE_MASK (0x3 << SYSC_TYPE1_MIDLEMODE_SHIFT) 51 #define SYSC_TYPE1_CLOCKACTIVITY_SHIFT 8 52 #define SYSC_TYPE1_CLOCKACTIVITY_MASK (0x3 << SYSC_TYPE1_CLOCKACTIVITY_SHIFT) 53 #define SYSC_TYPE1_SIDLEMODE_SHIFT 3 54 #define SYSC_TYPE1_SIDLEMODE_MASK (0x3 << SYSC_TYPE1_SIDLEMODE_SHIFT) 55 #define SYSC_TYPE1_ENAWAKEUP_SHIFT 2 56 #define SYSC_TYPE1_ENAWAKEUP_MASK (1 << SYSC_TYPE1_ENAWAKEUP_SHIFT) 57 #define SYSC_TYPE1_SOFTRESET_SHIFT 1 58 #define SYSC_TYPE1_SOFTRESET_MASK (1 << SYSC_TYPE1_SOFTRESET_SHIFT) 59 #define SYSC_TYPE1_AUTOIDLE_SHIFT 0 60 #define SYSC_TYPE1_AUTOIDLE_MASK (1 << SYSC_TYPE1_AUTOIDLE_SHIFT) 61 62 /* 63 * OCP SYSCONFIG bit shifts/masks TYPE2. These are for IPs compliant 64 * with the new PRCM protocol defined for new OMAP4 IPs. 65 */ 66 #define SYSC_TYPE2_SOFTRESET_SHIFT 0 67 #define SYSC_TYPE2_SOFTRESET_MASK (1 << SYSC_TYPE2_SOFTRESET_SHIFT) 68 #define SYSC_TYPE2_SIDLEMODE_SHIFT 2 69 #define SYSC_TYPE2_SIDLEMODE_MASK (0x3 << SYSC_TYPE2_SIDLEMODE_SHIFT) 70 #define SYSC_TYPE2_MIDLEMODE_SHIFT 4 71 #define SYSC_TYPE2_MIDLEMODE_MASK (0x3 << SYSC_TYPE2_MIDLEMODE_SHIFT) 72 #define SYSC_TYPE2_DMADISABLE_SHIFT 16 73 #define SYSC_TYPE2_DMADISABLE_MASK (0x1 << SYSC_TYPE2_DMADISABLE_SHIFT) 74 75 /* 76 * OCP SYSCONFIG bit shifts/masks TYPE3. 77 * This is applicable for some IPs present in AM33XX 78 */ 79 #define SYSC_TYPE3_SIDLEMODE_SHIFT 0 80 #define SYSC_TYPE3_SIDLEMODE_MASK (0x3 << SYSC_TYPE3_SIDLEMODE_SHIFT) 81 #define SYSC_TYPE3_MIDLEMODE_SHIFT 2 82 #define SYSC_TYPE3_MIDLEMODE_MASK (0x3 << SYSC_TYPE3_MIDLEMODE_SHIFT) 83 84 /* OCP SYSSTATUS bit shifts/masks */ 85 #define SYSS_RESETDONE_SHIFT 0 86 #define SYSS_RESETDONE_MASK (1 << SYSS_RESETDONE_SHIFT) 87 88 /* Master standby/slave idle mode flags */ 89 #define HWMOD_IDLEMODE_FORCE (1 << 0) 90 #define HWMOD_IDLEMODE_NO (1 << 1) 91 #define HWMOD_IDLEMODE_SMART (1 << 2) 92 #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) 93 94 /* modulemode control type (SW or HW) */ 95 #define MODULEMODE_HWCTRL 1 96 #define MODULEMODE_SWCTRL 2 97 98 99 /** 100 * struct omap_hwmod_mux_info - hwmod specific mux configuration 101 * @pads: array of omap_device_pad entries 102 * @nr_pads: number of omap_device_pad entries 103 * 104 * Note that this is currently built during init as needed. 105 */ 106 struct omap_hwmod_mux_info { 107 int nr_pads; 108 struct omap_device_pad *pads; 109 int nr_pads_dynamic; 110 struct omap_device_pad **pads_dynamic; 111 int *irqs; 112 bool enabled; 113 }; 114 115 /** 116 * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod 117 * @name: name of the IRQ channel (module local name) 118 * @irq: IRQ channel ID (should be non-negative except -1 = terminator) 119 * 120 * @name should be something short, e.g., "tx" or "rx". It is for use 121 * by platform_get_resource_byname(). It is defined locally to the 122 * hwmod. 123 */ 124 struct omap_hwmod_irq_info { 125 const char *name; 126 s16 irq; 127 }; 128 129 /** 130 * struct omap_hwmod_dma_info - DMA channels used by the hwmod 131 * @name: name of the DMA channel (module local name) 132 * @dma_req: DMA request ID (should be non-negative except -1 = terminator) 133 * 134 * @name should be something short, e.g., "tx" or "rx". It is for use 135 * by platform_get_resource_byname(). It is defined locally to the 136 * hwmod. 137 */ 138 struct omap_hwmod_dma_info { 139 const char *name; 140 s16 dma_req; 141 }; 142 143 /** 144 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod 145 * @name: name of the reset line (module local name) 146 * @rst_shift: Offset of the reset bit 147 * @st_shift: Offset of the reset status bit (OMAP2/3 only) 148 * 149 * @name should be something short, e.g., "cpu0" or "rst". It is defined 150 * locally to the hwmod. 151 */ 152 struct omap_hwmod_rst_info { 153 const char *name; 154 u8 rst_shift; 155 u8 st_shift; 156 }; 157 158 /** 159 * struct omap_hwmod_opt_clk - optional clocks used by this hwmod 160 * @role: "sys", "32k", "tv", etc -- for use in clk_get() 161 * @clk: opt clock: OMAP clock name 162 * @_clk: pointer to the struct clk (filled in at runtime) 163 * 164 * The module's interface clock and main functional clock should not 165 * be added as optional clocks. 166 */ 167 struct omap_hwmod_opt_clk { 168 const char *role; 169 const char *clk; 170 struct clk *_clk; 171 }; 172 173 174 /* omap_hwmod_omap2_firewall.flags bits */ 175 #define OMAP_FIREWALL_L3 (1 << 0) 176 #define OMAP_FIREWALL_L4 (1 << 1) 177 178 /** 179 * struct omap_hwmod_omap2_firewall - OMAP2/3 device firewall data 180 * @l3_perm_bit: bit shift for L3_PM_*_PERMISSION_* 181 * @l4_fw_region: L4 firewall region ID 182 * @l4_prot_group: L4 protection group ID 183 * @flags: (see omap_hwmod_omap2_firewall.flags macros above) 184 */ 185 struct omap_hwmod_omap2_firewall { 186 u8 l3_perm_bit; 187 u8 l4_fw_region; 188 u8 l4_prot_group; 189 u8 flags; 190 }; 191 192 193 /* 194 * omap_hwmod_addr_space.flags bits 195 * 196 * ADDR_MAP_ON_INIT: Map this address space during omap_hwmod init. 197 * ADDR_TYPE_RT: Address space contains module register target data. 198 */ 199 #define ADDR_MAP_ON_INIT (1 << 0) /* XXX does not belong */ 200 #define ADDR_TYPE_RT (1 << 1) 201 202 /** 203 * struct omap_hwmod_addr_space - address space handled by the hwmod 204 * @name: name of the address space 205 * @pa_start: starting physical address 206 * @pa_end: ending physical address 207 * @flags: (see omap_hwmod_addr_space.flags macros above) 208 * 209 * Address space doesn't necessarily follow physical interconnect 210 * structure. GPMC is one example. 211 */ 212 struct omap_hwmod_addr_space { 213 const char *name; 214 u32 pa_start; 215 u32 pa_end; 216 u8 flags; 217 }; 218 219 220 /* 221 * omap_hwmod_ocp_if.user bits: these indicate the initiators that use this 222 * interface to interact with the hwmod. Used to add sleep dependencies 223 * when the module is enabled or disabled. 224 */ 225 #define OCP_USER_MPU (1 << 0) 226 #define OCP_USER_SDMA (1 << 1) 227 #define OCP_USER_DSP (1 << 2) 228 #define OCP_USER_IVA (1 << 3) 229 230 /* omap_hwmod_ocp_if.flags bits */ 231 #define OCPIF_SWSUP_IDLE (1 << 0) 232 #define OCPIF_CAN_BURST (1 << 1) 233 234 /* omap_hwmod_ocp_if._int_flags possibilities */ 235 #define _OCPIF_INT_FLAGS_REGISTERED (1 << 0) 236 237 238 /** 239 * struct omap_hwmod_ocp_if - OCP interface data 240 * @master: struct omap_hwmod that initiates OCP transactions on this link 241 * @slave: struct omap_hwmod that responds to OCP transactions on this link 242 * @addr: address space associated with this link 243 * @clk: interface clock: OMAP clock name 244 * @_clk: pointer to the interface struct clk (filled in at runtime) 245 * @fw: interface firewall data 246 * @width: OCP data width 247 * @user: initiators using this interface (see OCP_USER_* macros above) 248 * @flags: OCP interface flags (see OCPIF_* macros above) 249 * @_int_flags: internal flags (see _OCPIF_INT_FLAGS* macros above) 250 * 251 * It may also be useful to add a tag_cnt field for OCP2.x devices. 252 * 253 * Parameter names beginning with an underscore are managed internally by 254 * the omap_hwmod code and should not be set during initialization. 255 */ 256 struct omap_hwmod_ocp_if { 257 struct omap_hwmod *master; 258 struct omap_hwmod *slave; 259 struct omap_hwmod_addr_space *addr; 260 const char *clk; 261 struct clk *_clk; 262 union { 263 struct omap_hwmod_omap2_firewall omap2; 264 } fw; 265 u8 width; 266 u8 user; 267 u8 flags; 268 u8 _int_flags; 269 }; 270 271 272 /* Macros for use in struct omap_hwmod_sysconfig */ 273 274 /* Flags for use in omap_hwmod_sysconfig.idlemodes */ 275 #define MASTER_STANDBY_SHIFT 4 276 #define SLAVE_IDLE_SHIFT 0 277 #define SIDLE_FORCE (HWMOD_IDLEMODE_FORCE << SLAVE_IDLE_SHIFT) 278 #define SIDLE_NO (HWMOD_IDLEMODE_NO << SLAVE_IDLE_SHIFT) 279 #define SIDLE_SMART (HWMOD_IDLEMODE_SMART << SLAVE_IDLE_SHIFT) 280 #define SIDLE_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << SLAVE_IDLE_SHIFT) 281 #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) 282 #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) 283 #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) 284 #define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) 285 286 /* omap_hwmod_sysconfig.sysc_flags capability flags */ 287 #define SYSC_HAS_AUTOIDLE (1 << 0) 288 #define SYSC_HAS_SOFTRESET (1 << 1) 289 #define SYSC_HAS_ENAWAKEUP (1 << 2) 290 #define SYSC_HAS_EMUFREE (1 << 3) 291 #define SYSC_HAS_CLOCKACTIVITY (1 << 4) 292 #define SYSC_HAS_SIDLEMODE (1 << 5) 293 #define SYSC_HAS_MIDLEMODE (1 << 6) 294 #define SYSS_HAS_RESET_STATUS (1 << 7) 295 #define SYSC_NO_CACHE (1 << 8) /* XXX SW flag, belongs elsewhere */ 296 #define SYSC_HAS_RESET_STATUS (1 << 9) 297 #define SYSC_HAS_DMADISABLE (1 << 10) 298 299 /* omap_hwmod_sysconfig.clockact flags */ 300 #define CLOCKACT_TEST_BOTH 0x0 301 #define CLOCKACT_TEST_MAIN 0x1 302 #define CLOCKACT_TEST_ICLK 0x2 303 #define CLOCKACT_TEST_NONE 0x3 304 305 /** 306 * struct omap_hwmod_sysc_fields - hwmod OCP_SYSCONFIG register field offsets. 307 * @midle_shift: Offset of the midle bit 308 * @clkact_shift: Offset of the clockactivity bit 309 * @sidle_shift: Offset of the sidle bit 310 * @enwkup_shift: Offset of the enawakeup bit 311 * @srst_shift: Offset of the softreset bit 312 * @autoidle_shift: Offset of the autoidle bit 313 * @dmadisable_shift: Offset of the dmadisable bit 314 */ 315 struct omap_hwmod_sysc_fields { 316 u8 midle_shift; 317 u8 clkact_shift; 318 u8 sidle_shift; 319 u8 enwkup_shift; 320 u8 srst_shift; 321 u8 autoidle_shift; 322 u8 dmadisable_shift; 323 }; 324 325 /** 326 * struct omap_hwmod_class_sysconfig - hwmod class OCP_SYS* data 327 * @rev_offs: IP block revision register offset (from module base addr) 328 * @sysc_offs: OCP_SYSCONFIG register offset (from module base addr) 329 * @syss_offs: OCP_SYSSTATUS register offset (from module base addr) 330 * @srst_udelay: Delay needed after doing a softreset in usecs 331 * @idlemodes: One or more of {SIDLE,MSTANDBY}_{OFF,FORCE,SMART} 332 * @sysc_flags: SYS{C,S}_HAS* flags indicating SYSCONFIG bits supported 333 * @clockact: the default value of the module CLOCKACTIVITY bits 334 * 335 * @clockact describes to the module which clocks are likely to be 336 * disabled when the PRCM issues its idle request to the module. Some 337 * modules have separate clockdomains for the interface clock and main 338 * functional clock, and can check whether they should acknowledge the 339 * idle request based on the internal module functionality that has 340 * been associated with the clocks marked in @clockact. This field is 341 * only used if HWMOD_SET_DEFAULT_CLOCKACT is set (see below) 342 * 343 * @sysc_fields: structure containing the offset positions of various bits in 344 * SYSCONFIG register. This can be populated using omap_hwmod_sysc_type1 or 345 * omap_hwmod_sysc_type2 defined in omap_hwmod_common_data.c depending on 346 * whether the device ip is compliant with the original PRCM protocol 347 * defined for OMAP2420 or the new PRCM protocol for new OMAP4 IPs. 348 * If the device follows a different scheme for the sysconfig register , 349 * then this field has to be populated with the correct offset structure. 350 */ 351 struct omap_hwmod_class_sysconfig { 352 u32 rev_offs; 353 u32 sysc_offs; 354 u32 syss_offs; 355 u16 sysc_flags; 356 struct omap_hwmod_sysc_fields *sysc_fields; 357 u8 srst_udelay; 358 u8 idlemodes; 359 u8 clockact; 360 }; 361 362 /** 363 * struct omap_hwmod_omap2_prcm - OMAP2/3-specific PRCM data 364 * @module_offs: PRCM submodule offset from the start of the PRM/CM 365 * @prcm_reg_id: PRCM register ID (e.g., 3 for CM_AUTOIDLE3) 366 * @module_bit: register bit shift for AUTOIDLE, WKST, WKEN, GRPSEL regs 367 * @idlest_reg_id: IDLEST register ID (e.g., 3 for CM_IDLEST3) 368 * @idlest_idle_bit: register bit shift for CM_IDLEST slave idle bit 369 * @idlest_stdby_bit: register bit shift for CM_IDLEST master standby bit 370 * 371 * @prcm_reg_id and @module_bit are specific to the AUTOIDLE, WKST, 372 * WKEN, GRPSEL registers. In an ideal world, no extra information 373 * would be needed for IDLEST information, but alas, there are some 374 * exceptions, so @idlest_reg_id, @idlest_idle_bit, @idlest_stdby_bit 375 * are needed for the IDLEST registers (c.f. 2430 I2CHS, 3430 USBHOST) 376 */ 377 struct omap_hwmod_omap2_prcm { 378 s16 module_offs; 379 u8 prcm_reg_id; 380 u8 module_bit; 381 u8 idlest_reg_id; 382 u8 idlest_idle_bit; 383 u8 idlest_stdby_bit; 384 }; 385 386 /* 387 * Possible values for struct omap_hwmod_omap4_prcm.flags 388 * 389 * HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT: Some IP blocks don't have a PRCM 390 * module-level context loss register associated with them; this 391 * flag bit should be set in those cases 392 */ 393 #define HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT (1 << 0) 394 395 /** 396 * struct omap_hwmod_omap4_prcm - OMAP4-specific PRCM data 397 * @clkctrl_offs: offset of the PRCM clock control register 398 * @rstctrl_offs: offset of the XXX_RSTCTRL register located in the PRM 399 * @context_offs: offset of the RM_*_CONTEXT register 400 * @lostcontext_mask: bitmask for selecting bits from RM_*_CONTEXT register 401 * @rstst_reg: (AM33XX only) address of the XXX_RSTST register in the PRM 402 * @submodule_wkdep_bit: bit shift of the WKDEP range 403 * @flags: PRCM register capabilities for this IP block 404 * @modulemode: allowable modulemodes 405 * @context_lost_counter: Count of module level context lost 406 * 407 * If @lostcontext_mask is not defined, context loss check code uses 408 * whole register without masking. @lostcontext_mask should only be 409 * defined in cases where @context_offs register is shared by two or 410 * more hwmods. 411 */ 412 struct omap_hwmod_omap4_prcm { 413 u16 clkctrl_offs; 414 u16 rstctrl_offs; 415 u16 rstst_offs; 416 u16 context_offs; 417 u32 lostcontext_mask; 418 u8 submodule_wkdep_bit; 419 u8 modulemode; 420 u8 flags; 421 int context_lost_counter; 422 }; 423 424 425 /* 426 * omap_hwmod.flags definitions 427 * 428 * HWMOD_SWSUP_SIDLE: omap_hwmod code should manually bring module in and out 429 * of idle, rather than relying on module smart-idle 430 * HWMOD_SWSUP_MSTANDBY: omap_hwmod code should manually bring module in and 431 * out of standby, rather than relying on module smart-standby 432 * HWMOD_INIT_NO_RESET: don't reset this module at boot - important for 433 * SDRAM controller, etc. XXX probably belongs outside the main hwmod file 434 * XXX Should be HWMOD_SETUP_NO_RESET 435 * HWMOD_INIT_NO_IDLE: don't idle this module at boot - important for SDRAM 436 * controller, etc. XXX probably belongs outside the main hwmod file 437 * XXX Should be HWMOD_SETUP_NO_IDLE 438 * HWMOD_NO_OCP_AUTOIDLE: disable module autoidle (OCP_SYSCONFIG.AUTOIDLE) 439 * when module is enabled, rather than the default, which is to 440 * enable autoidle 441 * HWMOD_SET_DEFAULT_CLOCKACT: program CLOCKACTIVITY bits at startup 442 * HWMOD_NO_IDLEST: this module does not have idle status - this is the case 443 * only for few initiator modules on OMAP2 & 3. 444 * HWMOD_CONTROL_OPT_CLKS_IN_RESET: Enable all optional clocks during reset. 445 * This is needed for devices like DSS that require optional clocks enabled 446 * in order to complete the reset. Optional clocks will be disabled 447 * again after the reset. 448 * HWMOD_16BIT_REG: Module has 16bit registers 449 * HWMOD_EXT_OPT_MAIN_CLK: The only main functional clock source for 450 * this IP block comes from an off-chip source and is not always 451 * enabled. This prevents the hwmod code from being able to 452 * enable and reset the IP block early. XXX Eventually it should 453 * be possible to query the clock framework for this information. 454 * HWMOD_BLOCK_WFI: Some OMAP peripherals apparently don't work 455 * correctly if the MPU is allowed to go idle while the 456 * peripherals are active. This is apparently true for the I2C on 457 * OMAP2420, and also the EMAC on AM3517/3505. It's unlikely that 458 * this is really true -- we're probably not configuring something 459 * correctly, or this is being abused to deal with some PM latency 460 * issues -- but we're currently suffering from a shortage of 461 * folks who are able to track these issues down properly. 462 * HWMOD_FORCE_MSTANDBY: Always keep MIDLEMODE bits cleared so that device 463 * is kept in force-standby mode. Failing to do so causes PM problems 464 * with musb on OMAP3630 at least. Note that musb has a dedicated register 465 * to control MSTANDBY signal when MIDLEMODE is set to force-standby. 466 * HWMOD_SWSUP_SIDLE_ACT: omap_hwmod code should manually bring the module 467 * out of idle, but rely on smart-idle to the put it back in idle, 468 * so the wakeups are still functional (Only known case for now is UART) 469 */ 470 #define HWMOD_SWSUP_SIDLE (1 << 0) 471 #define HWMOD_SWSUP_MSTANDBY (1 << 1) 472 #define HWMOD_INIT_NO_RESET (1 << 2) 473 #define HWMOD_INIT_NO_IDLE (1 << 3) 474 #define HWMOD_NO_OCP_AUTOIDLE (1 << 4) 475 #define HWMOD_SET_DEFAULT_CLOCKACT (1 << 5) 476 #define HWMOD_NO_IDLEST (1 << 6) 477 #define HWMOD_CONTROL_OPT_CLKS_IN_RESET (1 << 7) 478 #define HWMOD_16BIT_REG (1 << 8) 479 #define HWMOD_EXT_OPT_MAIN_CLK (1 << 9) 480 #define HWMOD_BLOCK_WFI (1 << 10) 481 #define HWMOD_FORCE_MSTANDBY (1 << 11) 482 #define HWMOD_SWSUP_SIDLE_ACT (1 << 12) 483 484 /* 485 * omap_hwmod._int_flags definitions 486 * These are for internal use only and are managed by the omap_hwmod code. 487 * 488 * _HWMOD_NO_MPU_PORT: no path exists for the MPU to write to this module 489 * _HWMOD_SYSCONFIG_LOADED: set when the OCP_SYSCONFIG value has been cached 490 * _HWMOD_SKIP_ENABLE: set if hwmod enabled during init (HWMOD_INIT_NO_IDLE) - 491 * causes the first call to _enable() to only update the pinmux 492 */ 493 #define _HWMOD_NO_MPU_PORT (1 << 0) 494 #define _HWMOD_SYSCONFIG_LOADED (1 << 1) 495 #define _HWMOD_SKIP_ENABLE (1 << 2) 496 497 /* 498 * omap_hwmod._state definitions 499 * 500 * INITIALIZED: reset (optionally), initialized, enabled, disabled 501 * (optionally) 502 * 503 * 504 */ 505 #define _HWMOD_STATE_UNKNOWN 0 506 #define _HWMOD_STATE_REGISTERED 1 507 #define _HWMOD_STATE_CLKS_INITED 2 508 #define _HWMOD_STATE_INITIALIZED 3 509 #define _HWMOD_STATE_ENABLED 4 510 #define _HWMOD_STATE_IDLE 5 511 #define _HWMOD_STATE_DISABLED 6 512 513 /** 514 * struct omap_hwmod_class - the type of an IP block 515 * @name: name of the hwmod_class 516 * @sysc: device SYSCONFIG/SYSSTATUS register data 517 * @rev: revision of the IP class 518 * @pre_shutdown: ptr to fn to be executed immediately prior to device shutdown 519 * @reset: ptr to fn to be executed in place of the standard hwmod reset fn 520 * @enable_preprogram: ptr to fn to be executed during device enable 521 * 522 * Represent the class of a OMAP hardware "modules" (e.g. timer, 523 * smartreflex, gpio, uart...) 524 * 525 * @pre_shutdown is a function that will be run immediately before 526 * hwmod clocks are disabled, etc. It is intended for use for hwmods 527 * like the MPU watchdog, which cannot be disabled with the standard 528 * omap_hwmod_shutdown(). The function should return 0 upon success, 529 * or some negative error upon failure. Returning an error will cause 530 * omap_hwmod_shutdown() to abort the device shutdown and return an 531 * error. 532 * 533 * If @reset is defined, then the function it points to will be 534 * executed in place of the standard hwmod _reset() code in 535 * mach-omap2/omap_hwmod.c. This is needed for IP blocks which have 536 * unusual reset sequences - usually processor IP blocks like the IVA. 537 */ 538 struct omap_hwmod_class { 539 const char *name; 540 struct omap_hwmod_class_sysconfig *sysc; 541 u32 rev; 542 int (*pre_shutdown)(struct omap_hwmod *oh); 543 int (*reset)(struct omap_hwmod *oh); 544 int (*enable_preprogram)(struct omap_hwmod *oh); 545 }; 546 547 /** 548 * struct omap_hwmod_link - internal structure linking hwmods with ocp_ifs 549 * @ocp_if: OCP interface structure record pointer 550 * @node: list_head pointing to next struct omap_hwmod_link in a list 551 */ 552 struct omap_hwmod_link { 553 struct omap_hwmod_ocp_if *ocp_if; 554 struct list_head node; 555 }; 556 557 /** 558 * struct omap_hwmod - integration data for OMAP hardware "modules" (IP blocks) 559 * @name: name of the hwmod 560 * @class: struct omap_hwmod_class * to the class of this hwmod 561 * @od: struct omap_device currently associated with this hwmod (internal use) 562 * @mpu_irqs: ptr to an array of MPU IRQs 563 * @sdma_reqs: ptr to an array of System DMA request IDs 564 * @prcm: PRCM data pertaining to this hwmod 565 * @main_clk: main clock: OMAP clock name 566 * @_clk: pointer to the main struct clk (filled in at runtime) 567 * @opt_clks: other device clocks that drivers can request (0..*) 568 * @voltdm: pointer to voltage domain (filled in at runtime) 569 * @dev_attr: arbitrary device attributes that can be passed to the driver 570 * @_sysc_cache: internal-use hwmod flags 571 * @_mpu_rt_va: cached register target start address (internal use) 572 * @_mpu_port: cached MPU register target slave (internal use) 573 * @opt_clks_cnt: number of @opt_clks 574 * @master_cnt: number of @master entries 575 * @slaves_cnt: number of @slave entries 576 * @response_lat: device OCP response latency (in interface clock cycles) 577 * @_int_flags: internal-use hwmod flags 578 * @_state: internal-use hwmod state 579 * @_postsetup_state: internal-use state to leave the hwmod in after _setup() 580 * @flags: hwmod flags (documented below) 581 * @_lock: spinlock serializing operations on this hwmod 582 * @node: list node for hwmod list (internal use) 583 * 584 * @main_clk refers to this module's "main clock," which for our 585 * purposes is defined as "the functional clock needed for register 586 * accesses to complete." Modules may not have a main clock if the 587 * interface clock also serves as a main clock. 588 * 589 * Parameter names beginning with an underscore are managed internally by 590 * the omap_hwmod code and should not be set during initialization. 591 * 592 * @masters and @slaves are now deprecated. 593 */ 594 struct omap_hwmod { 595 const char *name; 596 struct omap_hwmod_class *class; 597 struct omap_device *od; 598 struct omap_hwmod_mux_info *mux; 599 struct omap_hwmod_irq_info *mpu_irqs; 600 struct omap_hwmod_dma_info *sdma_reqs; 601 struct omap_hwmod_rst_info *rst_lines; 602 union { 603 struct omap_hwmod_omap2_prcm omap2; 604 struct omap_hwmod_omap4_prcm omap4; 605 } prcm; 606 const char *main_clk; 607 struct clk *_clk; 608 struct omap_hwmod_opt_clk *opt_clks; 609 char *clkdm_name; 610 struct clockdomain *clkdm; 611 struct list_head master_ports; /* connect to *_IA */ 612 struct list_head slave_ports; /* connect to *_TA */ 613 void *dev_attr; 614 u32 _sysc_cache; 615 void __iomem *_mpu_rt_va; 616 spinlock_t _lock; 617 struct list_head node; 618 struct omap_hwmod_ocp_if *_mpu_port; 619 u16 flags; 620 u8 response_lat; 621 u8 rst_lines_cnt; 622 u8 opt_clks_cnt; 623 u8 masters_cnt; 624 u8 slaves_cnt; 625 u8 hwmods_cnt; 626 u8 _int_flags; 627 u8 _state; 628 u8 _postsetup_state; 629 }; 630 631 struct omap_hwmod *omap_hwmod_lookup(const char *name); 632 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 633 void *data); 634 635 int __init omap_hwmod_setup_one(const char *name); 636 637 int omap_hwmod_enable(struct omap_hwmod *oh); 638 int omap_hwmod_idle(struct omap_hwmod *oh); 639 int omap_hwmod_shutdown(struct omap_hwmod *oh); 640 641 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name); 642 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name); 643 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name); 644 645 int omap_hwmod_enable_clocks(struct omap_hwmod *oh); 646 int omap_hwmod_disable_clocks(struct omap_hwmod *oh); 647 648 int omap_hwmod_reset(struct omap_hwmod *oh); 649 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); 650 651 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); 652 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); 653 int omap_hwmod_softreset(struct omap_hwmod *oh); 654 655 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags); 656 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); 657 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res); 658 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, 659 const char *name, struct resource *res); 660 661 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh); 662 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh); 663 664 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh, 665 struct omap_hwmod *init_oh); 666 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh, 667 struct omap_hwmod *init_oh); 668 669 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh); 670 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh); 671 672 int omap_hwmod_for_each_by_class(const char *classname, 673 int (*fn)(struct omap_hwmod *oh, 674 void *user), 675 void *user); 676 677 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state); 678 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh); 679 680 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); 681 682 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); 683 684 extern void __init omap_hwmod_init(void); 685 686 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh); 687 688 /* 689 * 690 */ 691 692 extern int omap_hwmod_aess_preprogram(struct omap_hwmod *oh); 693 694 /* 695 * Chip variant-specific hwmod init routines - XXX should be converted 696 * to use initcalls once the initial boot ordering is straightened out 697 */ 698 extern int omap2420_hwmod_init(void); 699 extern int omap2430_hwmod_init(void); 700 extern int omap3xxx_hwmod_init(void); 701 extern int omap44xx_hwmod_init(void); 702 extern int am33xx_hwmod_init(void); 703 704 extern int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois); 705 706 #endif 707