1 /*
2 * NVIDIA Tegra SoC device tree board support
3 *
4 * Copyright (C) 2011, 2013, NVIDIA Corporation
5 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
6 * Copyright (C) 2010 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19 #include <linux/clocksource.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/platform_device.h>
23 #include <linux/serial_8250.h>
24 #include <linux/clk.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/irqdomain.h>
27 #include <linux/of.h>
28 #include <linux/of_address.h>
29 #include <linux/of_fdt.h>
30 #include <linux/of_platform.h>
31 #include <linux/pda_power.h>
32 #include <linux/platform_data/tegra_usb.h>
33 #include <linux/io.h>
34 #include <linux/slab.h>
35 #include <linux/sys_soc.h>
36 #include <linux/usb/tegra_usb_phy.h>
37 #include <linux/clk/tegra.h>
38
39 #include <asm/mach-types.h>
40 #include <asm/mach/arch.h>
41 #include <asm/mach/time.h>
42 #include <asm/setup.h>
43
44 #include "board.h"
45 #include "common.h"
46 #include "fuse.h"
47 #include "iomap.h"
48
49 static struct tegra_ehci_platform_data tegra_ehci1_pdata = {
50 .operating_mode = TEGRA_USB_OTG,
51 .power_down_on_bus_suspend = 1,
52 .vbus_gpio = -1,
53 };
54
55 static struct tegra_ulpi_config tegra_ehci2_ulpi_phy_config = {
56 .reset_gpio = -1,
57 .clk = "cdev2",
58 };
59
60 static struct tegra_ehci_platform_data tegra_ehci2_pdata = {
61 .phy_config = &tegra_ehci2_ulpi_phy_config,
62 .operating_mode = TEGRA_USB_HOST,
63 .power_down_on_bus_suspend = 1,
64 .vbus_gpio = -1,
65 };
66
67 static struct tegra_ehci_platform_data tegra_ehci3_pdata = {
68 .operating_mode = TEGRA_USB_HOST,
69 .power_down_on_bus_suspend = 1,
70 .vbus_gpio = -1,
71 };
72
73 static struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = {
74 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5000000, "tegra-ehci.0",
75 &tegra_ehci1_pdata),
76 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5004000, "tegra-ehci.1",
77 &tegra_ehci2_pdata),
78 OF_DEV_AUXDATA("nvidia,tegra20-ehci", 0xC5008000, "tegra-ehci.2",
79 &tegra_ehci3_pdata),
80 {}
81 };
82
tegra_dt_init(void)83 static void __init tegra_dt_init(void)
84 {
85 struct soc_device_attribute *soc_dev_attr;
86 struct soc_device *soc_dev;
87 struct device *parent = NULL;
88
89 tegra_clocks_apply_init_table();
90
91 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
92 if (!soc_dev_attr)
93 goto out;
94
95 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
96 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d", tegra_revision);
97 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%d", tegra_chip_id);
98
99 soc_dev = soc_device_register(soc_dev_attr);
100 if (IS_ERR(soc_dev)) {
101 kfree(soc_dev_attr->family);
102 kfree(soc_dev_attr->revision);
103 kfree(soc_dev_attr->soc_id);
104 kfree(soc_dev_attr);
105 goto out;
106 }
107
108 parent = soc_device_to_device(soc_dev);
109
110 /*
111 * Finished with the static registrations now; fill in the missing
112 * devices
113 */
114 out:
115 of_platform_populate(NULL, of_default_bus_match_table,
116 tegra20_auxdata_lookup, parent);
117 }
118
trimslice_init(void)119 static void __init trimslice_init(void)
120 {
121 #ifdef CONFIG_TEGRA_PCI
122 int ret;
123
124 ret = tegra_pcie_init(true, true);
125 if (ret)
126 pr_err("tegra_pci_init() failed: %d\n", ret);
127 #endif
128 }
129
harmony_init(void)130 static void __init harmony_init(void)
131 {
132 #ifdef CONFIG_TEGRA_PCI
133 int ret;
134
135 ret = harmony_pcie_init();
136 if (ret)
137 pr_err("harmony_pcie_init() failed: %d\n", ret);
138 #endif
139 }
140
paz00_init(void)141 static void __init paz00_init(void)
142 {
143 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
144 tegra_paz00_wifikill_init();
145 }
146
147 static struct {
148 char *machine;
149 void (*init)(void);
150 } board_init_funcs[] = {
151 { "compulab,trimslice", trimslice_init },
152 { "nvidia,harmony", harmony_init },
153 { "compal,paz00", paz00_init },
154 };
155
tegra_dt_init_late(void)156 static void __init tegra_dt_init_late(void)
157 {
158 int i;
159
160 tegra_init_late();
161
162 for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
163 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
164 board_init_funcs[i].init();
165 break;
166 }
167 }
168 }
169
170 static const char * const tegra_dt_board_compat[] = {
171 "nvidia,tegra114",
172 "nvidia,tegra30",
173 "nvidia,tegra20",
174 NULL
175 };
176
177 DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
178 .map_io = tegra_map_common_io,
179 .smp = smp_ops(tegra_smp_ops),
180 .init_early = tegra_init_early,
181 .init_irq = tegra_dt_init_irq,
182 .init_time = clocksource_of_init,
183 .init_machine = tegra_dt_init,
184 .init_late = tegra_dt_init_late,
185 .restart = tegra_assert_system_reset,
186 .dt_compat = tegra_dt_board_compat,
187 MACHINE_END
188