1/* 2 * MPC8560 ADS Device Tree Source 3 * 4 * Copyright 2006, 2008 Freescale Semiconductor Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; either version 2 of the License, or (at your 9 * option) any later version. 10 */ 11 12/dts-v1/; 13 14/include/ "fsl/e500v2_power_isa.dtsi" 15 16/ { 17 model = "MPC8560ADS"; 18 compatible = "MPC8560ADS", "MPC85xxADS"; 19 #address-cells = <1>; 20 #size-cells = <1>; 21 22 aliases { 23 ethernet0 = &enet0; 24 ethernet1 = &enet1; 25 ethernet2 = &enet2; 26 ethernet3 = &enet3; 27 serial0 = &serial0; 28 serial1 = &serial1; 29 pci0 = &pci0; 30 }; 31 32 cpus { 33 #address-cells = <1>; 34 #size-cells = <0>; 35 36 PowerPC,8560@0 { 37 device_type = "cpu"; 38 reg = <0x0>; 39 d-cache-line-size = <32>; // 32 bytes 40 i-cache-line-size = <32>; // 32 bytes 41 d-cache-size = <0x8000>; // L1, 32K 42 i-cache-size = <0x8000>; // L1, 32K 43 timebase-frequency = <82500000>; 44 bus-frequency = <330000000>; 45 clock-frequency = <825000000>; 46 }; 47 }; 48 49 memory { 50 device_type = "memory"; 51 reg = <0x0 0x10000000>; 52 }; 53 54 soc8560@e0000000 { 55 #address-cells = <1>; 56 #size-cells = <1>; 57 device_type = "soc"; 58 compatible = "simple-bus"; 59 ranges = <0x0 0xe0000000 0x100000>; 60 bus-frequency = <330000000>; 61 62 ecm-law@0 { 63 compatible = "fsl,ecm-law"; 64 reg = <0x0 0x1000>; 65 fsl,num-laws = <8>; 66 }; 67 68 ecm@1000 { 69 compatible = "fsl,mpc8560-ecm", "fsl,ecm"; 70 reg = <0x1000 0x1000>; 71 interrupts = <17 2>; 72 interrupt-parent = <&mpic>; 73 }; 74 75 memory-controller@2000 { 76 compatible = "fsl,mpc8540-memory-controller"; 77 reg = <0x2000 0x1000>; 78 interrupt-parent = <&mpic>; 79 interrupts = <18 2>; 80 }; 81 82 L2: l2-cache-controller@20000 { 83 compatible = "fsl,mpc8540-l2-cache-controller"; 84 reg = <0x20000 0x1000>; 85 cache-line-size = <32>; // 32 bytes 86 cache-size = <0x40000>; // L2, 256K 87 interrupt-parent = <&mpic>; 88 interrupts = <16 2>; 89 }; 90 91 dma@21300 { 92 #address-cells = <1>; 93 #size-cells = <1>; 94 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; 95 reg = <0x21300 0x4>; 96 ranges = <0x0 0x21100 0x200>; 97 cell-index = <0>; 98 dma-channel@0 { 99 compatible = "fsl,mpc8560-dma-channel", 100 "fsl,eloplus-dma-channel"; 101 reg = <0x0 0x80>; 102 cell-index = <0>; 103 interrupt-parent = <&mpic>; 104 interrupts = <20 2>; 105 }; 106 dma-channel@80 { 107 compatible = "fsl,mpc8560-dma-channel", 108 "fsl,eloplus-dma-channel"; 109 reg = <0x80 0x80>; 110 cell-index = <1>; 111 interrupt-parent = <&mpic>; 112 interrupts = <21 2>; 113 }; 114 dma-channel@100 { 115 compatible = "fsl,mpc8560-dma-channel", 116 "fsl,eloplus-dma-channel"; 117 reg = <0x100 0x80>; 118 cell-index = <2>; 119 interrupt-parent = <&mpic>; 120 interrupts = <22 2>; 121 }; 122 dma-channel@180 { 123 compatible = "fsl,mpc8560-dma-channel", 124 "fsl,eloplus-dma-channel"; 125 reg = <0x180 0x80>; 126 cell-index = <3>; 127 interrupt-parent = <&mpic>; 128 interrupts = <23 2>; 129 }; 130 }; 131 132 enet0: ethernet@24000 { 133 #address-cells = <1>; 134 #size-cells = <1>; 135 cell-index = <0>; 136 device_type = "network"; 137 model = "TSEC"; 138 compatible = "gianfar"; 139 reg = <0x24000 0x1000>; 140 ranges = <0x0 0x24000 0x1000>; 141 local-mac-address = [ 00 00 00 00 00 00 ]; 142 interrupts = <29 2 30 2 34 2>; 143 interrupt-parent = <&mpic>; 144 tbi-handle = <&tbi0>; 145 phy-handle = <&phy0>; 146 147 mdio@520 { 148 #address-cells = <1>; 149 #size-cells = <0>; 150 compatible = "fsl,gianfar-mdio"; 151 reg = <0x520 0x20>; 152 153 phy0: ethernet-phy@0 { 154 interrupt-parent = <&mpic>; 155 interrupts = <5 1>; 156 reg = <0x0>; 157 device_type = "ethernet-phy"; 158 }; 159 phy1: ethernet-phy@1 { 160 interrupt-parent = <&mpic>; 161 interrupts = <5 1>; 162 reg = <0x1>; 163 device_type = "ethernet-phy"; 164 }; 165 phy2: ethernet-phy@2 { 166 interrupt-parent = <&mpic>; 167 interrupts = <7 1>; 168 reg = <0x2>; 169 device_type = "ethernet-phy"; 170 }; 171 phy3: ethernet-phy@3 { 172 interrupt-parent = <&mpic>; 173 interrupts = <7 1>; 174 reg = <0x3>; 175 device_type = "ethernet-phy"; 176 }; 177 tbi0: tbi-phy@11 { 178 reg = <0x11>; 179 device_type = "tbi-phy"; 180 }; 181 }; 182 }; 183 184 enet1: ethernet@25000 { 185 #address-cells = <1>; 186 #size-cells = <1>; 187 cell-index = <1>; 188 device_type = "network"; 189 model = "TSEC"; 190 compatible = "gianfar"; 191 reg = <0x25000 0x1000>; 192 ranges = <0x0 0x25000 0x1000>; 193 local-mac-address = [ 00 00 00 00 00 00 ]; 194 interrupts = <35 2 36 2 40 2>; 195 interrupt-parent = <&mpic>; 196 tbi-handle = <&tbi1>; 197 phy-handle = <&phy1>; 198 199 mdio@520 { 200 #address-cells = <1>; 201 #size-cells = <0>; 202 compatible = "fsl,gianfar-tbi"; 203 reg = <0x520 0x20>; 204 205 tbi1: tbi-phy@11 { 206 reg = <0x11>; 207 device_type = "tbi-phy"; 208 }; 209 }; 210 }; 211 212 mpic: pic@40000 { 213 interrupt-controller; 214 #address-cells = <0>; 215 #interrupt-cells = <2>; 216 reg = <0x40000 0x40000>; 217 compatible = "chrp,open-pic"; 218 device_type = "open-pic"; 219 }; 220 221 cpm@919c0 { 222 #address-cells = <1>; 223 #size-cells = <1>; 224 compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; 225 reg = <0x919c0 0x30>; 226 ranges; 227 228 muram@80000 { 229 #address-cells = <1>; 230 #size-cells = <1>; 231 ranges = <0x0 0x80000 0x10000>; 232 233 data@0 { 234 compatible = "fsl,cpm-muram-data"; 235 reg = <0x0 0x4000 0x9000 0x2000>; 236 }; 237 }; 238 239 brg@919f0 { 240 compatible = "fsl,mpc8560-brg", 241 "fsl,cpm2-brg", 242 "fsl,cpm-brg"; 243 reg = <0x919f0 0x10 0x915f0 0x10>; 244 clock-frequency = <165000000>; 245 }; 246 247 cpmpic: pic@90c00 { 248 interrupt-controller; 249 #address-cells = <0>; 250 #interrupt-cells = <2>; 251 interrupts = <46 2>; 252 interrupt-parent = <&mpic>; 253 reg = <0x90c00 0x80>; 254 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 255 }; 256 257 serial0: serial@91a00 { 258 device_type = "serial"; 259 compatible = "fsl,mpc8560-scc-uart", 260 "fsl,cpm2-scc-uart"; 261 reg = <0x91a00 0x20 0x88000 0x100>; 262 fsl,cpm-brg = <1>; 263 fsl,cpm-command = <0x800000>; 264 current-speed = <115200>; 265 interrupts = <40 8>; 266 interrupt-parent = <&cpmpic>; 267 }; 268 269 serial1: serial@91a20 { 270 device_type = "serial"; 271 compatible = "fsl,mpc8560-scc-uart", 272 "fsl,cpm2-scc-uart"; 273 reg = <0x91a20 0x20 0x88100 0x100>; 274 fsl,cpm-brg = <2>; 275 fsl,cpm-command = <0x4a00000>; 276 current-speed = <115200>; 277 interrupts = <41 8>; 278 interrupt-parent = <&cpmpic>; 279 }; 280 281 enet2: ethernet@91320 { 282 device_type = "network"; 283 compatible = "fsl,mpc8560-fcc-enet", 284 "fsl,cpm2-fcc-enet"; 285 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>; 286 local-mac-address = [ 00 00 00 00 00 00 ]; 287 fsl,cpm-command = <0x16200300>; 288 interrupts = <33 8>; 289 interrupt-parent = <&cpmpic>; 290 phy-handle = <&phy2>; 291 }; 292 293 enet3: ethernet@91340 { 294 device_type = "network"; 295 compatible = "fsl,mpc8560-fcc-enet", 296 "fsl,cpm2-fcc-enet"; 297 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>; 298 local-mac-address = [ 00 00 00 00 00 00 ]; 299 fsl,cpm-command = <0x1a400300>; 300 interrupts = <34 8>; 301 interrupt-parent = <&cpmpic>; 302 phy-handle = <&phy3>; 303 }; 304 }; 305 }; 306 307 pci0: pci@e0008000 { 308 #interrupt-cells = <1>; 309 #size-cells = <2>; 310 #address-cells = <3>; 311 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; 312 device_type = "pci"; 313 reg = <0xe0008000 0x1000>; 314 clock-frequency = <66666666>; 315 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 316 interrupt-map = < 317 318 /* IDSEL 0x2 */ 319 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1 320 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1 321 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1 322 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1 323 324 /* IDSEL 0x3 */ 325 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1 326 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1 327 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1 328 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1 329 330 /* IDSEL 0x4 */ 331 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1 332 0x2000 0x0 0x0 0x2 &mpic 0x4 0x1 333 0x2000 0x0 0x0 0x3 &mpic 0x1 0x1 334 0x2000 0x0 0x0 0x4 &mpic 0x2 0x1 335 336 /* IDSEL 0x5 */ 337 0x2800 0x0 0x0 0x1 &mpic 0x2 0x1 338 0x2800 0x0 0x0 0x2 &mpic 0x3 0x1 339 0x2800 0x0 0x0 0x3 &mpic 0x4 0x1 340 0x2800 0x0 0x0 0x4 &mpic 0x1 0x1 341 342 /* IDSEL 12 */ 343 0x6000 0x0 0x0 0x1 &mpic 0x1 0x1 344 0x6000 0x0 0x0 0x2 &mpic 0x2 0x1 345 0x6000 0x0 0x0 0x3 &mpic 0x3 0x1 346 0x6000 0x0 0x0 0x4 &mpic 0x4 0x1 347 348 /* IDSEL 13 */ 349 0x6800 0x0 0x0 0x1 &mpic 0x4 0x1 350 0x6800 0x0 0x0 0x2 &mpic 0x1 0x1 351 0x6800 0x0 0x0 0x3 &mpic 0x2 0x1 352 0x6800 0x0 0x0 0x4 &mpic 0x3 0x1 353 354 /* IDSEL 14*/ 355 0x7000 0x0 0x0 0x1 &mpic 0x3 0x1 356 0x7000 0x0 0x0 0x2 &mpic 0x4 0x1 357 0x7000 0x0 0x0 0x3 &mpic 0x1 0x1 358 0x7000 0x0 0x0 0x4 &mpic 0x2 0x1 359 360 /* IDSEL 15 */ 361 0x7800 0x0 0x0 0x1 &mpic 0x2 0x1 362 0x7800 0x0 0x0 0x2 &mpic 0x3 0x1 363 0x7800 0x0 0x0 0x3 &mpic 0x4 0x1 364 0x7800 0x0 0x0 0x4 &mpic 0x1 0x1 365 366 /* IDSEL 18 */ 367 0x9000 0x0 0x0 0x1 &mpic 0x1 0x1 368 0x9000 0x0 0x0 0x2 &mpic 0x2 0x1 369 0x9000 0x0 0x0 0x3 &mpic 0x3 0x1 370 0x9000 0x0 0x0 0x4 &mpic 0x4 0x1 371 372 /* IDSEL 19 */ 373 0x9800 0x0 0x0 0x1 &mpic 0x4 0x1 374 0x9800 0x0 0x0 0x2 &mpic 0x1 0x1 375 0x9800 0x0 0x0 0x3 &mpic 0x2 0x1 376 0x9800 0x0 0x0 0x4 &mpic 0x3 0x1 377 378 /* IDSEL 20 */ 379 0xa000 0x0 0x0 0x1 &mpic 0x3 0x1 380 0xa000 0x0 0x0 0x2 &mpic 0x4 0x1 381 0xa000 0x0 0x0 0x3 &mpic 0x1 0x1 382 0xa000 0x0 0x0 0x4 &mpic 0x2 0x1 383 384 /* IDSEL 21 */ 385 0xa800 0x0 0x0 0x1 &mpic 0x2 0x1 386 0xa800 0x0 0x0 0x2 &mpic 0x3 0x1 387 0xa800 0x0 0x0 0x3 &mpic 0x4 0x1 388 0xa800 0x0 0x0 0x4 &mpic 0x1 0x1>; 389 390 interrupt-parent = <&mpic>; 391 interrupts = <24 2>; 392 bus-range = <0 0>; 393 ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000 394 0x1000000 0x0 0x0 0xe2000000 0x0 0x1000000>; 395 }; 396}; 397