1/* 2 * P5020DS Device Tree Source 3 * 4 * Copyright 2010-2011 Freescale Semiconductor Inc. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * * Neither the name of Freescale Semiconductor nor the 14 * names of its contributors may be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * 18 * ALTERNATIVELY, this software may be distributed under the terms of the 19 * GNU General Public License ("GPL") as published by the Free Software 20 * Foundation, either version 2 of that License or (at your option) any 21 * later version. 22 * 23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY 24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35/include/ "fsl/p5020si-pre.dtsi" 36 37/ { 38 model = "fsl,P5020DS"; 39 compatible = "fsl,P5020DS"; 40 #address-cells = <2>; 41 #size-cells = <2>; 42 interrupt-parent = <&mpic>; 43 44 memory { 45 device_type = "memory"; 46 }; 47 48 dcsr: dcsr@f00000000 { 49 ranges = <0x00000000 0xf 0x00000000 0x01008000>; 50 }; 51 52 soc: soc@ffe000000 { 53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 54 reg = <0xf 0xfe000000 0 0x00001000>; 55 spi@110000 { 56 flash@0 { 57 #address-cells = <1>; 58 #size-cells = <1>; 59 compatible = "spansion,s25sl12801"; 60 reg = <0>; 61 spi-max-frequency = <40000000>; /* input clock */ 62 partition@u-boot { 63 label = "u-boot"; 64 reg = <0x00000000 0x00100000>; 65 read-only; 66 }; 67 partition@kernel { 68 label = "kernel"; 69 reg = <0x00100000 0x00500000>; 70 read-only; 71 }; 72 partition@dtb { 73 label = "dtb"; 74 reg = <0x00600000 0x00100000>; 75 read-only; 76 }; 77 partition@fs { 78 label = "file system"; 79 reg = <0x00700000 0x00900000>; 80 }; 81 }; 82 }; 83 84 i2c@118100 { 85 eeprom@51 { 86 compatible = "at24,24c256"; 87 reg = <0x51>; 88 }; 89 eeprom@52 { 90 compatible = "at24,24c256"; 91 reg = <0x52>; 92 }; 93 }; 94 95 i2c@119100 { 96 rtc@68 { 97 compatible = "dallas,ds3232"; 98 reg = <0x68>; 99 interrupts = <0x1 0x1 0 0>; 100 }; 101 adt7461@4c { 102 compatible = "adi,adt7461"; 103 reg = <0x4c>; 104 }; 105 }; 106 }; 107 108 rio: rapidio@ffe0c0000 { 109 reg = <0xf 0xfe0c0000 0 0x11000>; 110 111 port1 { 112 ranges = <0 0 0xc 0x20000000 0 0x10000000>; 113 }; 114 port2 { 115 ranges = <0 0 0xc 0x30000000 0 0x10000000>; 116 }; 117 }; 118 119 lbc: localbus@ffe124000 { 120 reg = <0xf 0xfe124000 0 0x1000>; 121 ranges = <0 0 0xf 0xe8000000 0x08000000 122 2 0 0xf 0xffa00000 0x00040000 123 3 0 0xf 0xffdf0000 0x00008000>; 124 125 flash@0,0 { 126 compatible = "cfi-flash"; 127 reg = <0 0 0x08000000>; 128 bank-width = <2>; 129 device-width = <2>; 130 }; 131 132 nand@2,0 { 133 #address-cells = <1>; 134 #size-cells = <1>; 135 compatible = "fsl,elbc-fcm-nand"; 136 reg = <0x2 0x0 0x40000>; 137 138 partition@0 { 139 label = "NAND U-Boot Image"; 140 reg = <0x0 0x02000000>; 141 read-only; 142 }; 143 144 partition@2000000 { 145 label = "NAND Root File System"; 146 reg = <0x02000000 0x10000000>; 147 }; 148 149 partition@12000000 { 150 label = "NAND Compressed RFS Image"; 151 reg = <0x12000000 0x08000000>; 152 }; 153 154 partition@1a000000 { 155 label = "NAND Linux Kernel Image"; 156 reg = <0x1a000000 0x04000000>; 157 }; 158 159 partition@1e000000 { 160 label = "NAND DTB Image"; 161 reg = <0x1e000000 0x01000000>; 162 }; 163 164 partition@1f000000 { 165 label = "NAND Writable User area"; 166 reg = <0x1f000000 0x21000000>; 167 }; 168 }; 169 170 board-control@3,0 { 171 compatible = "fsl,p5020ds-fpga", "fsl,fpga-ngpixis"; 172 reg = <3 0 0x30>; 173 }; 174 }; 175 176 pci0: pcie@ffe200000 { 177 reg = <0xf 0xfe200000 0 0x1000>; 178 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000 179 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>; 180 pcie@0 { 181 ranges = <0x02000000 0 0xe0000000 182 0x02000000 0 0xe0000000 183 0 0x20000000 184 185 0x01000000 0 0x00000000 186 0x01000000 0 0x00000000 187 0 0x00010000>; 188 }; 189 }; 190 191 pci1: pcie@ffe201000 { 192 reg = <0xf 0xfe201000 0 0x1000>; 193 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000 194 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>; 195 pcie@0 { 196 ranges = <0x02000000 0 0xe0000000 197 0x02000000 0 0xe0000000 198 0 0x20000000 199 200 0x01000000 0 0x00000000 201 0x01000000 0 0x00000000 202 0 0x00010000>; 203 }; 204 }; 205 206 pci2: pcie@ffe202000 { 207 reg = <0xf 0xfe202000 0 0x1000>; 208 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000 209 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 210 pcie@0 { 211 ranges = <0x02000000 0 0xe0000000 212 0x02000000 0 0xe0000000 213 0 0x20000000 214 215 0x01000000 0 0x00000000 216 0x01000000 0 0x00000000 217 0 0x00010000>; 218 }; 219 }; 220 221 pci3: pcie@ffe203000 { 222 reg = <0xf 0xfe203000 0 0x1000>; 223 ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000 224 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; 225 pcie@0 { 226 ranges = <0x02000000 0 0xe0000000 227 0x02000000 0 0xe0000000 228 0 0x20000000 229 230 0x01000000 0 0x00000000 231 0x01000000 0 0x00000000 232 0 0x00010000>; 233 }; 234 }; 235}; 236 237/include/ "fsl/p5020si-post.dtsi" 238