1 /*
2 * Clock driver for the ARM Integrator/AP and Integrator/CP boards
3 * Copyright (C) 2012 Linus Walleij
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9 #include <linux/clk-provider.h>
10 #include <linux/clk.h>
11 #include <linux/clkdev.h>
12 #include <linux/err.h>
13 #include <linux/platform_data/clk-integrator.h>
14
15 #include <mach/hardware.h>
16 #include <mach/platform.h>
17
18 #include "clk-icst.h"
19
20 /*
21 * Implementation of the ARM Integrator/AP and Integrator/CP clock tree.
22 * Inspired by portions of:
23 * plat-versatile/clock.c and plat-versatile/include/plat/clock.h
24 */
25
26 static const struct icst_params cp_auxvco_params = {
27 .ref = 24000000,
28 .vco_max = ICST525_VCO_MAX_5V,
29 .vco_min = ICST525_VCO_MIN,
30 .vd_min = 8,
31 .vd_max = 263,
32 .rd_min = 3,
33 .rd_max = 65,
34 .s2div = icst525_s2div,
35 .idx2s = icst525_idx2s,
36 };
37
38 static const struct clk_icst_desc __initdata cp_icst_desc = {
39 .params = &cp_auxvco_params,
40 .vco_offset = 0x1c,
41 .lock_offset = INTEGRATOR_HDR_LOCK_OFFSET,
42 };
43
44 /*
45 * integrator_clk_init() - set up the integrator clock tree
46 * @is_cp: pass true if it's the Integrator/CP else AP is assumed
47 */
integrator_clk_init(bool is_cp)48 void __init integrator_clk_init(bool is_cp)
49 {
50 struct clk *clk;
51
52 /* APB clock dummy */
53 clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0);
54 clk_register_clkdev(clk, "apb_pclk", NULL);
55
56 /* UART reference clock */
57 clk = clk_register_fixed_rate(NULL, "uartclk", NULL, CLK_IS_ROOT,
58 14745600);
59 clk_register_clkdev(clk, NULL, "uart0");
60 clk_register_clkdev(clk, NULL, "uart1");
61 if (is_cp)
62 clk_register_clkdev(clk, NULL, "mmci");
63
64 /* 24 MHz clock */
65 clk = clk_register_fixed_rate(NULL, "clk24mhz", NULL, CLK_IS_ROOT,
66 24000000);
67 clk_register_clkdev(clk, NULL, "kmi0");
68 clk_register_clkdev(clk, NULL, "kmi1");
69 if (!is_cp)
70 clk_register_clkdev(clk, NULL, "ap_timer");
71
72 if (!is_cp)
73 return;
74
75 /* 1 MHz clock */
76 clk = clk_register_fixed_rate(NULL, "clk1mhz", NULL, CLK_IS_ROOT,
77 1000000);
78 clk_register_clkdev(clk, NULL, "sp804");
79
80 /* ICST VCO clock used on the Integrator/CP CLCD */
81 clk = icst_clk_register(NULL, &cp_icst_desc,
82 __io_address(INTEGRATOR_HDR_BASE));
83 clk_register_clkdev(clk, NULL, "clcd");
84 }
85