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1 /*
2  * Analog devices AD5764, AD5764R, AD5744, AD5744R quad-channel
3  * Digital to Analog Converters driver
4  *
5  * Copyright 2011 Analog Devices Inc.
6  *
7  * Licensed under the GPL-2.
8  */
9 
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 
19 #include <linux/iio/iio.h>
20 #include <linux/iio/sysfs.h>
21 
22 #define AD5764_REG_SF_NOP			0x0
23 #define AD5764_REG_SF_CONFIG			0x1
24 #define AD5764_REG_SF_CLEAR			0x4
25 #define AD5764_REG_SF_LOAD			0x5
26 #define AD5764_REG_DATA(x)			((2 << 3) | (x))
27 #define AD5764_REG_COARSE_GAIN(x)		((3 << 3) | (x))
28 #define AD5764_REG_FINE_GAIN(x)			((4 << 3) | (x))
29 #define AD5764_REG_OFFSET(x)			((5 << 3) | (x))
30 
31 #define AD5764_NUM_CHANNELS 4
32 
33 /**
34  * struct ad5764_chip_info - chip specific information
35  * @int_vref:	Value of the internal reference voltage in uV - 0 if external
36  *		reference voltage is used
37  * @channel	channel specification
38 */
39 
40 struct ad5764_chip_info {
41 	unsigned long int_vref;
42 	const struct iio_chan_spec *channels;
43 };
44 
45 /**
46  * struct ad5764_state - driver instance specific data
47  * @spi:		spi_device
48  * @chip_info:		chip info
49  * @vref_reg:		vref supply regulators
50  * @data:		spi transfer buffers
51  */
52 
53 struct ad5764_state {
54 	struct spi_device		*spi;
55 	const struct ad5764_chip_info	*chip_info;
56 	struct regulator_bulk_data	vref_reg[2];
57 
58 	/*
59 	 * DMA (thus cache coherency maintenance) requires the
60 	 * transfer buffers to live in their own cache lines.
61 	 */
62 	union {
63 		__be32 d32;
64 		u8 d8[4];
65 	} data[2] ____cacheline_aligned;
66 };
67 
68 enum ad5764_type {
69 	ID_AD5744,
70 	ID_AD5744R,
71 	ID_AD5764,
72 	ID_AD5764R,
73 };
74 
75 #define AD5764_CHANNEL(_chan, _bits) {				\
76 	.type = IIO_VOLTAGE,					\
77 	.indexed = 1,						\
78 	.output = 1,						\
79 	.channel = (_chan),					\
80 	.address = (_chan),					\
81 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |		\
82 		BIT(IIO_CHAN_INFO_SCALE) |			\
83 		BIT(IIO_CHAN_INFO_CALIBSCALE) |			\
84 		BIT(IIO_CHAN_INFO_CALIBBIAS),			\
85 	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_OFFSET),	\
86 	.scan_type = IIO_ST('u', (_bits), 16, 16 - (_bits))	\
87 }
88 
89 #define DECLARE_AD5764_CHANNELS(_name, _bits) \
90 const struct iio_chan_spec _name##_channels[] = { \
91 	AD5764_CHANNEL(0, (_bits)), \
92 	AD5764_CHANNEL(1, (_bits)), \
93 	AD5764_CHANNEL(2, (_bits)), \
94 	AD5764_CHANNEL(3, (_bits)), \
95 };
96 
97 static DECLARE_AD5764_CHANNELS(ad5764, 16);
98 static DECLARE_AD5764_CHANNELS(ad5744, 14);
99 
100 static const struct ad5764_chip_info ad5764_chip_infos[] = {
101 	[ID_AD5744] = {
102 		.int_vref = 0,
103 		.channels = ad5744_channels,
104 	},
105 	[ID_AD5744R] = {
106 		.int_vref = 5000000,
107 		.channels = ad5744_channels,
108 	},
109 	[ID_AD5764] = {
110 		.int_vref = 0,
111 		.channels = ad5764_channels,
112 	},
113 	[ID_AD5764R] = {
114 		.int_vref = 5000000,
115 		.channels = ad5764_channels,
116 	},
117 };
118 
ad5764_write(struct iio_dev * indio_dev,unsigned int reg,unsigned int val)119 static int ad5764_write(struct iio_dev *indio_dev, unsigned int reg,
120 	unsigned int val)
121 {
122 	struct ad5764_state *st = iio_priv(indio_dev);
123 	int ret;
124 
125 	mutex_lock(&indio_dev->mlock);
126 	st->data[0].d32 = cpu_to_be32((reg << 16) | val);
127 
128 	ret = spi_write(st->spi, &st->data[0].d8[1], 3);
129 	mutex_unlock(&indio_dev->mlock);
130 
131 	return ret;
132 }
133 
ad5764_read(struct iio_dev * indio_dev,unsigned int reg,unsigned int * val)134 static int ad5764_read(struct iio_dev *indio_dev, unsigned int reg,
135 	unsigned int *val)
136 {
137 	struct ad5764_state *st = iio_priv(indio_dev);
138 	int ret;
139 	struct spi_transfer t[] = {
140 		{
141 			.tx_buf = &st->data[0].d8[1],
142 			.len = 3,
143 			.cs_change = 1,
144 		}, {
145 			.rx_buf = &st->data[1].d8[1],
146 			.len = 3,
147 		},
148 	};
149 
150 	mutex_lock(&indio_dev->mlock);
151 
152 	st->data[0].d32 = cpu_to_be32((1 << 23) | (reg << 16));
153 
154 	ret = spi_sync_transfer(st->spi, t, ARRAY_SIZE(t));
155 	if (ret >= 0)
156 		*val = be32_to_cpu(st->data[1].d32) & 0xffff;
157 
158 	mutex_unlock(&indio_dev->mlock);
159 
160 	return ret;
161 }
162 
ad5764_chan_info_to_reg(struct iio_chan_spec const * chan,long info)163 static int ad5764_chan_info_to_reg(struct iio_chan_spec const *chan, long info)
164 {
165 	switch (info) {
166 	case 0:
167 		return AD5764_REG_DATA(chan->address);
168 	case IIO_CHAN_INFO_CALIBBIAS:
169 		return AD5764_REG_OFFSET(chan->address);
170 	case IIO_CHAN_INFO_CALIBSCALE:
171 		return AD5764_REG_FINE_GAIN(chan->address);
172 	default:
173 		break;
174 	}
175 
176 	return 0;
177 }
178 
ad5764_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long info)179 static int ad5764_write_raw(struct iio_dev *indio_dev,
180 	struct iio_chan_spec const *chan, int val, int val2, long info)
181 {
182 	const int max_val = (1 << chan->scan_type.realbits);
183 	unsigned int reg;
184 
185 	switch (info) {
186 	case IIO_CHAN_INFO_RAW:
187 		if (val >= max_val || val < 0)
188 			return -EINVAL;
189 		val <<= chan->scan_type.shift;
190 		break;
191 	case IIO_CHAN_INFO_CALIBBIAS:
192 		if (val >= 128 || val < -128)
193 			return -EINVAL;
194 		break;
195 	case IIO_CHAN_INFO_CALIBSCALE:
196 		if (val >= 32 || val < -32)
197 			return -EINVAL;
198 		break;
199 	default:
200 		return -EINVAL;
201 	}
202 
203 	reg = ad5764_chan_info_to_reg(chan, info);
204 	return ad5764_write(indio_dev, reg, (u16)val);
205 }
206 
ad5764_get_channel_vref(struct ad5764_state * st,unsigned int channel)207 static int ad5764_get_channel_vref(struct ad5764_state *st,
208 	unsigned int channel)
209 {
210 	if (st->chip_info->int_vref)
211 		return st->chip_info->int_vref;
212 	else
213 		return regulator_get_voltage(st->vref_reg[channel / 2].consumer);
214 }
215 
ad5764_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long info)216 static int ad5764_read_raw(struct iio_dev *indio_dev,
217 	struct iio_chan_spec const *chan, int *val, int *val2, long info)
218 {
219 	struct ad5764_state *st = iio_priv(indio_dev);
220 	unsigned long scale_uv;
221 	unsigned int reg;
222 	int vref;
223 	int ret;
224 
225 	switch (info) {
226 	case IIO_CHAN_INFO_RAW:
227 		reg = AD5764_REG_DATA(chan->address);
228 		ret = ad5764_read(indio_dev, reg, val);
229 		if (ret < 0)
230 			return ret;
231 		*val >>= chan->scan_type.shift;
232 		return IIO_VAL_INT;
233 	case IIO_CHAN_INFO_CALIBBIAS:
234 		reg = AD5764_REG_OFFSET(chan->address);
235 		ret = ad5764_read(indio_dev, reg, val);
236 		if (ret < 0)
237 			return ret;
238 		*val = sign_extend32(*val, 7);
239 		return IIO_VAL_INT;
240 	case IIO_CHAN_INFO_CALIBSCALE:
241 		reg = AD5764_REG_FINE_GAIN(chan->address);
242 		ret = ad5764_read(indio_dev, reg, val);
243 		if (ret < 0)
244 			return ret;
245 		*val = sign_extend32(*val, 5);
246 		return IIO_VAL_INT;
247 	case IIO_CHAN_INFO_SCALE:
248 		/* vout = 4 * vref + ((dac_code / 65535) - 0.5) */
249 		vref = ad5764_get_channel_vref(st, chan->channel);
250 		if (vref < 0)
251 			return vref;
252 
253 		scale_uv = (vref * 4 * 100) >> chan->scan_type.realbits;
254 		*val = scale_uv / 100000;
255 		*val2 = (scale_uv % 100000) * 10;
256 		return IIO_VAL_INT_PLUS_MICRO;
257 	case IIO_CHAN_INFO_OFFSET:
258 		*val = -(1 << chan->scan_type.realbits) / 2;
259 		return IIO_VAL_INT;
260 	}
261 
262 	return -EINVAL;
263 }
264 
265 static const struct iio_info ad5764_info = {
266 	.read_raw = ad5764_read_raw,
267 	.write_raw = ad5764_write_raw,
268 	.driver_module = THIS_MODULE,
269 };
270 
ad5764_probe(struct spi_device * spi)271 static int ad5764_probe(struct spi_device *spi)
272 {
273 	enum ad5764_type type = spi_get_device_id(spi)->driver_data;
274 	struct iio_dev *indio_dev;
275 	struct ad5764_state *st;
276 	int ret;
277 
278 	indio_dev = iio_device_alloc(sizeof(*st));
279 	if (indio_dev == NULL) {
280 		dev_err(&spi->dev, "Failed to allocate iio device\n");
281 		return -ENOMEM;
282 	}
283 
284 	st = iio_priv(indio_dev);
285 	spi_set_drvdata(spi, indio_dev);
286 
287 	st->spi = spi;
288 	st->chip_info = &ad5764_chip_infos[type];
289 
290 	indio_dev->dev.parent = &spi->dev;
291 	indio_dev->name = spi_get_device_id(spi)->name;
292 	indio_dev->info = &ad5764_info;
293 	indio_dev->modes = INDIO_DIRECT_MODE;
294 	indio_dev->num_channels = AD5764_NUM_CHANNELS;
295 	indio_dev->channels = st->chip_info->channels;
296 
297 	if (st->chip_info->int_vref == 0) {
298 		st->vref_reg[0].supply = "vrefAB";
299 		st->vref_reg[1].supply = "vrefCD";
300 
301 		ret = regulator_bulk_get(&st->spi->dev,
302 			ARRAY_SIZE(st->vref_reg), st->vref_reg);
303 		if (ret) {
304 			dev_err(&spi->dev, "Failed to request vref regulators: %d\n",
305 				ret);
306 			goto error_free;
307 		}
308 
309 		ret = regulator_bulk_enable(ARRAY_SIZE(st->vref_reg),
310 			st->vref_reg);
311 		if (ret) {
312 			dev_err(&spi->dev, "Failed to enable vref regulators: %d\n",
313 				ret);
314 			goto error_free_reg;
315 		}
316 	}
317 
318 	ret = iio_device_register(indio_dev);
319 	if (ret) {
320 		dev_err(&spi->dev, "Failed to register iio device: %d\n", ret);
321 		goto error_disable_reg;
322 	}
323 
324 	return 0;
325 
326 error_disable_reg:
327 	if (st->chip_info->int_vref == 0)
328 		regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
329 error_free_reg:
330 	if (st->chip_info->int_vref == 0)
331 		regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
332 error_free:
333 	iio_device_free(indio_dev);
334 
335 	return ret;
336 }
337 
ad5764_remove(struct spi_device * spi)338 static int ad5764_remove(struct spi_device *spi)
339 {
340 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
341 	struct ad5764_state *st = iio_priv(indio_dev);
342 
343 	iio_device_unregister(indio_dev);
344 
345 	if (st->chip_info->int_vref == 0) {
346 		regulator_bulk_disable(ARRAY_SIZE(st->vref_reg), st->vref_reg);
347 		regulator_bulk_free(ARRAY_SIZE(st->vref_reg), st->vref_reg);
348 	}
349 
350 	iio_device_free(indio_dev);
351 
352 	return 0;
353 }
354 
355 static const struct spi_device_id ad5764_ids[] = {
356 	{ "ad5744", ID_AD5744 },
357 	{ "ad5744r", ID_AD5744R },
358 	{ "ad5764", ID_AD5764 },
359 	{ "ad5764r", ID_AD5764R },
360 	{ }
361 };
362 MODULE_DEVICE_TABLE(spi, ad5764_ids);
363 
364 static struct spi_driver ad5764_driver = {
365 	.driver = {
366 		.name = "ad5764",
367 		.owner = THIS_MODULE,
368 	},
369 	.probe = ad5764_probe,
370 	.remove = ad5764_remove,
371 	.id_table = ad5764_ids,
372 };
373 module_spi_driver(ad5764_driver);
374 
375 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
376 MODULE_DESCRIPTION("Analog Devices AD5744/AD5744R/AD5764/AD5764R DAC");
377 MODULE_LICENSE("GPL v2");
378