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1 /*
2  * ispccdc.c
3  *
4  * TI OMAP3 ISP - CCDC module
5  *
6  * Copyright (C) 2009-2010 Nokia Corporation
7  * Copyright (C) 2009 Texas Instruments, Inc.
8  *
9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10  *	     Sakari Ailus <sakari.ailus@iki.fi>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24  * 02110-1301 USA
25  */
26 
27 #include <linux/module.h>
28 #include <linux/uaccess.h>
29 #include <linux/delay.h>
30 #include <linux/device.h>
31 #include <linux/dma-mapping.h>
32 #include <linux/mm.h>
33 #include <linux/omap-iommu.h>
34 #include <linux/sched.h>
35 #include <linux/slab.h>
36 #include <media/v4l2-event.h>
37 
38 #include "isp.h"
39 #include "ispreg.h"
40 #include "ispccdc.h"
41 
42 #define CCDC_MIN_WIDTH		32
43 #define CCDC_MIN_HEIGHT		32
44 
45 static struct v4l2_mbus_framefmt *
46 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
47 		  unsigned int pad, enum v4l2_subdev_format_whence which);
48 
49 static const unsigned int ccdc_fmts[] = {
50 	V4L2_MBUS_FMT_Y8_1X8,
51 	V4L2_MBUS_FMT_Y10_1X10,
52 	V4L2_MBUS_FMT_Y12_1X12,
53 	V4L2_MBUS_FMT_SGRBG8_1X8,
54 	V4L2_MBUS_FMT_SRGGB8_1X8,
55 	V4L2_MBUS_FMT_SBGGR8_1X8,
56 	V4L2_MBUS_FMT_SGBRG8_1X8,
57 	V4L2_MBUS_FMT_SGRBG10_1X10,
58 	V4L2_MBUS_FMT_SRGGB10_1X10,
59 	V4L2_MBUS_FMT_SBGGR10_1X10,
60 	V4L2_MBUS_FMT_SGBRG10_1X10,
61 	V4L2_MBUS_FMT_SGRBG12_1X12,
62 	V4L2_MBUS_FMT_SRGGB12_1X12,
63 	V4L2_MBUS_FMT_SBGGR12_1X12,
64 	V4L2_MBUS_FMT_SGBRG12_1X12,
65 	V4L2_MBUS_FMT_YUYV8_2X8,
66 	V4L2_MBUS_FMT_UYVY8_2X8,
67 };
68 
69 /*
70  * ccdc_print_status - Print current CCDC Module register values.
71  * @ccdc: Pointer to ISP CCDC device.
72  *
73  * Also prints other debug information stored in the CCDC module.
74  */
75 #define CCDC_PRINT_REGISTER(isp, name)\
76 	dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
77 		isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
78 
ccdc_print_status(struct isp_ccdc_device * ccdc)79 static void ccdc_print_status(struct isp_ccdc_device *ccdc)
80 {
81 	struct isp_device *isp = to_isp_device(ccdc);
82 
83 	dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
84 
85 	CCDC_PRINT_REGISTER(isp, PCR);
86 	CCDC_PRINT_REGISTER(isp, SYN_MODE);
87 	CCDC_PRINT_REGISTER(isp, HD_VD_WID);
88 	CCDC_PRINT_REGISTER(isp, PIX_LINES);
89 	CCDC_PRINT_REGISTER(isp, HORZ_INFO);
90 	CCDC_PRINT_REGISTER(isp, VERT_START);
91 	CCDC_PRINT_REGISTER(isp, VERT_LINES);
92 	CCDC_PRINT_REGISTER(isp, CULLING);
93 	CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
94 	CCDC_PRINT_REGISTER(isp, SDOFST);
95 	CCDC_PRINT_REGISTER(isp, SDR_ADDR);
96 	CCDC_PRINT_REGISTER(isp, CLAMP);
97 	CCDC_PRINT_REGISTER(isp, DCSUB);
98 	CCDC_PRINT_REGISTER(isp, COLPTN);
99 	CCDC_PRINT_REGISTER(isp, BLKCMP);
100 	CCDC_PRINT_REGISTER(isp, FPC);
101 	CCDC_PRINT_REGISTER(isp, FPC_ADDR);
102 	CCDC_PRINT_REGISTER(isp, VDINT);
103 	CCDC_PRINT_REGISTER(isp, ALAW);
104 	CCDC_PRINT_REGISTER(isp, REC656IF);
105 	CCDC_PRINT_REGISTER(isp, CFG);
106 	CCDC_PRINT_REGISTER(isp, FMTCFG);
107 	CCDC_PRINT_REGISTER(isp, FMT_HORZ);
108 	CCDC_PRINT_REGISTER(isp, FMT_VERT);
109 	CCDC_PRINT_REGISTER(isp, PRGEVEN0);
110 	CCDC_PRINT_REGISTER(isp, PRGEVEN1);
111 	CCDC_PRINT_REGISTER(isp, PRGODD0);
112 	CCDC_PRINT_REGISTER(isp, PRGODD1);
113 	CCDC_PRINT_REGISTER(isp, VP_OUT);
114 	CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
115 	CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
116 	CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
117 	CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
118 
119 	dev_dbg(isp->dev, "--------------------------------------------\n");
120 }
121 
122 /*
123  * omap3isp_ccdc_busy - Get busy state of the CCDC.
124  * @ccdc: Pointer to ISP CCDC device.
125  */
omap3isp_ccdc_busy(struct isp_ccdc_device * ccdc)126 int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
127 {
128 	struct isp_device *isp = to_isp_device(ccdc);
129 
130 	return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
131 		ISPCCDC_PCR_BUSY;
132 }
133 
134 /* -----------------------------------------------------------------------------
135  * Lens Shading Compensation
136  */
137 
138 /*
139  * ccdc_lsc_validate_config - Check that LSC configuration is valid.
140  * @ccdc: Pointer to ISP CCDC device.
141  * @lsc_cfg: the LSC configuration to check.
142  *
143  * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
144  */
ccdc_lsc_validate_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * lsc_cfg)145 static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
146 				    struct omap3isp_ccdc_lsc_config *lsc_cfg)
147 {
148 	struct isp_device *isp = to_isp_device(ccdc);
149 	struct v4l2_mbus_framefmt *format;
150 	unsigned int paxel_width, paxel_height;
151 	unsigned int paxel_shift_x, paxel_shift_y;
152 	unsigned int min_width, min_height, min_size;
153 	unsigned int input_width, input_height;
154 
155 	paxel_shift_x = lsc_cfg->gain_mode_m;
156 	paxel_shift_y = lsc_cfg->gain_mode_n;
157 
158 	if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
159 	    (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
160 		dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
161 		return -EINVAL;
162 	}
163 
164 	if (lsc_cfg->offset & 3) {
165 		dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
166 			"4\n");
167 		return -EINVAL;
168 	}
169 
170 	if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
171 		dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
172 		return -EINVAL;
173 	}
174 
175 	format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
176 				   V4L2_SUBDEV_FORMAT_ACTIVE);
177 	input_width = format->width;
178 	input_height = format->height;
179 
180 	/* Calculate minimum bytesize for validation */
181 	paxel_width = 1 << paxel_shift_x;
182 	min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
183 		     >> paxel_shift_x) + 1;
184 
185 	paxel_height = 1 << paxel_shift_y;
186 	min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
187 		     >> paxel_shift_y) + 1;
188 
189 	min_size = 4 * min_width * min_height;
190 	if (min_size > lsc_cfg->size) {
191 		dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
192 		return -EINVAL;
193 	}
194 	if (lsc_cfg->offset < (min_width * 4)) {
195 		dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
196 		return -EINVAL;
197 	}
198 	if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
199 		dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
200 		return -EINVAL;
201 	}
202 	return 0;
203 }
204 
205 /*
206  * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
207  * @ccdc: Pointer to ISP CCDC device.
208  */
ccdc_lsc_program_table(struct isp_ccdc_device * ccdc,u32 addr)209 static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
210 {
211 	isp_reg_writel(to_isp_device(ccdc), addr,
212 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
213 }
214 
215 /*
216  * ccdc_lsc_setup_regs - Configures the lens shading compensation module
217  * @ccdc: Pointer to ISP CCDC device.
218  */
ccdc_lsc_setup_regs(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_lsc_config * cfg)219 static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
220 				struct omap3isp_ccdc_lsc_config *cfg)
221 {
222 	struct isp_device *isp = to_isp_device(ccdc);
223 	int reg;
224 
225 	isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
226 		       ISPCCDC_LSC_TABLE_OFFSET);
227 
228 	reg = 0;
229 	reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
230 	reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
231 	reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
232 	isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
233 
234 	reg = 0;
235 	reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
236 	reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
237 	reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
238 	reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
239 	isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
240 		       ISPCCDC_LSC_INITIAL);
241 }
242 
ccdc_lsc_wait_prefetch(struct isp_ccdc_device * ccdc)243 static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
244 {
245 	struct isp_device *isp = to_isp_device(ccdc);
246 	unsigned int wait;
247 
248 	isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
249 		       OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
250 
251 	/* timeout 1 ms */
252 	for (wait = 0; wait < 1000; wait++) {
253 		if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
254 				  IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
255 			isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
256 				       OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
257 			return 0;
258 		}
259 
260 		rmb();
261 		udelay(1);
262 	}
263 
264 	return -ETIMEDOUT;
265 }
266 
267 /*
268  * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
269  * @ccdc: Pointer to ISP CCDC device.
270  * @enable: 0 Disables LSC, 1 Enables LSC.
271  */
__ccdc_lsc_enable(struct isp_ccdc_device * ccdc,int enable)272 static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
273 {
274 	struct isp_device *isp = to_isp_device(ccdc);
275 	const struct v4l2_mbus_framefmt *format =
276 		__ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
277 				  V4L2_SUBDEV_FORMAT_ACTIVE);
278 
279 	if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
280 	    (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
281 	    (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
282 	    (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
283 		return -EINVAL;
284 
285 	if (enable)
286 		omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
287 
288 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
289 			ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
290 
291 	if (enable) {
292 		if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
293 			isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
294 				    ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
295 			ccdc->lsc.state = LSC_STATE_STOPPED;
296 			dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
297 			return -ETIMEDOUT;
298 		}
299 		ccdc->lsc.state = LSC_STATE_RUNNING;
300 	} else {
301 		ccdc->lsc.state = LSC_STATE_STOPPING;
302 	}
303 
304 	return 0;
305 }
306 
ccdc_lsc_busy(struct isp_ccdc_device * ccdc)307 static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
308 {
309 	struct isp_device *isp = to_isp_device(ccdc);
310 
311 	return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
312 			     ISPCCDC_LSC_BUSY;
313 }
314 
315 /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
316  * @ccdc: Pointer to ISP CCDC device
317  * @req: New configuration request
318  *
319  * context: in_interrupt()
320  */
__ccdc_lsc_configure(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)321 static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
322 				struct ispccdc_lsc_config_req *req)
323 {
324 	if (!req->enable)
325 		return -EINVAL;
326 
327 	if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
328 		dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
329 		return -EINVAL;
330 	}
331 
332 	if (ccdc_lsc_busy(ccdc))
333 		return -EBUSY;
334 
335 	ccdc_lsc_setup_regs(ccdc, &req->config);
336 	ccdc_lsc_program_table(ccdc, req->table);
337 	return 0;
338 }
339 
340 /*
341  * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
342  * @ccdc: Pointer to ISP CCDC device.
343  *
344  * Disables LSC, and defers enablement to shadow registers update time.
345  */
ccdc_lsc_error_handler(struct isp_ccdc_device * ccdc)346 static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
347 {
348 	struct isp_device *isp = to_isp_device(ccdc);
349 	/*
350 	 * From OMAP3 TRM: When this event is pending, the module
351 	 * goes into transparent mode (output =input). Normal
352 	 * operation can be resumed at the start of the next frame
353 	 * after:
354 	 *  1) Clearing this event
355 	 *  2) Disabling the LSC module
356 	 *  3) Enabling it
357 	 */
358 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
359 		    ISPCCDC_LSC_ENABLE);
360 	ccdc->lsc.state = LSC_STATE_STOPPED;
361 }
362 
ccdc_lsc_free_request(struct isp_ccdc_device * ccdc,struct ispccdc_lsc_config_req * req)363 static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
364 				  struct ispccdc_lsc_config_req *req)
365 {
366 	struct isp_device *isp = to_isp_device(ccdc);
367 
368 	if (req == NULL)
369 		return;
370 
371 	if (req->iovm)
372 		dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
373 			     req->iovm->sgt->nents, DMA_TO_DEVICE);
374 	if (req->table)
375 		omap_iommu_vfree(isp->domain, isp->dev, req->table);
376 	kfree(req);
377 }
378 
ccdc_lsc_free_queue(struct isp_ccdc_device * ccdc,struct list_head * queue)379 static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
380 				struct list_head *queue)
381 {
382 	struct ispccdc_lsc_config_req *req, *n;
383 	unsigned long flags;
384 
385 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
386 	list_for_each_entry_safe(req, n, queue, list) {
387 		list_del(&req->list);
388 		spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
389 		ccdc_lsc_free_request(ccdc, req);
390 		spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
391 	}
392 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
393 }
394 
ccdc_lsc_free_table_work(struct work_struct * work)395 static void ccdc_lsc_free_table_work(struct work_struct *work)
396 {
397 	struct isp_ccdc_device *ccdc;
398 	struct ispccdc_lsc *lsc;
399 
400 	lsc = container_of(work, struct ispccdc_lsc, table_work);
401 	ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
402 
403 	ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
404 }
405 
406 /*
407  * ccdc_lsc_config - Configure the LSC module from a userspace request
408  *
409  * Store the request LSC configuration in the LSC engine request pointer. The
410  * configuration will be applied to the hardware when the CCDC will be enabled,
411  * or at the next LSC interrupt if the CCDC is already running.
412  */
ccdc_lsc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * config)413 static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
414 			   struct omap3isp_ccdc_update_config *config)
415 {
416 	struct isp_device *isp = to_isp_device(ccdc);
417 	struct ispccdc_lsc_config_req *req;
418 	unsigned long flags;
419 	void *table;
420 	u16 update;
421 	int ret;
422 
423 	update = config->update &
424 		 (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
425 	if (!update)
426 		return 0;
427 
428 	if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
429 		dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
430 			"need to be supplied\n", __func__);
431 		return -EINVAL;
432 	}
433 
434 	req = kzalloc(sizeof(*req), GFP_KERNEL);
435 	if (req == NULL)
436 		return -ENOMEM;
437 
438 	if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
439 		if (copy_from_user(&req->config, config->lsc_cfg,
440 				   sizeof(req->config))) {
441 			ret = -EFAULT;
442 			goto done;
443 		}
444 
445 		req->enable = 1;
446 
447 		req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
448 					req->config.size, IOMMU_FLAG);
449 		if (IS_ERR_VALUE(req->table)) {
450 			req->table = 0;
451 			ret = -ENOMEM;
452 			goto done;
453 		}
454 
455 		req->iovm = omap_find_iovm_area(isp->dev, req->table);
456 		if (req->iovm == NULL) {
457 			ret = -ENOMEM;
458 			goto done;
459 		}
460 
461 		if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
462 				req->iovm->sgt->nents, DMA_TO_DEVICE)) {
463 			ret = -ENOMEM;
464 			req->iovm = NULL;
465 			goto done;
466 		}
467 
468 		dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
469 				    req->iovm->sgt->nents, DMA_TO_DEVICE);
470 
471 		table = omap_da_to_va(isp->dev, req->table);
472 		if (copy_from_user(table, config->lsc, req->config.size)) {
473 			ret = -EFAULT;
474 			goto done;
475 		}
476 
477 		dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
478 				       req->iovm->sgt->nents, DMA_TO_DEVICE);
479 	}
480 
481 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
482 	if (ccdc->lsc.request) {
483 		list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
484 		schedule_work(&ccdc->lsc.table_work);
485 	}
486 	ccdc->lsc.request = req;
487 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
488 
489 	ret = 0;
490 
491 done:
492 	if (ret < 0)
493 		ccdc_lsc_free_request(ccdc, req);
494 
495 	return ret;
496 }
497 
ccdc_lsc_is_configured(struct isp_ccdc_device * ccdc)498 static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
499 {
500 	unsigned long flags;
501 
502 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
503 	if (ccdc->lsc.active) {
504 		spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
505 		return 1;
506 	}
507 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
508 	return 0;
509 }
510 
ccdc_lsc_enable(struct isp_ccdc_device * ccdc)511 static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
512 {
513 	struct ispccdc_lsc *lsc = &ccdc->lsc;
514 
515 	if (lsc->state != LSC_STATE_STOPPED)
516 		return -EINVAL;
517 
518 	if (lsc->active) {
519 		list_add_tail(&lsc->active->list, &lsc->free_queue);
520 		lsc->active = NULL;
521 	}
522 
523 	if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
524 		omap3isp_sbl_disable(to_isp_device(ccdc),
525 				OMAP3_ISP_SBL_CCDC_LSC_READ);
526 		list_add_tail(&lsc->request->list, &lsc->free_queue);
527 		lsc->request = NULL;
528 		goto done;
529 	}
530 
531 	lsc->active = lsc->request;
532 	lsc->request = NULL;
533 	__ccdc_lsc_enable(ccdc, 1);
534 
535 done:
536 	if (!list_empty(&lsc->free_queue))
537 		schedule_work(&lsc->table_work);
538 
539 	return 0;
540 }
541 
542 /* -----------------------------------------------------------------------------
543  * Parameters configuration
544  */
545 
546 /*
547  * ccdc_configure_clamp - Configure optical-black or digital clamping
548  * @ccdc: Pointer to ISP CCDC device.
549  *
550  * The CCDC performs either optical-black or digital clamp. Configure and enable
551  * the selected clamp method.
552  */
ccdc_configure_clamp(struct isp_ccdc_device * ccdc)553 static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
554 {
555 	struct isp_device *isp = to_isp_device(ccdc);
556 	u32 clamp;
557 
558 	if (ccdc->obclamp) {
559 		clamp  = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
560 		clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
561 		clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
562 		clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
563 		isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
564 	} else {
565 		isp_reg_writel(isp, ccdc->clamp.dcsubval,
566 			       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
567 	}
568 
569 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
570 			ISPCCDC_CLAMP_CLAMPEN,
571 			ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
572 }
573 
574 /*
575  * ccdc_configure_fpc - Configure Faulty Pixel Correction
576  * @ccdc: Pointer to ISP CCDC device.
577  */
ccdc_configure_fpc(struct isp_ccdc_device * ccdc)578 static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
579 {
580 	struct isp_device *isp = to_isp_device(ccdc);
581 
582 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
583 
584 	if (!ccdc->fpc_en)
585 		return;
586 
587 	isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
588 		       ISPCCDC_FPC_ADDR);
589 	/* The FPNUM field must be set before enabling FPC. */
590 	isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
591 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
592 	isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
593 		       ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
594 }
595 
596 /*
597  * ccdc_configure_black_comp - Configure Black Level Compensation.
598  * @ccdc: Pointer to ISP CCDC device.
599  */
ccdc_configure_black_comp(struct isp_ccdc_device * ccdc)600 static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
601 {
602 	struct isp_device *isp = to_isp_device(ccdc);
603 	u32 blcomp;
604 
605 	blcomp  = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
606 	blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
607 	blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
608 	blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
609 
610 	isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
611 }
612 
613 /*
614  * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
615  * @ccdc: Pointer to ISP CCDC device.
616  */
ccdc_configure_lpf(struct isp_ccdc_device * ccdc)617 static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
618 {
619 	struct isp_device *isp = to_isp_device(ccdc);
620 
621 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
622 			ISPCCDC_SYN_MODE_LPF,
623 			ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
624 }
625 
626 /*
627  * ccdc_configure_alaw - Configure A-law compression.
628  * @ccdc: Pointer to ISP CCDC device.
629  */
ccdc_configure_alaw(struct isp_ccdc_device * ccdc)630 static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
631 {
632 	struct isp_device *isp = to_isp_device(ccdc);
633 	const struct isp_format_info *info;
634 	u32 alaw = 0;
635 
636 	info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
637 
638 	switch (info->width) {
639 	case 8:
640 		return;
641 
642 	case 10:
643 		alaw = ISPCCDC_ALAW_GWDI_9_0;
644 		break;
645 	case 11:
646 		alaw = ISPCCDC_ALAW_GWDI_10_1;
647 		break;
648 	case 12:
649 		alaw = ISPCCDC_ALAW_GWDI_11_2;
650 		break;
651 	case 13:
652 		alaw = ISPCCDC_ALAW_GWDI_12_3;
653 		break;
654 	}
655 
656 	if (ccdc->alaw)
657 		alaw |= ISPCCDC_ALAW_CCDTBL;
658 
659 	isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
660 }
661 
662 /*
663  * ccdc_config_imgattr - Configure sensor image specific attributes.
664  * @ccdc: Pointer to ISP CCDC device.
665  * @colptn: Color pattern of the sensor.
666  */
ccdc_config_imgattr(struct isp_ccdc_device * ccdc,u32 colptn)667 static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
668 {
669 	struct isp_device *isp = to_isp_device(ccdc);
670 
671 	isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
672 }
673 
674 /*
675  * ccdc_config - Set CCDC configuration from userspace
676  * @ccdc: Pointer to ISP CCDC device.
677  * @userspace_add: Structure containing CCDC configuration sent from userspace.
678  *
679  * Returns 0 if successful, -EINVAL if the pointer to the configuration
680  * structure is null, or the copy_from_user function fails to copy user space
681  * memory to kernel space memory.
682  */
ccdc_config(struct isp_ccdc_device * ccdc,struct omap3isp_ccdc_update_config * ccdc_struct)683 static int ccdc_config(struct isp_ccdc_device *ccdc,
684 		       struct omap3isp_ccdc_update_config *ccdc_struct)
685 {
686 	struct isp_device *isp = to_isp_device(ccdc);
687 	unsigned long flags;
688 
689 	spin_lock_irqsave(&ccdc->lock, flags);
690 	ccdc->shadow_update = 1;
691 	spin_unlock_irqrestore(&ccdc->lock, flags);
692 
693 	if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
694 		ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
695 		ccdc->update |= OMAP3ISP_CCDC_ALAW;
696 	}
697 
698 	if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
699 		ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
700 		ccdc->update |= OMAP3ISP_CCDC_LPF;
701 	}
702 
703 	if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
704 		if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
705 				   sizeof(ccdc->clamp))) {
706 			ccdc->shadow_update = 0;
707 			return -EFAULT;
708 		}
709 
710 		ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
711 		ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
712 	}
713 
714 	if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
715 		if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
716 				   sizeof(ccdc->blcomp))) {
717 			ccdc->shadow_update = 0;
718 			return -EFAULT;
719 		}
720 
721 		ccdc->update |= OMAP3ISP_CCDC_BCOMP;
722 	}
723 
724 	ccdc->shadow_update = 0;
725 
726 	if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
727 		u32 table_old = 0;
728 		u32 table_new;
729 		u32 size;
730 
731 		if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
732 			return -EBUSY;
733 
734 		ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
735 
736 		if (ccdc->fpc_en) {
737 			if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
738 					   sizeof(ccdc->fpc)))
739 				return -EFAULT;
740 
741 			/*
742 			 * table_new must be 64-bytes aligned, but it's
743 			 * already done by omap_iommu_vmalloc().
744 			 */
745 			size = ccdc->fpc.fpnum * 4;
746 			table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
747 							0, size, IOMMU_FLAG);
748 			if (IS_ERR_VALUE(table_new))
749 				return -ENOMEM;
750 
751 			if (copy_from_user(omap_da_to_va(isp->dev, table_new),
752 					   (__force void __user *)
753 					   ccdc->fpc.fpcaddr, size)) {
754 				omap_iommu_vfree(isp->domain, isp->dev,
755 								table_new);
756 				return -EFAULT;
757 			}
758 
759 			table_old = ccdc->fpc.fpcaddr;
760 			ccdc->fpc.fpcaddr = table_new;
761 		}
762 
763 		ccdc_configure_fpc(ccdc);
764 		if (table_old != 0)
765 			omap_iommu_vfree(isp->domain, isp->dev, table_old);
766 	}
767 
768 	return ccdc_lsc_config(ccdc, ccdc_struct);
769 }
770 
ccdc_apply_controls(struct isp_ccdc_device * ccdc)771 static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
772 {
773 	if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
774 		ccdc_configure_alaw(ccdc);
775 		ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
776 	}
777 
778 	if (ccdc->update & OMAP3ISP_CCDC_LPF) {
779 		ccdc_configure_lpf(ccdc);
780 		ccdc->update &= ~OMAP3ISP_CCDC_LPF;
781 	}
782 
783 	if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
784 		ccdc_configure_clamp(ccdc);
785 		ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
786 	}
787 
788 	if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
789 		ccdc_configure_black_comp(ccdc);
790 		ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
791 	}
792 }
793 
794 /*
795  * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
796  * @dev: Pointer to ISP device
797  */
omap3isp_ccdc_restore_context(struct isp_device * isp)798 void omap3isp_ccdc_restore_context(struct isp_device *isp)
799 {
800 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
801 
802 	isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
803 
804 	ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
805 		     | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
806 	ccdc_apply_controls(ccdc);
807 	ccdc_configure_fpc(ccdc);
808 }
809 
810 /* -----------------------------------------------------------------------------
811  * Format- and pipeline-related configuration helpers
812  */
813 
814 /*
815  * ccdc_config_vp - Configure the Video Port.
816  * @ccdc: Pointer to ISP CCDC device.
817  */
ccdc_config_vp(struct isp_ccdc_device * ccdc)818 static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
819 {
820 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
821 	struct isp_device *isp = to_isp_device(ccdc);
822 	const struct isp_format_info *info;
823 	unsigned long l3_ick = pipe->l3_ick;
824 	unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
825 	unsigned int div = 0;
826 	u32 fmtcfg_vp;
827 
828 	fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
829 		  & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
830 
831 	info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
832 
833 	switch (info->width) {
834 	case 8:
835 	case 10:
836 		fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
837 		break;
838 	case 11:
839 		fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
840 		break;
841 	case 12:
842 		fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
843 		break;
844 	case 13:
845 		fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
846 		break;
847 	}
848 
849 	if (pipe->input)
850 		div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
851 	else if (pipe->external_rate)
852 		div = l3_ick / pipe->external_rate;
853 
854 	div = clamp(div, 2U, max_div);
855 	fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
856 
857 	isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
858 }
859 
860 /*
861  * ccdc_enable_vp - Enable Video Port.
862  * @ccdc: Pointer to ISP CCDC device.
863  * @enable: 0 Disables VP, 1 Enables VP
864  *
865  * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
866  */
ccdc_enable_vp(struct isp_ccdc_device * ccdc,u8 enable)867 static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
868 {
869 	struct isp_device *isp = to_isp_device(ccdc);
870 
871 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
872 			ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
873 }
874 
875 /*
876  * ccdc_config_outlineoffset - Configure memory saving output line offset
877  * @ccdc: Pointer to ISP CCDC device.
878  * @offset: Address offset to start a new line. Must be twice the
879  *          Output width and aligned on 32 byte boundary
880  * @oddeven: Specifies the odd/even line pattern to be chosen to store the
881  *           output.
882  * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
883  *
884  * - Configures the output line offset when stored in memory
885  * - Sets the odd/even line pattern to store the output
886  *    (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
887  * - Configures the number of even and odd line fields in case of rearranging
888  * the lines.
889  */
ccdc_config_outlineoffset(struct isp_ccdc_device * ccdc,u32 offset,u8 oddeven,u8 numlines)890 static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
891 					u32 offset, u8 oddeven, u8 numlines)
892 {
893 	struct isp_device *isp = to_isp_device(ccdc);
894 
895 	isp_reg_writel(isp, offset & 0xffff,
896 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
897 
898 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
899 		    ISPCCDC_SDOFST_FINV);
900 
901 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
902 		    ISPCCDC_SDOFST_FOFST_4L);
903 
904 	switch (oddeven) {
905 	case EVENEVEN:
906 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
907 			    (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
908 		break;
909 	case ODDEVEN:
910 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
911 			    (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
912 		break;
913 	case EVENODD:
914 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
915 			    (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
916 		break;
917 	case ODDODD:
918 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
919 			    (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
920 		break;
921 	default:
922 		break;
923 	}
924 }
925 
926 /*
927  * ccdc_set_outaddr - Set memory address to save output image
928  * @ccdc: Pointer to ISP CCDC device.
929  * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
930  *
931  * Sets the memory address where the output will be saved.
932  */
ccdc_set_outaddr(struct isp_ccdc_device * ccdc,u32 addr)933 static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
934 {
935 	struct isp_device *isp = to_isp_device(ccdc);
936 
937 	isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
938 }
939 
940 /*
941  * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
942  * @ccdc: Pointer to ISP CCDC device.
943  * @max_rate: Maximum calculated data rate.
944  *
945  * Returns in *max_rate less value between calculated and passed
946  */
omap3isp_ccdc_max_rate(struct isp_ccdc_device * ccdc,unsigned int * max_rate)947 void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
948 			    unsigned int *max_rate)
949 {
950 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
951 	unsigned int rate;
952 
953 	if (pipe == NULL)
954 		return;
955 
956 	/*
957 	 * TRM says that for parallel sensors the maximum data rate
958 	 * should be 90% form L3/2 clock, otherwise just L3/2.
959 	 */
960 	if (ccdc->input == CCDC_INPUT_PARALLEL)
961 		rate = pipe->l3_ick / 2 * 9 / 10;
962 	else
963 		rate = pipe->l3_ick / 2;
964 
965 	*max_rate = min(*max_rate, rate);
966 }
967 
968 /*
969  * ccdc_config_sync_if - Set CCDC sync interface configuration
970  * @ccdc: Pointer to ISP CCDC device.
971  * @pdata: Parallel interface platform data (may be NULL)
972  * @data_size: Data size
973  */
ccdc_config_sync_if(struct isp_ccdc_device * ccdc,struct isp_parallel_platform_data * pdata,unsigned int data_size)974 static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
975 				struct isp_parallel_platform_data *pdata,
976 				unsigned int data_size)
977 {
978 	struct isp_device *isp = to_isp_device(ccdc);
979 	const struct v4l2_mbus_framefmt *format;
980 	u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
981 
982 	format = &ccdc->formats[CCDC_PAD_SINK];
983 
984 	if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
985 	    format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
986 		/* The bridge is enabled for YUV8 formats. Configure the input
987 		 * mode accordingly.
988 		 */
989 		syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
990 	}
991 
992 	switch (data_size) {
993 	case 8:
994 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
995 		break;
996 	case 10:
997 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
998 		break;
999 	case 11:
1000 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
1001 		break;
1002 	case 12:
1003 		syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
1004 		break;
1005 	}
1006 
1007 	if (pdata && pdata->data_pol)
1008 		syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
1009 
1010 	if (pdata && pdata->hs_pol)
1011 		syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
1012 
1013 	if (pdata && pdata->vs_pol)
1014 		syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
1015 
1016 	isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1017 
1018 	/* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
1019 	 * hardware seems to ignore it in all other input modes.
1020 	 */
1021 	if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
1022 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1023 			    ISPCCDC_CFG_Y8POS);
1024 	else
1025 		isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1026 			    ISPCCDC_CFG_Y8POS);
1027 
1028 	isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
1029 		    ISPCCDC_REC656IF_R656ON);
1030 }
1031 
1032 /* CCDC formats descriptions */
1033 static const u32 ccdc_sgrbg_pattern =
1034 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1035 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1036 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1037 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1038 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1039 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1040 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1041 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1042 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1043 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1044 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1045 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1046 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1047 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1048 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1049 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1050 
1051 static const u32 ccdc_srggb_pattern =
1052 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1053 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1054 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1055 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1056 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1057 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1058 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1059 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1060 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1061 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1062 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1063 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1064 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1065 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1066 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1067 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1068 
1069 static const u32 ccdc_sbggr_pattern =
1070 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1071 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1072 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1073 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1074 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1075 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1076 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1077 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1078 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1079 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1080 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1081 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1082 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1083 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1084 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1085 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1086 
1087 static const u32 ccdc_sgbrg_pattern =
1088 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
1089 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
1090 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
1091 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
1092 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
1093 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
1094 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
1095 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
1096 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
1097 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
1098 	ISPCCDC_COLPTN_Gb_G  << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
1099 	ISPCCDC_COLPTN_B_Mg  << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
1100 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
1101 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
1102 	ISPCCDC_COLPTN_R_Ye  << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
1103 	ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
1104 
ccdc_configure(struct isp_ccdc_device * ccdc)1105 static void ccdc_configure(struct isp_ccdc_device *ccdc)
1106 {
1107 	struct isp_device *isp = to_isp_device(ccdc);
1108 	struct isp_parallel_platform_data *pdata = NULL;
1109 	struct v4l2_subdev *sensor;
1110 	struct v4l2_mbus_framefmt *format;
1111 	const struct v4l2_rect *crop;
1112 	const struct isp_format_info *fmt_info;
1113 	struct v4l2_subdev_format fmt_src;
1114 	unsigned int depth_out;
1115 	unsigned int depth_in = 0;
1116 	struct media_pad *pad;
1117 	unsigned long flags;
1118 	unsigned int bridge;
1119 	unsigned int shift;
1120 	u32 syn_mode;
1121 	u32 ccdc_pattern;
1122 
1123 	pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
1124 	sensor = media_entity_to_v4l2_subdev(pad->entity);
1125 	if (ccdc->input == CCDC_INPUT_PARALLEL)
1126 		pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
1127 			->bus.parallel;
1128 
1129 	/* Compute the lane shifter shift value and enable the bridge when the
1130 	 * input format is YUV.
1131 	 */
1132 	fmt_src.pad = pad->index;
1133 	fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1134 	if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
1135 		fmt_info = omap3isp_video_format_info(fmt_src.format.code);
1136 		depth_in = fmt_info->width;
1137 	}
1138 
1139 	fmt_info = omap3isp_video_format_info
1140 		(isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
1141 	depth_out = fmt_info->width;
1142 	shift = depth_in - depth_out;
1143 
1144 	if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
1145 		bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
1146 	else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
1147 		bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
1148 	else
1149 		bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
1150 
1151 	omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
1152 
1153 	ccdc_config_sync_if(ccdc, pdata, depth_out);
1154 
1155 	syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1156 
1157 	/* Use the raw, unprocessed data when writing to memory. The H3A and
1158 	 * histogram modules are still fed with lens shading corrected data.
1159 	 */
1160 	syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
1161 
1162 	if (ccdc->output & CCDC_OUTPUT_MEMORY)
1163 		syn_mode |= ISPCCDC_SYN_MODE_WEN;
1164 	else
1165 		syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
1166 
1167 	if (ccdc->output & CCDC_OUTPUT_RESIZER)
1168 		syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
1169 	else
1170 		syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
1171 
1172 	/* CCDC_PAD_SINK */
1173 	format = &ccdc->formats[CCDC_PAD_SINK];
1174 
1175 	/* Mosaic filter */
1176 	switch (format->code) {
1177 	case V4L2_MBUS_FMT_SRGGB10_1X10:
1178 	case V4L2_MBUS_FMT_SRGGB12_1X12:
1179 		ccdc_pattern = ccdc_srggb_pattern;
1180 		break;
1181 	case V4L2_MBUS_FMT_SBGGR10_1X10:
1182 	case V4L2_MBUS_FMT_SBGGR12_1X12:
1183 		ccdc_pattern = ccdc_sbggr_pattern;
1184 		break;
1185 	case V4L2_MBUS_FMT_SGBRG10_1X10:
1186 	case V4L2_MBUS_FMT_SGBRG12_1X12:
1187 		ccdc_pattern = ccdc_sgbrg_pattern;
1188 		break;
1189 	default:
1190 		/* Use GRBG */
1191 		ccdc_pattern = ccdc_sgrbg_pattern;
1192 		break;
1193 	}
1194 	ccdc_config_imgattr(ccdc, ccdc_pattern);
1195 
1196 	/* Generate VD0 on the last line of the image and VD1 on the
1197 	 * 2/3 height line.
1198 	 */
1199 	isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
1200 		       ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
1201 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
1202 
1203 	/* CCDC_PAD_SOURCE_OF */
1204 	format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
1205 	crop = &ccdc->crop;
1206 
1207 	isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
1208 		       ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
1209 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
1210 	isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
1211 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
1212 	isp_reg_writel(isp, (crop->height - 1)
1213 			<< ISPCCDC_VERT_LINES_NLV_SHIFT,
1214 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
1215 
1216 	ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
1217 
1218 	/* The CCDC outputs data in UYVY order by default. Swap bytes to get
1219 	 * YUYV.
1220 	 */
1221 	if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
1222 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1223 			    ISPCCDC_CFG_BSWD);
1224 	else
1225 		isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1226 			    ISPCCDC_CFG_BSWD);
1227 
1228 	/* Use PACK8 mode for 1byte per pixel formats. */
1229 	if (omap3isp_video_format_info(format->code)->width <= 8)
1230 		syn_mode |= ISPCCDC_SYN_MODE_PACK8;
1231 	else
1232 		syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
1233 
1234 	isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
1235 
1236 	/* CCDC_PAD_SOURCE_VP */
1237 	format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
1238 
1239 	isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
1240 		       (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
1241 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
1242 	isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
1243 		       ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
1244 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
1245 
1246 	isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
1247 		       (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
1248 		       OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
1249 
1250 	/* Lens shading correction. */
1251 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1252 	if (ccdc->lsc.request == NULL)
1253 		goto unlock;
1254 
1255 	WARN_ON(ccdc->lsc.active);
1256 
1257 	/* Get last good LSC configuration. If it is not supported for
1258 	 * the current active resolution discard it.
1259 	 */
1260 	if (ccdc->lsc.active == NULL &&
1261 	    __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
1262 		ccdc->lsc.active = ccdc->lsc.request;
1263 	} else {
1264 		list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
1265 		schedule_work(&ccdc->lsc.table_work);
1266 	}
1267 
1268 	ccdc->lsc.request = NULL;
1269 
1270 unlock:
1271 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1272 
1273 	ccdc_apply_controls(ccdc);
1274 }
1275 
__ccdc_enable(struct isp_ccdc_device * ccdc,int enable)1276 static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
1277 {
1278 	struct isp_device *isp = to_isp_device(ccdc);
1279 
1280 	isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
1281 			ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
1282 }
1283 
ccdc_disable(struct isp_ccdc_device * ccdc)1284 static int ccdc_disable(struct isp_ccdc_device *ccdc)
1285 {
1286 	unsigned long flags;
1287 	int ret = 0;
1288 
1289 	spin_lock_irqsave(&ccdc->lock, flags);
1290 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1291 		ccdc->stopping = CCDC_STOP_REQUEST;
1292 	spin_unlock_irqrestore(&ccdc->lock, flags);
1293 
1294 	ret = wait_event_timeout(ccdc->wait,
1295 				 ccdc->stopping == CCDC_STOP_FINISHED,
1296 				 msecs_to_jiffies(2000));
1297 	if (ret == 0) {
1298 		ret = -ETIMEDOUT;
1299 		dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
1300 	}
1301 
1302 	omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
1303 
1304 	mutex_lock(&ccdc->ioctl_lock);
1305 	ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
1306 	ccdc->lsc.request = ccdc->lsc.active;
1307 	ccdc->lsc.active = NULL;
1308 	cancel_work_sync(&ccdc->lsc.table_work);
1309 	ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
1310 	mutex_unlock(&ccdc->ioctl_lock);
1311 
1312 	ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
1313 
1314 	return ret > 0 ? 0 : ret;
1315 }
1316 
ccdc_enable(struct isp_ccdc_device * ccdc)1317 static void ccdc_enable(struct isp_ccdc_device *ccdc)
1318 {
1319 	if (ccdc_lsc_is_configured(ccdc))
1320 		__ccdc_lsc_enable(ccdc, 1);
1321 	__ccdc_enable(ccdc, 1);
1322 }
1323 
1324 /* -----------------------------------------------------------------------------
1325  * Interrupt handling
1326  */
1327 
1328 /*
1329  * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
1330  * @ccdc: Pointer to ISP CCDC device.
1331  *
1332  * Returns zero if the CCDC is idle and the image has been written to
1333  * memory, too.
1334  */
ccdc_sbl_busy(struct isp_ccdc_device * ccdc)1335 static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
1336 {
1337 	struct isp_device *isp = to_isp_device(ccdc);
1338 
1339 	return omap3isp_ccdc_busy(ccdc)
1340 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
1341 		   ISPSBL_CCDC_WR_0_DATA_READY)
1342 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
1343 		   ISPSBL_CCDC_WR_0_DATA_READY)
1344 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
1345 		   ISPSBL_CCDC_WR_0_DATA_READY)
1346 		| (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
1347 		   ISPSBL_CCDC_WR_0_DATA_READY);
1348 }
1349 
1350 /*
1351  * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
1352  * @ccdc: Pointer to ISP CCDC device.
1353  * @max_wait: Max retry count in us for wait for idle/busy transition.
1354  */
ccdc_sbl_wait_idle(struct isp_ccdc_device * ccdc,unsigned int max_wait)1355 static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
1356 			      unsigned int max_wait)
1357 {
1358 	unsigned int wait = 0;
1359 
1360 	if (max_wait == 0)
1361 		max_wait = 10000; /* 10 ms */
1362 
1363 	for (wait = 0; wait <= max_wait; wait++) {
1364 		if (!ccdc_sbl_busy(ccdc))
1365 			return 0;
1366 
1367 		rmb();
1368 		udelay(1);
1369 	}
1370 
1371 	return -EBUSY;
1372 }
1373 
1374 /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
1375  * @ccdc: Pointer to ISP CCDC device.
1376  * @event: Pointing which event trigger handler
1377  *
1378  * Return 1 when the event and stopping request combination is satisfied,
1379  * zero otherwise.
1380  */
__ccdc_handle_stopping(struct isp_ccdc_device * ccdc,u32 event)1381 static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
1382 {
1383 	int rval = 0;
1384 
1385 	switch ((ccdc->stopping & 3) | event) {
1386 	case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
1387 		if (ccdc->lsc.state != LSC_STATE_STOPPED)
1388 			__ccdc_lsc_enable(ccdc, 0);
1389 		__ccdc_enable(ccdc, 0);
1390 		ccdc->stopping = CCDC_STOP_EXECUTED;
1391 		return 1;
1392 
1393 	case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
1394 		ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
1395 		if (ccdc->lsc.state == LSC_STATE_STOPPED)
1396 			ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1397 		rval = 1;
1398 		break;
1399 
1400 	case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
1401 		ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
1402 		rval = 1;
1403 		break;
1404 
1405 	case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
1406 		return 1;
1407 	}
1408 
1409 	if (ccdc->stopping == CCDC_STOP_FINISHED) {
1410 		wake_up(&ccdc->wait);
1411 		rval = 1;
1412 	}
1413 
1414 	return rval;
1415 }
1416 
ccdc_hs_vs_isr(struct isp_ccdc_device * ccdc)1417 static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
1418 {
1419 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1420 	struct video_device *vdev = ccdc->subdev.devnode;
1421 	struct v4l2_event event;
1422 
1423 	/* Frame number propagation */
1424 	atomic_inc(&pipe->frame_number);
1425 
1426 	memset(&event, 0, sizeof(event));
1427 	event.type = V4L2_EVENT_FRAME_SYNC;
1428 	event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
1429 
1430 	v4l2_event_queue(vdev, &event);
1431 }
1432 
1433 /*
1434  * ccdc_lsc_isr - Handle LSC events
1435  * @ccdc: Pointer to ISP CCDC device.
1436  * @events: LSC events
1437  */
ccdc_lsc_isr(struct isp_ccdc_device * ccdc,u32 events)1438 static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
1439 {
1440 	unsigned long flags;
1441 
1442 	if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
1443 		struct isp_pipeline *pipe =
1444 			to_isp_pipeline(&ccdc->subdev.entity);
1445 
1446 		ccdc_lsc_error_handler(ccdc);
1447 		pipe->error = true;
1448 		dev_dbg(to_device(ccdc), "lsc prefetch error\n");
1449 	}
1450 
1451 	if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
1452 		return;
1453 
1454 	/* LSC_DONE interrupt occur, there are two cases
1455 	 * 1. stopping for reconfiguration
1456 	 * 2. stopping because of STREAM OFF command
1457 	 */
1458 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1459 
1460 	if (ccdc->lsc.state == LSC_STATE_STOPPING)
1461 		ccdc->lsc.state = LSC_STATE_STOPPED;
1462 
1463 	if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
1464 		goto done;
1465 
1466 	if (ccdc->lsc.state != LSC_STATE_RECONFIG)
1467 		goto done;
1468 
1469 	/* LSC is in STOPPING state, change to the new state */
1470 	ccdc->lsc.state = LSC_STATE_STOPPED;
1471 
1472 	/* This is an exception. Start of frame and LSC_DONE interrupt
1473 	 * have been received on the same time. Skip this event and wait
1474 	 * for better times.
1475 	 */
1476 	if (events & IRQ0STATUS_HS_VS_IRQ)
1477 		goto done;
1478 
1479 	/* The LSC engine is stopped at this point. Enable it if there's a
1480 	 * pending request.
1481 	 */
1482 	if (ccdc->lsc.request == NULL)
1483 		goto done;
1484 
1485 	ccdc_lsc_enable(ccdc);
1486 
1487 done:
1488 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1489 }
1490 
ccdc_isr_buffer(struct isp_ccdc_device * ccdc)1491 static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
1492 {
1493 	struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
1494 	struct isp_device *isp = to_isp_device(ccdc);
1495 	struct isp_buffer *buffer;
1496 	int restart = 0;
1497 
1498 	/* The CCDC generates VD0 interrupts even when disabled (the datasheet
1499 	 * doesn't explicitly state if that's supposed to happen or not, so it
1500 	 * can be considered as a hardware bug or as a feature, but we have to
1501 	 * deal with it anyway). Disabling the CCDC when no buffer is available
1502 	 * would thus not be enough, we need to handle the situation explicitly.
1503 	 */
1504 	if (list_empty(&ccdc->video_out.dmaqueue))
1505 		goto done;
1506 
1507 	/* We're in continuous mode, and memory writes were disabled due to a
1508 	 * buffer underrun. Reenable them now that we have a buffer. The buffer
1509 	 * address has been set in ccdc_video_queue.
1510 	 */
1511 	if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
1512 		restart = 1;
1513 		ccdc->underrun = 0;
1514 		goto done;
1515 	}
1516 
1517 	if (ccdc_sbl_wait_idle(ccdc, 1000)) {
1518 		dev_info(isp->dev, "CCDC won't become idle!\n");
1519 		goto done;
1520 	}
1521 
1522 	buffer = omap3isp_video_buffer_next(&ccdc->video_out);
1523 	if (buffer != NULL) {
1524 		ccdc_set_outaddr(ccdc, buffer->isp_addr);
1525 		restart = 1;
1526 	}
1527 
1528 	pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1529 
1530 	if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1531 	    isp_pipeline_ready(pipe))
1532 		omap3isp_pipeline_set_stream(pipe,
1533 					ISP_PIPELINE_STREAM_SINGLESHOT);
1534 
1535 done:
1536 	return restart;
1537 }
1538 
1539 /*
1540  * ccdc_vd0_isr - Handle VD0 event
1541  * @ccdc: Pointer to ISP CCDC device.
1542  *
1543  * Executes LSC deferred enablement before next frame starts.
1544  */
ccdc_vd0_isr(struct isp_ccdc_device * ccdc)1545 static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
1546 {
1547 	unsigned long flags;
1548 	int restart = 0;
1549 
1550 	if (ccdc->output & CCDC_OUTPUT_MEMORY)
1551 		restart = ccdc_isr_buffer(ccdc);
1552 
1553 	spin_lock_irqsave(&ccdc->lock, flags);
1554 	if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
1555 		spin_unlock_irqrestore(&ccdc->lock, flags);
1556 		return;
1557 	}
1558 
1559 	if (!ccdc->shadow_update)
1560 		ccdc_apply_controls(ccdc);
1561 	spin_unlock_irqrestore(&ccdc->lock, flags);
1562 
1563 	if (restart)
1564 		ccdc_enable(ccdc);
1565 }
1566 
1567 /*
1568  * ccdc_vd1_isr - Handle VD1 event
1569  * @ccdc: Pointer to ISP CCDC device.
1570  */
ccdc_vd1_isr(struct isp_ccdc_device * ccdc)1571 static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
1572 {
1573 	unsigned long flags;
1574 
1575 	spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
1576 
1577 	/*
1578 	 * Depending on the CCDC pipeline state, CCDC stopping should be
1579 	 * handled differently. In SINGLESHOT we emulate an internal CCDC
1580 	 * stopping because the CCDC hw works only in continuous mode.
1581 	 * When CONTINUOUS pipeline state is used and the CCDC writes it's
1582 	 * data to memory the CCDC and LSC are stopped immediately but
1583 	 * without change the CCDC stopping state machine. The CCDC
1584 	 * stopping state machine should be used only when user request
1585 	 * for stopping is received (SINGLESHOT is an exeption).
1586 	 */
1587 	switch (ccdc->state) {
1588 	case ISP_PIPELINE_STREAM_SINGLESHOT:
1589 		ccdc->stopping = CCDC_STOP_REQUEST;
1590 		break;
1591 
1592 	case ISP_PIPELINE_STREAM_CONTINUOUS:
1593 		if (ccdc->output & CCDC_OUTPUT_MEMORY) {
1594 			if (ccdc->lsc.state != LSC_STATE_STOPPED)
1595 				__ccdc_lsc_enable(ccdc, 0);
1596 			__ccdc_enable(ccdc, 0);
1597 		}
1598 		break;
1599 
1600 	case ISP_PIPELINE_STREAM_STOPPED:
1601 		break;
1602 	}
1603 
1604 	if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
1605 		goto done;
1606 
1607 	if (ccdc->lsc.request == NULL)
1608 		goto done;
1609 
1610 	/*
1611 	 * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
1612 	 * do the appropriate changes in registers
1613 	 */
1614 	if (ccdc->lsc.state == LSC_STATE_RUNNING) {
1615 		__ccdc_lsc_enable(ccdc, 0);
1616 		ccdc->lsc.state = LSC_STATE_RECONFIG;
1617 		goto done;
1618 	}
1619 
1620 	/* LSC has been in STOPPED state, enable it */
1621 	if (ccdc->lsc.state == LSC_STATE_STOPPED)
1622 		ccdc_lsc_enable(ccdc);
1623 
1624 done:
1625 	spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
1626 }
1627 
1628 /*
1629  * omap3isp_ccdc_isr - Configure CCDC during interframe time.
1630  * @ccdc: Pointer to ISP CCDC device.
1631  * @events: CCDC events
1632  */
omap3isp_ccdc_isr(struct isp_ccdc_device * ccdc,u32 events)1633 int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
1634 {
1635 	if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
1636 		return 0;
1637 
1638 	if (events & IRQ0STATUS_CCDC_VD1_IRQ)
1639 		ccdc_vd1_isr(ccdc);
1640 
1641 	ccdc_lsc_isr(ccdc, events);
1642 
1643 	if (events & IRQ0STATUS_CCDC_VD0_IRQ)
1644 		ccdc_vd0_isr(ccdc);
1645 
1646 	if (events & IRQ0STATUS_HS_VS_IRQ)
1647 		ccdc_hs_vs_isr(ccdc);
1648 
1649 	return 0;
1650 }
1651 
1652 /* -----------------------------------------------------------------------------
1653  * ISP video operations
1654  */
1655 
ccdc_video_queue(struct isp_video * video,struct isp_buffer * buffer)1656 static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
1657 {
1658 	struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
1659 
1660 	if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
1661 		return -ENODEV;
1662 
1663 	ccdc_set_outaddr(ccdc, buffer->isp_addr);
1664 
1665 	/* We now have a buffer queued on the output, restart the pipeline
1666 	 * on the next CCDC interrupt if running in continuous mode (or when
1667 	 * starting the stream).
1668 	 */
1669 	ccdc->underrun = 1;
1670 
1671 	return 0;
1672 }
1673 
1674 static const struct isp_video_operations ccdc_video_ops = {
1675 	.queue = ccdc_video_queue,
1676 };
1677 
1678 /* -----------------------------------------------------------------------------
1679  * V4L2 subdev operations
1680  */
1681 
1682 /*
1683  * ccdc_ioctl - CCDC module private ioctl's
1684  * @sd: ISP CCDC V4L2 subdevice
1685  * @cmd: ioctl command
1686  * @arg: ioctl argument
1687  *
1688  * Return 0 on success or a negative error code otherwise.
1689  */
ccdc_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)1690 static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1691 {
1692 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1693 	int ret;
1694 
1695 	switch (cmd) {
1696 	case VIDIOC_OMAP3ISP_CCDC_CFG:
1697 		mutex_lock(&ccdc->ioctl_lock);
1698 		ret = ccdc_config(ccdc, arg);
1699 		mutex_unlock(&ccdc->ioctl_lock);
1700 		break;
1701 
1702 	default:
1703 		return -ENOIOCTLCMD;
1704 	}
1705 
1706 	return ret;
1707 }
1708 
ccdc_subscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1709 static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1710 				struct v4l2_event_subscription *sub)
1711 {
1712 	if (sub->type != V4L2_EVENT_FRAME_SYNC)
1713 		return -EINVAL;
1714 
1715 	/* line number is zero at frame start */
1716 	if (sub->id != 0)
1717 		return -EINVAL;
1718 
1719 	return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
1720 }
1721 
ccdc_unsubscribe_event(struct v4l2_subdev * sd,struct v4l2_fh * fh,struct v4l2_event_subscription * sub)1722 static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
1723 				  struct v4l2_event_subscription *sub)
1724 {
1725 	return v4l2_event_unsubscribe(fh, sub);
1726 }
1727 
1728 /*
1729  * ccdc_set_stream - Enable/Disable streaming on the CCDC module
1730  * @sd: ISP CCDC V4L2 subdevice
1731  * @enable: Enable/disable stream
1732  *
1733  * When writing to memory, the CCDC hardware can't be enabled without a memory
1734  * buffer to write to. As the s_stream operation is called in response to a
1735  * STREAMON call without any buffer queued yet, just update the enabled field
1736  * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
1737  *
1738  * When not writing to memory enable the CCDC immediately.
1739  */
ccdc_set_stream(struct v4l2_subdev * sd,int enable)1740 static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
1741 {
1742 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1743 	struct isp_device *isp = to_isp_device(ccdc);
1744 	int ret = 0;
1745 
1746 	if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
1747 		if (enable == ISP_PIPELINE_STREAM_STOPPED)
1748 			return 0;
1749 
1750 		omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
1751 		isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
1752 			    ISPCCDC_CFG_VDLC);
1753 
1754 		ccdc_configure(ccdc);
1755 
1756 		/* TODO: Don't configure the video port if all of its output
1757 		 * links are inactive.
1758 		 */
1759 		ccdc_config_vp(ccdc);
1760 		ccdc_enable_vp(ccdc, 1);
1761 		ccdc_print_status(ccdc);
1762 	}
1763 
1764 	switch (enable) {
1765 	case ISP_PIPELINE_STREAM_CONTINUOUS:
1766 		if (ccdc->output & CCDC_OUTPUT_MEMORY)
1767 			omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1768 
1769 		if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
1770 			ccdc_enable(ccdc);
1771 
1772 		ccdc->underrun = 0;
1773 		break;
1774 
1775 	case ISP_PIPELINE_STREAM_SINGLESHOT:
1776 		if (ccdc->output & CCDC_OUTPUT_MEMORY &&
1777 		    ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
1778 			omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1779 
1780 		ccdc_enable(ccdc);
1781 		break;
1782 
1783 	case ISP_PIPELINE_STREAM_STOPPED:
1784 		ret = ccdc_disable(ccdc);
1785 		if (ccdc->output & CCDC_OUTPUT_MEMORY)
1786 			omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
1787 		omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
1788 		ccdc->underrun = 0;
1789 		break;
1790 	}
1791 
1792 	ccdc->state = enable;
1793 	return ret;
1794 }
1795 
1796 static struct v4l2_mbus_framefmt *
__ccdc_get_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_fh * fh,unsigned int pad,enum v4l2_subdev_format_whence which)1797 __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1798 		  unsigned int pad, enum v4l2_subdev_format_whence which)
1799 {
1800 	if (which == V4L2_SUBDEV_FORMAT_TRY)
1801 		return v4l2_subdev_get_try_format(fh, pad);
1802 	else
1803 		return &ccdc->formats[pad];
1804 }
1805 
1806 static struct v4l2_rect *
__ccdc_get_crop(struct isp_ccdc_device * ccdc,struct v4l2_subdev_fh * fh,enum v4l2_subdev_format_whence which)1807 __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1808 		enum v4l2_subdev_format_whence which)
1809 {
1810 	if (which == V4L2_SUBDEV_FORMAT_TRY)
1811 		return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
1812 	else
1813 		return &ccdc->crop;
1814 }
1815 
1816 /*
1817  * ccdc_try_format - Try video format on a pad
1818  * @ccdc: ISP CCDC device
1819  * @fh : V4L2 subdev file handle
1820  * @pad: Pad number
1821  * @fmt: Format
1822  */
1823 static void
ccdc_try_format(struct isp_ccdc_device * ccdc,struct v4l2_subdev_fh * fh,unsigned int pad,struct v4l2_mbus_framefmt * fmt,enum v4l2_subdev_format_whence which)1824 ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
1825 		unsigned int pad, struct v4l2_mbus_framefmt *fmt,
1826 		enum v4l2_subdev_format_whence which)
1827 {
1828 	const struct isp_format_info *info;
1829 	enum v4l2_mbus_pixelcode pixelcode;
1830 	unsigned int width = fmt->width;
1831 	unsigned int height = fmt->height;
1832 	struct v4l2_rect *crop;
1833 	unsigned int i;
1834 
1835 	switch (pad) {
1836 	case CCDC_PAD_SINK:
1837 		for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
1838 			if (fmt->code == ccdc_fmts[i])
1839 				break;
1840 		}
1841 
1842 		/* If not found, use SGRBG10 as default */
1843 		if (i >= ARRAY_SIZE(ccdc_fmts))
1844 			fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1845 
1846 		/* Clamp the input size. */
1847 		fmt->width = clamp_t(u32, width, 32, 4096);
1848 		fmt->height = clamp_t(u32, height, 32, 4096);
1849 		break;
1850 
1851 	case CCDC_PAD_SOURCE_OF:
1852 		pixelcode = fmt->code;
1853 		*fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1854 
1855 		/* YUV formats are converted from 2X8 to 1X16 by the bridge and
1856 		 * can be byte-swapped.
1857 		 */
1858 		if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1859 		    fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1860 			/* Use the user requested format if YUV. */
1861 			if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
1862 			    pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
1863 			    pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
1864 			    pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
1865 				fmt->code = pixelcode;
1866 
1867 			if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
1868 				fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1869 			else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1870 				fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
1871 		}
1872 
1873 		/* Hardcode the output size to the crop rectangle size. */
1874 		crop = __ccdc_get_crop(ccdc, fh, which);
1875 		fmt->width = crop->width;
1876 		fmt->height = crop->height;
1877 		break;
1878 
1879 	case CCDC_PAD_SOURCE_VP:
1880 		*fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
1881 
1882 		/* The video port interface truncates the data to 10 bits. */
1883 		info = omap3isp_video_format_info(fmt->code);
1884 		fmt->code = info->truncated;
1885 
1886 		/* YUV formats are not supported by the video port. */
1887 		if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1888 		    fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
1889 			fmt->code = 0;
1890 
1891 		/* The number of lines that can be clocked out from the video
1892 		 * port output must be at least one line less than the number
1893 		 * of input lines.
1894 		 */
1895 		fmt->width = clamp_t(u32, width, 32, fmt->width);
1896 		fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
1897 		break;
1898 	}
1899 
1900 	/* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
1901 	 * stored on 2 bytes.
1902 	 */
1903 	fmt->colorspace = V4L2_COLORSPACE_SRGB;
1904 	fmt->field = V4L2_FIELD_NONE;
1905 }
1906 
1907 /*
1908  * ccdc_try_crop - Validate a crop rectangle
1909  * @ccdc: ISP CCDC device
1910  * @sink: format on the sink pad
1911  * @crop: crop rectangle to be validated
1912  */
ccdc_try_crop(struct isp_ccdc_device * ccdc,const struct v4l2_mbus_framefmt * sink,struct v4l2_rect * crop)1913 static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
1914 			  const struct v4l2_mbus_framefmt *sink,
1915 			  struct v4l2_rect *crop)
1916 {
1917 	const struct isp_format_info *info;
1918 	unsigned int max_width;
1919 
1920 	/* For Bayer formats, restrict left/top and width/height to even values
1921 	 * to keep the Bayer pattern.
1922 	 */
1923 	info = omap3isp_video_format_info(sink->code);
1924 	if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1925 		crop->left &= ~1;
1926 		crop->top &= ~1;
1927 	}
1928 
1929 	crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
1930 	crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
1931 
1932 	/* The data formatter truncates the number of horizontal output pixels
1933 	 * to a multiple of 16. To avoid clipping data, allow callers to request
1934 	 * an output size bigger than the input size up to the nearest multiple
1935 	 * of 16.
1936 	 */
1937 	max_width = (sink->width - crop->left + 15) & ~15;
1938 	crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
1939 		    & ~15;
1940 	crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
1941 			       sink->height - crop->top);
1942 
1943 	/* Odd width/height values don't make sense for Bayer formats. */
1944 	if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
1945 		crop->width &= ~1;
1946 		crop->height &= ~1;
1947 	}
1948 }
1949 
1950 /*
1951  * ccdc_enum_mbus_code - Handle pixel format enumeration
1952  * @sd     : pointer to v4l2 subdev structure
1953  * @fh : V4L2 subdev file handle
1954  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
1955  * return -EINVAL or zero on success
1956  */
ccdc_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_mbus_code_enum * code)1957 static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
1958 			       struct v4l2_subdev_fh *fh,
1959 			       struct v4l2_subdev_mbus_code_enum *code)
1960 {
1961 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
1962 	struct v4l2_mbus_framefmt *format;
1963 
1964 	switch (code->pad) {
1965 	case CCDC_PAD_SINK:
1966 		if (code->index >= ARRAY_SIZE(ccdc_fmts))
1967 			return -EINVAL;
1968 
1969 		code->code = ccdc_fmts[code->index];
1970 		break;
1971 
1972 	case CCDC_PAD_SOURCE_OF:
1973 		format = __ccdc_get_format(ccdc, fh, code->pad,
1974 					   V4L2_SUBDEV_FORMAT_TRY);
1975 
1976 		if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
1977 		    format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
1978 			/* In YUV mode the CCDC can swap bytes. */
1979 			if (code->index == 0)
1980 				code->code = V4L2_MBUS_FMT_YUYV8_1X16;
1981 			else if (code->index == 1)
1982 				code->code = V4L2_MBUS_FMT_UYVY8_1X16;
1983 			else
1984 				return -EINVAL;
1985 		} else {
1986 			/* In raw mode, no configurable format confversion is
1987 			 * available.
1988 			 */
1989 			if (code->index == 0)
1990 				code->code = format->code;
1991 			else
1992 				return -EINVAL;
1993 		}
1994 		break;
1995 
1996 	case CCDC_PAD_SOURCE_VP:
1997 		/* The CCDC supports no configurable format conversion
1998 		 * compatible with the video port. Enumerate a single output
1999 		 * format code.
2000 		 */
2001 		if (code->index != 0)
2002 			return -EINVAL;
2003 
2004 		format = __ccdc_get_format(ccdc, fh, code->pad,
2005 					   V4L2_SUBDEV_FORMAT_TRY);
2006 
2007 		/* A pixel code equal to 0 means that the video port doesn't
2008 		 * support the input format. Don't enumerate any pixel code.
2009 		 */
2010 		if (format->code == 0)
2011 			return -EINVAL;
2012 
2013 		code->code = format->code;
2014 		break;
2015 
2016 	default:
2017 		return -EINVAL;
2018 	}
2019 
2020 	return 0;
2021 }
2022 
ccdc_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_frame_size_enum * fse)2023 static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
2024 				struct v4l2_subdev_fh *fh,
2025 				struct v4l2_subdev_frame_size_enum *fse)
2026 {
2027 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2028 	struct v4l2_mbus_framefmt format;
2029 
2030 	if (fse->index != 0)
2031 		return -EINVAL;
2032 
2033 	format.code = fse->code;
2034 	format.width = 1;
2035 	format.height = 1;
2036 	ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2037 	fse->min_width = format.width;
2038 	fse->min_height = format.height;
2039 
2040 	if (format.code != fse->code)
2041 		return -EINVAL;
2042 
2043 	format.code = fse->code;
2044 	format.width = -1;
2045 	format.height = -1;
2046 	ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
2047 	fse->max_width = format.width;
2048 	fse->max_height = format.height;
2049 
2050 	return 0;
2051 }
2052 
2053 /*
2054  * ccdc_get_selection - Retrieve a selection rectangle on a pad
2055  * @sd: ISP CCDC V4L2 subdevice
2056  * @fh: V4L2 subdev file handle
2057  * @sel: Selection rectangle
2058  *
2059  * The only supported rectangles are the crop rectangles on the output formatter
2060  * source pad.
2061  *
2062  * Return 0 on success or a negative error code otherwise.
2063  */
ccdc_get_selection(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_selection * sel)2064 static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2065 			      struct v4l2_subdev_selection *sel)
2066 {
2067 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2068 	struct v4l2_mbus_framefmt *format;
2069 
2070 	if (sel->pad != CCDC_PAD_SOURCE_OF)
2071 		return -EINVAL;
2072 
2073 	switch (sel->target) {
2074 	case V4L2_SEL_TGT_CROP_BOUNDS:
2075 		sel->r.left = 0;
2076 		sel->r.top = 0;
2077 		sel->r.width = INT_MAX;
2078 		sel->r.height = INT_MAX;
2079 
2080 		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2081 		ccdc_try_crop(ccdc, format, &sel->r);
2082 		break;
2083 
2084 	case V4L2_SEL_TGT_CROP:
2085 		sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2086 		break;
2087 
2088 	default:
2089 		return -EINVAL;
2090 	}
2091 
2092 	return 0;
2093 }
2094 
2095 /*
2096  * ccdc_set_selection - Set a selection rectangle on a pad
2097  * @sd: ISP CCDC V4L2 subdevice
2098  * @fh: V4L2 subdev file handle
2099  * @sel: Selection rectangle
2100  *
2101  * The only supported rectangle is the actual crop rectangle on the output
2102  * formatter source pad.
2103  *
2104  * Return 0 on success or a negative error code otherwise.
2105  */
ccdc_set_selection(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_selection * sel)2106 static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2107 			      struct v4l2_subdev_selection *sel)
2108 {
2109 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2110 	struct v4l2_mbus_framefmt *format;
2111 
2112 	if (sel->target != V4L2_SEL_TGT_CROP ||
2113 	    sel->pad != CCDC_PAD_SOURCE_OF)
2114 		return -EINVAL;
2115 
2116 	/* The crop rectangle can't be changed while streaming. */
2117 	if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
2118 		return -EBUSY;
2119 
2120 	/* Modifying the crop rectangle always changes the format on the source
2121 	 * pad. If the KEEP_CONFIG flag is set, just return the current crop
2122 	 * rectangle.
2123 	 */
2124 	if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
2125 		sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
2126 		return 0;
2127 	}
2128 
2129 	format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
2130 	ccdc_try_crop(ccdc, format, &sel->r);
2131 	*__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
2132 
2133 	/* Update the source format. */
2134 	format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
2135 	ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
2136 
2137 	return 0;
2138 }
2139 
2140 /*
2141  * ccdc_get_format - Retrieve the video format on a pad
2142  * @sd : ISP CCDC V4L2 subdevice
2143  * @fh : V4L2 subdev file handle
2144  * @fmt: Format
2145  *
2146  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2147  * to the format type.
2148  */
ccdc_get_format(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_format * fmt)2149 static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2150 			   struct v4l2_subdev_format *fmt)
2151 {
2152 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2153 	struct v4l2_mbus_framefmt *format;
2154 
2155 	format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2156 	if (format == NULL)
2157 		return -EINVAL;
2158 
2159 	fmt->format = *format;
2160 	return 0;
2161 }
2162 
2163 /*
2164  * ccdc_set_format - Set the video format on a pad
2165  * @sd : ISP CCDC V4L2 subdevice
2166  * @fh : V4L2 subdev file handle
2167  * @fmt: Format
2168  *
2169  * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
2170  * to the format type.
2171  */
ccdc_set_format(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh,struct v4l2_subdev_format * fmt)2172 static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2173 			   struct v4l2_subdev_format *fmt)
2174 {
2175 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2176 	struct v4l2_mbus_framefmt *format;
2177 	struct v4l2_rect *crop;
2178 
2179 	format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
2180 	if (format == NULL)
2181 		return -EINVAL;
2182 
2183 	ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
2184 	*format = fmt->format;
2185 
2186 	/* Propagate the format from sink to source */
2187 	if (fmt->pad == CCDC_PAD_SINK) {
2188 		/* Reset the crop rectangle. */
2189 		crop = __ccdc_get_crop(ccdc, fh, fmt->which);
2190 		crop->left = 0;
2191 		crop->top = 0;
2192 		crop->width = fmt->format.width;
2193 		crop->height = fmt->format.height;
2194 
2195 		ccdc_try_crop(ccdc, &fmt->format, crop);
2196 
2197 		/* Update the source formats. */
2198 		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
2199 					   fmt->which);
2200 		*format = fmt->format;
2201 		ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
2202 				fmt->which);
2203 
2204 		format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
2205 					   fmt->which);
2206 		*format = fmt->format;
2207 		ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
2208 				fmt->which);
2209 	}
2210 
2211 	return 0;
2212 }
2213 
2214 /*
2215  * Decide whether desired output pixel code can be obtained with
2216  * the lane shifter by shifting the input pixel code.
2217  * @in: input pixelcode to shifter
2218  * @out: output pixelcode from shifter
2219  * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
2220  *
2221  * return true if the combination is possible
2222  * return false otherwise
2223  */
ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,enum v4l2_mbus_pixelcode out,unsigned int additional_shift)2224 static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
2225 			      enum v4l2_mbus_pixelcode out,
2226 			      unsigned int additional_shift)
2227 {
2228 	const struct isp_format_info *in_info, *out_info;
2229 
2230 	if (in == out)
2231 		return true;
2232 
2233 	in_info = omap3isp_video_format_info(in);
2234 	out_info = omap3isp_video_format_info(out);
2235 
2236 	if ((in_info->flavor == 0) || (out_info->flavor == 0))
2237 		return false;
2238 
2239 	if (in_info->flavor != out_info->flavor)
2240 		return false;
2241 
2242 	return in_info->width - out_info->width + additional_shift <= 6;
2243 }
2244 
ccdc_link_validate(struct v4l2_subdev * sd,struct media_link * link,struct v4l2_subdev_format * source_fmt,struct v4l2_subdev_format * sink_fmt)2245 static int ccdc_link_validate(struct v4l2_subdev *sd,
2246 			      struct media_link *link,
2247 			      struct v4l2_subdev_format *source_fmt,
2248 			      struct v4l2_subdev_format *sink_fmt)
2249 {
2250 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2251 	unsigned long parallel_shift;
2252 
2253 	/* Check if the two ends match */
2254 	if (source_fmt->format.width != sink_fmt->format.width ||
2255 	    source_fmt->format.height != sink_fmt->format.height)
2256 		return -EPIPE;
2257 
2258 	/* We've got a parallel sensor here. */
2259 	if (ccdc->input == CCDC_INPUT_PARALLEL) {
2260 		struct isp_parallel_platform_data *pdata =
2261 			&((struct isp_v4l2_subdevs_group *)
2262 			  media_entity_to_v4l2_subdev(link->source->entity)
2263 			  ->host_priv)->bus.parallel;
2264 		parallel_shift = pdata->data_lane_shift * 2;
2265 	} else {
2266 		parallel_shift = 0;
2267 	}
2268 
2269 	/* Lane shifter may be used to drop bits on CCDC sink pad */
2270 	if (!ccdc_is_shiftable(source_fmt->format.code,
2271 			       sink_fmt->format.code, parallel_shift))
2272 		return -EPIPE;
2273 
2274 	return 0;
2275 }
2276 
2277 /*
2278  * ccdc_init_formats - Initialize formats on all pads
2279  * @sd: ISP CCDC V4L2 subdevice
2280  * @fh: V4L2 subdev file handle
2281  *
2282  * Initialize all pad formats with default values. If fh is not NULL, try
2283  * formats are initialized on the file handle. Otherwise active formats are
2284  * initialized on the device.
2285  */
ccdc_init_formats(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)2286 static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
2287 {
2288 	struct v4l2_subdev_format format;
2289 
2290 	memset(&format, 0, sizeof(format));
2291 	format.pad = CCDC_PAD_SINK;
2292 	format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2293 	format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2294 	format.format.width = 4096;
2295 	format.format.height = 4096;
2296 	ccdc_set_format(sd, fh, &format);
2297 
2298 	return 0;
2299 }
2300 
2301 /* V4L2 subdev core operations */
2302 static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
2303 	.ioctl = ccdc_ioctl,
2304 	.subscribe_event = ccdc_subscribe_event,
2305 	.unsubscribe_event = ccdc_unsubscribe_event,
2306 };
2307 
2308 /* V4L2 subdev video operations */
2309 static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
2310 	.s_stream = ccdc_set_stream,
2311 };
2312 
2313 /* V4L2 subdev pad operations */
2314 static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
2315 	.enum_mbus_code = ccdc_enum_mbus_code,
2316 	.enum_frame_size = ccdc_enum_frame_size,
2317 	.get_fmt = ccdc_get_format,
2318 	.set_fmt = ccdc_set_format,
2319 	.get_selection = ccdc_get_selection,
2320 	.set_selection = ccdc_set_selection,
2321 	.link_validate = ccdc_link_validate,
2322 };
2323 
2324 /* V4L2 subdev operations */
2325 static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
2326 	.core = &ccdc_v4l2_core_ops,
2327 	.video = &ccdc_v4l2_video_ops,
2328 	.pad = &ccdc_v4l2_pad_ops,
2329 };
2330 
2331 /* V4L2 subdev internal operations */
2332 static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
2333 	.open = ccdc_init_formats,
2334 };
2335 
2336 /* -----------------------------------------------------------------------------
2337  * Media entity operations
2338  */
2339 
2340 /*
2341  * ccdc_link_setup - Setup CCDC connections
2342  * @entity: CCDC media entity
2343  * @local: Pad at the local end of the link
2344  * @remote: Pad at the remote end of the link
2345  * @flags: Link flags
2346  *
2347  * return -EINVAL or zero on success
2348  */
ccdc_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)2349 static int ccdc_link_setup(struct media_entity *entity,
2350 			   const struct media_pad *local,
2351 			   const struct media_pad *remote, u32 flags)
2352 {
2353 	struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2354 	struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
2355 	struct isp_device *isp = to_isp_device(ccdc);
2356 
2357 	switch (local->index | media_entity_type(remote->entity)) {
2358 	case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2359 		/* Read from the sensor (parallel interface), CCP2, CSI2a or
2360 		 * CSI2c.
2361 		 */
2362 		if (!(flags & MEDIA_LNK_FL_ENABLED)) {
2363 			ccdc->input = CCDC_INPUT_NONE;
2364 			break;
2365 		}
2366 
2367 		if (ccdc->input != CCDC_INPUT_NONE)
2368 			return -EBUSY;
2369 
2370 		if (remote->entity == &isp->isp_ccp2.subdev.entity)
2371 			ccdc->input = CCDC_INPUT_CCP2B;
2372 		else if (remote->entity == &isp->isp_csi2a.subdev.entity)
2373 			ccdc->input = CCDC_INPUT_CSI2A;
2374 		else if (remote->entity == &isp->isp_csi2c.subdev.entity)
2375 			ccdc->input = CCDC_INPUT_CSI2C;
2376 		else
2377 			ccdc->input = CCDC_INPUT_PARALLEL;
2378 
2379 		break;
2380 
2381 	/*
2382 	 * The ISP core doesn't support pipelines with multiple video outputs.
2383 	 * Revisit this when it will be implemented, and return -EBUSY for now.
2384 	 */
2385 
2386 	case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
2387 		/* Write to preview engine, histogram and H3A. When none of
2388 		 * those links are active, the video port can be disabled.
2389 		 */
2390 		if (flags & MEDIA_LNK_FL_ENABLED) {
2391 			if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
2392 				return -EBUSY;
2393 			ccdc->output |= CCDC_OUTPUT_PREVIEW;
2394 		} else {
2395 			ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
2396 		}
2397 		break;
2398 
2399 	case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
2400 		/* Write to memory */
2401 		if (flags & MEDIA_LNK_FL_ENABLED) {
2402 			if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
2403 				return -EBUSY;
2404 			ccdc->output |= CCDC_OUTPUT_MEMORY;
2405 		} else {
2406 			ccdc->output &= ~CCDC_OUTPUT_MEMORY;
2407 		}
2408 		break;
2409 
2410 	case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
2411 		/* Write to resizer */
2412 		if (flags & MEDIA_LNK_FL_ENABLED) {
2413 			if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
2414 				return -EBUSY;
2415 			ccdc->output |= CCDC_OUTPUT_RESIZER;
2416 		} else {
2417 			ccdc->output &= ~CCDC_OUTPUT_RESIZER;
2418 		}
2419 		break;
2420 
2421 	default:
2422 		return -EINVAL;
2423 	}
2424 
2425 	return 0;
2426 }
2427 
2428 /* media operations */
2429 static const struct media_entity_operations ccdc_media_ops = {
2430 	.link_setup = ccdc_link_setup,
2431 	.link_validate = v4l2_subdev_link_validate,
2432 };
2433 
omap3isp_ccdc_unregister_entities(struct isp_ccdc_device * ccdc)2434 void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
2435 {
2436 	v4l2_device_unregister_subdev(&ccdc->subdev);
2437 	omap3isp_video_unregister(&ccdc->video_out);
2438 }
2439 
omap3isp_ccdc_register_entities(struct isp_ccdc_device * ccdc,struct v4l2_device * vdev)2440 int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
2441 	struct v4l2_device *vdev)
2442 {
2443 	int ret;
2444 
2445 	/* Register the subdev and video node. */
2446 	ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
2447 	if (ret < 0)
2448 		goto error;
2449 
2450 	ret = omap3isp_video_register(&ccdc->video_out, vdev);
2451 	if (ret < 0)
2452 		goto error;
2453 
2454 	return 0;
2455 
2456 error:
2457 	omap3isp_ccdc_unregister_entities(ccdc);
2458 	return ret;
2459 }
2460 
2461 /* -----------------------------------------------------------------------------
2462  * ISP CCDC initialisation and cleanup
2463  */
2464 
2465 /*
2466  * ccdc_init_entities - Initialize V4L2 subdev and media entity
2467  * @ccdc: ISP CCDC module
2468  *
2469  * Return 0 on success and a negative error code on failure.
2470  */
ccdc_init_entities(struct isp_ccdc_device * ccdc)2471 static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
2472 {
2473 	struct v4l2_subdev *sd = &ccdc->subdev;
2474 	struct media_pad *pads = ccdc->pads;
2475 	struct media_entity *me = &sd->entity;
2476 	int ret;
2477 
2478 	ccdc->input = CCDC_INPUT_NONE;
2479 
2480 	v4l2_subdev_init(sd, &ccdc_v4l2_ops);
2481 	sd->internal_ops = &ccdc_v4l2_internal_ops;
2482 	strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
2483 	sd->grp_id = 1 << 16;	/* group ID for isp subdevs */
2484 	v4l2_set_subdevdata(sd, ccdc);
2485 	sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
2486 
2487 	pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2488 	pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
2489 	pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
2490 
2491 	me->ops = &ccdc_media_ops;
2492 	ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
2493 	if (ret < 0)
2494 		return ret;
2495 
2496 	ccdc_init_formats(sd, NULL);
2497 
2498 	ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2499 	ccdc->video_out.ops = &ccdc_video_ops;
2500 	ccdc->video_out.isp = to_isp_device(ccdc);
2501 	ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
2502 	ccdc->video_out.bpl_alignment = 32;
2503 
2504 	ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
2505 	if (ret < 0)
2506 		goto error_video;
2507 
2508 	/* Connect the CCDC subdev to the video node. */
2509 	ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
2510 			&ccdc->video_out.video.entity, 0, 0);
2511 	if (ret < 0)
2512 		goto error_link;
2513 
2514 	return 0;
2515 
2516 error_link:
2517 	omap3isp_video_cleanup(&ccdc->video_out);
2518 error_video:
2519 	media_entity_cleanup(me);
2520 	return ret;
2521 }
2522 
2523 /*
2524  * omap3isp_ccdc_init - CCDC module initialization.
2525  * @dev: Device pointer specific to the OMAP3 ISP.
2526  *
2527  * TODO: Get the initialisation values from platform data.
2528  *
2529  * Return 0 on success or a negative error code otherwise.
2530  */
omap3isp_ccdc_init(struct isp_device * isp)2531 int omap3isp_ccdc_init(struct isp_device *isp)
2532 {
2533 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2534 	int ret;
2535 
2536 	spin_lock_init(&ccdc->lock);
2537 	init_waitqueue_head(&ccdc->wait);
2538 	mutex_init(&ccdc->ioctl_lock);
2539 
2540 	ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
2541 
2542 	INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
2543 	ccdc->lsc.state = LSC_STATE_STOPPED;
2544 	INIT_LIST_HEAD(&ccdc->lsc.free_queue);
2545 	spin_lock_init(&ccdc->lsc.req_lock);
2546 
2547 	ccdc->clamp.oblen = 0;
2548 	ccdc->clamp.dcsubval = 0;
2549 
2550 	ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
2551 	ccdc_apply_controls(ccdc);
2552 
2553 	ret = ccdc_init_entities(ccdc);
2554 	if (ret < 0) {
2555 		mutex_destroy(&ccdc->ioctl_lock);
2556 		return ret;
2557 	}
2558 
2559 	return 0;
2560 }
2561 
2562 /*
2563  * omap3isp_ccdc_cleanup - CCDC module cleanup.
2564  * @dev: Device pointer specific to the OMAP3 ISP.
2565  */
omap3isp_ccdc_cleanup(struct isp_device * isp)2566 void omap3isp_ccdc_cleanup(struct isp_device *isp)
2567 {
2568 	struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
2569 
2570 	omap3isp_video_cleanup(&ccdc->video_out);
2571 	media_entity_cleanup(&ccdc->subdev.entity);
2572 
2573 	/* Free LSC requests. As the CCDC is stopped there's no active request,
2574 	 * so only the pending request and the free queue need to be handled.
2575 	 */
2576 	ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
2577 	cancel_work_sync(&ccdc->lsc.table_work);
2578 	ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
2579 
2580 	if (ccdc->fpc.fpcaddr != 0)
2581 		omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
2582 
2583 	mutex_destroy(&ccdc->ioctl_lock);
2584 }
2585