1 /*
2 * PCI handling of I2O controller
3 *
4 * Copyright (C) 1999-2002 Red Hat Software
5 *
6 * Written by Alan Cox, Building Number Three Ltd
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * A lot of the I2O message side code from this is taken from the Red
14 * Creek RCPCI45 adapter driver by Red Creek Communications
15 *
16 * Fixes/additions:
17 * Philipp Rumpf
18 * Juha Sievänen <Juha.Sievanen@cs.Helsinki.FI>
19 * Auvo Häkkinen <Auvo.Hakkinen@cs.Helsinki.FI>
20 * Deepak Saxena <deepak@plexity.net>
21 * Boji T Kannanthanam <boji.t.kannanthanam@intel.com>
22 * Alan Cox <alan@lxorguk.ukuu.org.uk>:
23 * Ported to Linux 2.5.
24 * Markus Lidel <Markus.Lidel@shadowconnect.com>:
25 * Minor fixes for 2.6.
26 * Markus Lidel <Markus.Lidel@shadowconnect.com>:
27 * Support for sysfs included.
28 */
29
30 #include <linux/pci.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/i2o.h>
34 #include <linux/module.h>
35 #include "core.h"
36
37 #define OSM_DESCRIPTION "I2O-subsystem"
38
39 /* PCI device id table for all I2O controllers */
40 static struct pci_device_id i2o_pci_ids[] = {
41 {PCI_DEVICE_CLASS(PCI_CLASS_INTELLIGENT_I2O << 8, 0xffff00)},
42 {PCI_DEVICE(PCI_VENDOR_ID_DPT, 0xa511)},
43 {.vendor = PCI_VENDOR_ID_INTEL,.device = 0x1962,
44 .subvendor = PCI_VENDOR_ID_PROMISE,.subdevice = PCI_ANY_ID},
45 {0}
46 };
47
48 /**
49 * i2o_pci_free - Frees the DMA memory for the I2O controller
50 * @c: I2O controller to free
51 *
52 * Remove all allocated DMA memory and unmap memory IO regions. If MTRR
53 * is enabled, also remove it again.
54 */
i2o_pci_free(struct i2o_controller * c)55 static void i2o_pci_free(struct i2o_controller *c)
56 {
57 struct device *dev;
58
59 dev = &c->pdev->dev;
60
61 i2o_dma_free(dev, &c->out_queue);
62 i2o_dma_free(dev, &c->status_block);
63 kfree(c->lct);
64 i2o_dma_free(dev, &c->dlct);
65 i2o_dma_free(dev, &c->hrt);
66 i2o_dma_free(dev, &c->status);
67
68 if (c->raptor && c->in_queue.virt)
69 iounmap(c->in_queue.virt);
70
71 if (c->base.virt)
72 iounmap(c->base.virt);
73
74 pci_release_regions(c->pdev);
75 }
76
77 /**
78 * i2o_pci_alloc - Allocate DMA memory, map IO memory for I2O controller
79 * @c: I2O controller
80 *
81 * Allocate DMA memory for a PCI (or in theory AGP) I2O controller. All
82 * IO mappings are also done here. If MTRR is enabled, also do add memory
83 * regions here.
84 *
85 * Returns 0 on success or negative error code on failure.
86 */
i2o_pci_alloc(struct i2o_controller * c)87 static int i2o_pci_alloc(struct i2o_controller *c)
88 {
89 struct pci_dev *pdev = c->pdev;
90 struct device *dev = &pdev->dev;
91 int i;
92
93 if (pci_request_regions(pdev, OSM_DESCRIPTION)) {
94 printk(KERN_ERR "%s: device already claimed\n", c->name);
95 return -ENODEV;
96 }
97
98 for (i = 0; i < 6; i++) {
99 /* Skip I/O spaces */
100 if (!(pci_resource_flags(pdev, i) & IORESOURCE_IO)) {
101 if (!c->base.phys) {
102 c->base.phys = pci_resource_start(pdev, i);
103 c->base.len = pci_resource_len(pdev, i);
104
105 /*
106 * If we know what card it is, set the size
107 * correctly. Code is taken from dpt_i2o.c
108 */
109 if (pdev->device == 0xa501) {
110 if (pdev->subsystem_device >= 0xc032 &&
111 pdev->subsystem_device <= 0xc03b) {
112 if (c->base.len > 0x400000)
113 c->base.len = 0x400000;
114 } else {
115 if (c->base.len > 0x100000)
116 c->base.len = 0x100000;
117 }
118 }
119 if (!c->raptor)
120 break;
121 } else {
122 c->in_queue.phys = pci_resource_start(pdev, i);
123 c->in_queue.len = pci_resource_len(pdev, i);
124 break;
125 }
126 }
127 }
128
129 if (i == 6) {
130 printk(KERN_ERR "%s: I2O controller has no memory regions"
131 " defined.\n", c->name);
132 i2o_pci_free(c);
133 return -EINVAL;
134 }
135
136 /* Map the I2O controller */
137 if (c->raptor) {
138 printk(KERN_INFO "%s: PCI I2O controller\n", c->name);
139 printk(KERN_INFO " BAR0 at 0x%08lX size=%ld\n",
140 (unsigned long)c->base.phys, (unsigned long)c->base.len);
141 printk(KERN_INFO " BAR1 at 0x%08lX size=%ld\n",
142 (unsigned long)c->in_queue.phys,
143 (unsigned long)c->in_queue.len);
144 } else
145 printk(KERN_INFO "%s: PCI I2O controller at %08lX size=%ld\n",
146 c->name, (unsigned long)c->base.phys,
147 (unsigned long)c->base.len);
148
149 c->base.virt = ioremap_nocache(c->base.phys, c->base.len);
150 if (!c->base.virt) {
151 printk(KERN_ERR "%s: Unable to map controller.\n", c->name);
152 i2o_pci_free(c);
153 return -ENOMEM;
154 }
155
156 if (c->raptor) {
157 c->in_queue.virt =
158 ioremap_nocache(c->in_queue.phys, c->in_queue.len);
159 if (!c->in_queue.virt) {
160 printk(KERN_ERR "%s: Unable to map controller.\n",
161 c->name);
162 i2o_pci_free(c);
163 return -ENOMEM;
164 }
165 } else
166 c->in_queue = c->base;
167
168 c->irq_status = c->base.virt + I2O_IRQ_STATUS;
169 c->irq_mask = c->base.virt + I2O_IRQ_MASK;
170 c->in_port = c->base.virt + I2O_IN_PORT;
171 c->out_port = c->base.virt + I2O_OUT_PORT;
172
173 /* Motorola/Freescale chip does not follow spec */
174 if (pdev->vendor == PCI_VENDOR_ID_MOTOROLA && pdev->device == 0x18c0) {
175 /* Check if CPU is enabled */
176 if (be32_to_cpu(readl(c->base.virt + 0x10000)) & 0x10000000) {
177 printk(KERN_INFO "%s: MPC82XX needs CPU running to "
178 "service I2O.\n", c->name);
179 i2o_pci_free(c);
180 return -ENODEV;
181 } else {
182 c->irq_status += I2O_MOTOROLA_PORT_OFFSET;
183 c->irq_mask += I2O_MOTOROLA_PORT_OFFSET;
184 c->in_port += I2O_MOTOROLA_PORT_OFFSET;
185 c->out_port += I2O_MOTOROLA_PORT_OFFSET;
186 printk(KERN_INFO "%s: MPC82XX workarounds activated.\n",
187 c->name);
188 }
189 }
190
191 if (i2o_dma_alloc(dev, &c->status, 8)) {
192 i2o_pci_free(c);
193 return -ENOMEM;
194 }
195
196 if (i2o_dma_alloc(dev, &c->hrt, sizeof(i2o_hrt))) {
197 i2o_pci_free(c);
198 return -ENOMEM;
199 }
200
201 if (i2o_dma_alloc(dev, &c->dlct, 8192)) {
202 i2o_pci_free(c);
203 return -ENOMEM;
204 }
205
206 if (i2o_dma_alloc(dev, &c->status_block, sizeof(i2o_status_block))) {
207 i2o_pci_free(c);
208 return -ENOMEM;
209 }
210
211 if (i2o_dma_alloc(dev, &c->out_queue,
212 I2O_MAX_OUTBOUND_MSG_FRAMES * I2O_OUTBOUND_MSG_FRAME_SIZE *
213 sizeof(u32))) {
214 i2o_pci_free(c);
215 return -ENOMEM;
216 }
217
218 pci_set_drvdata(pdev, c);
219
220 return 0;
221 }
222
223 /**
224 * i2o_pci_interrupt - Interrupt handler for I2O controller
225 * @irq: interrupt line
226 * @dev_id: pointer to the I2O controller
227 *
228 * Handle an interrupt from a PCI based I2O controller. This turns out
229 * to be rather simple. We keep the controller pointer in the cookie.
230 */
i2o_pci_interrupt(int irq,void * dev_id)231 static irqreturn_t i2o_pci_interrupt(int irq, void *dev_id)
232 {
233 struct i2o_controller *c = dev_id;
234 u32 m;
235 irqreturn_t rc = IRQ_NONE;
236
237 while (readl(c->irq_status) & I2O_IRQ_OUTBOUND_POST) {
238 m = readl(c->out_port);
239 if (m == I2O_QUEUE_EMPTY) {
240 /*
241 * Old 960 steppings had a bug in the I2O unit that
242 * caused the queue to appear empty when it wasn't.
243 */
244 m = readl(c->out_port);
245 if (unlikely(m == I2O_QUEUE_EMPTY))
246 break;
247 }
248
249 /* dispatch it */
250 if (i2o_driver_dispatch(c, m))
251 /* flush it if result != 0 */
252 i2o_flush_reply(c, m);
253
254 rc = IRQ_HANDLED;
255 }
256
257 return rc;
258 }
259
260 /**
261 * i2o_pci_irq_enable - Allocate interrupt for I2O controller
262 * @c: i2o_controller that the request is for
263 *
264 * Allocate an interrupt for the I2O controller, and activate interrupts
265 * on the I2O controller.
266 *
267 * Returns 0 on success or negative error code on failure.
268 */
i2o_pci_irq_enable(struct i2o_controller * c)269 static int i2o_pci_irq_enable(struct i2o_controller *c)
270 {
271 struct pci_dev *pdev = c->pdev;
272 int rc;
273
274 writel(0xffffffff, c->irq_mask);
275
276 if (pdev->irq) {
277 rc = request_irq(pdev->irq, i2o_pci_interrupt, IRQF_SHARED,
278 c->name, c);
279 if (rc < 0) {
280 printk(KERN_ERR "%s: unable to allocate interrupt %d."
281 "\n", c->name, pdev->irq);
282 return rc;
283 }
284 }
285
286 writel(0x00000000, c->irq_mask);
287
288 printk(KERN_INFO "%s: Installed at IRQ %d\n", c->name, pdev->irq);
289
290 return 0;
291 }
292
293 /**
294 * i2o_pci_irq_disable - Free interrupt for I2O controller
295 * @c: I2O controller
296 *
297 * Disable interrupts in I2O controller and then free interrupt.
298 */
i2o_pci_irq_disable(struct i2o_controller * c)299 static void i2o_pci_irq_disable(struct i2o_controller *c)
300 {
301 writel(0xffffffff, c->irq_mask);
302
303 if (c->pdev->irq > 0)
304 free_irq(c->pdev->irq, c);
305 }
306
307 /**
308 * i2o_pci_probe - Probe the PCI device for an I2O controller
309 * @pdev: PCI device to test
310 * @id: id which matched with the PCI device id table
311 *
312 * Probe the PCI device for any device which is a memory of the
313 * Intelligent, I2O class or an Adaptec Zero Channel Controller. We
314 * attempt to set up each such device and register it with the core.
315 *
316 * Returns 0 on success or negative error code on failure.
317 */
i2o_pci_probe(struct pci_dev * pdev,const struct pci_device_id * id)318 static int i2o_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
319 {
320 struct i2o_controller *c;
321 int rc;
322 struct pci_dev *i960 = NULL;
323
324 printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
325
326 if ((pdev->class & 0xff) > 1) {
327 printk(KERN_WARNING "i2o: %s does not support I2O 1.5 "
328 "(skipping).\n", pci_name(pdev));
329 return -ENODEV;
330 }
331
332 if ((rc = pci_enable_device(pdev))) {
333 printk(KERN_WARNING "i2o: couldn't enable device %s\n",
334 pci_name(pdev));
335 return rc;
336 }
337
338 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
339 printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
340 pci_name(pdev));
341 rc = -ENODEV;
342 goto disable;
343 }
344
345 pci_set_master(pdev);
346
347 c = i2o_iop_alloc();
348 if (IS_ERR(c)) {
349 printk(KERN_ERR "i2o: couldn't allocate memory for %s\n",
350 pci_name(pdev));
351 rc = PTR_ERR(c);
352 goto disable;
353 } else
354 printk(KERN_INFO "%s: controller found (%s)\n", c->name,
355 pci_name(pdev));
356
357 c->pdev = pdev;
358 c->device.parent = &pdev->dev;
359
360 /* Cards that fall apart if you hit them with large I/O loads... */
361 if (pdev->vendor == PCI_VENDOR_ID_NCR && pdev->device == 0x0630) {
362 c->short_req = 1;
363 printk(KERN_INFO "%s: Symbios FC920 workarounds activated.\n",
364 c->name);
365 }
366
367 if (pdev->subsystem_vendor == PCI_VENDOR_ID_PROMISE) {
368 /*
369 * Expose the ship behind i960 for initialization, or it will
370 * failed
371 */
372 i960 = pci_get_slot(c->pdev->bus,
373 PCI_DEVFN(PCI_SLOT(c->pdev->devfn), 0));
374
375 if (i960) {
376 pci_write_config_word(i960, 0x42, 0);
377 pci_dev_put(i960);
378 }
379
380 c->promise = 1;
381 c->limit_sectors = 1;
382 }
383
384 if (pdev->subsystem_vendor == PCI_VENDOR_ID_DPT)
385 c->adaptec = 1;
386
387 /* Cards that go bananas if you quiesce them before you reset them. */
388 if (pdev->vendor == PCI_VENDOR_ID_DPT) {
389 c->no_quiesce = 1;
390 if (pdev->device == 0xa511)
391 c->raptor = 1;
392
393 if (pdev->subsystem_device == 0xc05a) {
394 c->limit_sectors = 1;
395 printk(KERN_INFO
396 "%s: limit sectors per request to %d\n", c->name,
397 I2O_MAX_SECTORS_LIMITED);
398 }
399 #ifdef CONFIG_I2O_EXT_ADAPTEC_DMA64
400 if (sizeof(dma_addr_t) > 4) {
401 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
402 printk(KERN_INFO "%s: 64-bit DMA unavailable\n",
403 c->name);
404 else {
405 c->pae_support = 1;
406 printk(KERN_INFO "%s: using 64-bit DMA\n",
407 c->name);
408 }
409 }
410 #endif
411 }
412
413 if ((rc = i2o_pci_alloc(c))) {
414 printk(KERN_ERR "%s: DMA / IO allocation for I2O controller "
415 "failed\n", c->name);
416 goto free_controller;
417 }
418
419 if (i2o_pci_irq_enable(c)) {
420 printk(KERN_ERR "%s: unable to enable interrupts for I2O "
421 "controller\n", c->name);
422 goto free_pci;
423 }
424
425 if ((rc = i2o_iop_add(c)))
426 goto uninstall;
427
428 if (i960)
429 pci_write_config_word(i960, 0x42, 0x03ff);
430
431 return 0;
432
433 uninstall:
434 i2o_pci_irq_disable(c);
435
436 free_pci:
437 i2o_pci_free(c);
438
439 free_controller:
440 i2o_iop_free(c);
441
442 disable:
443 pci_disable_device(pdev);
444
445 return rc;
446 }
447
448 /**
449 * i2o_pci_remove - Removes a I2O controller from the system
450 * @pdev: I2O controller which should be removed
451 *
452 * Reset the I2O controller, disable interrupts and remove all allocated
453 * resources.
454 */
i2o_pci_remove(struct pci_dev * pdev)455 static void i2o_pci_remove(struct pci_dev *pdev)
456 {
457 struct i2o_controller *c;
458 c = pci_get_drvdata(pdev);
459
460 i2o_iop_remove(c);
461 i2o_pci_irq_disable(c);
462 i2o_pci_free(c);
463
464 pci_disable_device(pdev);
465
466 printk(KERN_INFO "%s: Controller removed.\n", c->name);
467
468 put_device(&c->device);
469 };
470
471 /* PCI driver for I2O controller */
472 static struct pci_driver i2o_pci_driver = {
473 .name = "PCI_I2O",
474 .id_table = i2o_pci_ids,
475 .probe = i2o_pci_probe,
476 .remove = i2o_pci_remove,
477 };
478
479 /**
480 * i2o_pci_init - registers I2O PCI driver in PCI subsystem
481 *
482 * Returns > 0 on success or negative error code on failure.
483 */
i2o_pci_init(void)484 int __init i2o_pci_init(void)
485 {
486 return pci_register_driver(&i2o_pci_driver);
487 };
488
489 /**
490 * i2o_pci_exit - unregisters I2O PCI driver from PCI subsystem
491 */
i2o_pci_exit(void)492 void __exit i2o_pci_exit(void)
493 {
494 pci_unregister_driver(&i2o_pci_driver);
495 };
496
497 MODULE_DEVICE_TABLE(pci, i2o_pci_ids);
498