1 /*
2 * NAND flash simulator.
3 *
4 * Author: Artem B. Bityuckiy <dedekind@oktetlabs.ru>, <dedekind@infradead.org>
5 *
6 * Copyright (C) 2004 Nokia Corporation
7 *
8 * Note: NS means "NAND Simulator".
9 * Note: Input means input TO flash chip, output means output FROM chip.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2, or (at your option) any later
14 * version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General
19 * Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 */
25
26 #include <linux/init.h>
27 #include <linux/types.h>
28 #include <linux/module.h>
29 #include <linux/moduleparam.h>
30 #include <linux/vmalloc.h>
31 #include <linux/math64.h>
32 #include <linux/slab.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/mtd/mtd.h>
36 #include <linux/mtd/nand.h>
37 #include <linux/mtd/nand_bch.h>
38 #include <linux/mtd/partitions.h>
39 #include <linux/delay.h>
40 #include <linux/list.h>
41 #include <linux/random.h>
42 #include <linux/sched.h>
43 #include <linux/fs.h>
44 #include <linux/pagemap.h>
45 #include <linux/seq_file.h>
46 #include <linux/debugfs.h>
47
48 /* Default simulator parameters values */
49 #if !defined(CONFIG_NANDSIM_FIRST_ID_BYTE) || \
50 !defined(CONFIG_NANDSIM_SECOND_ID_BYTE) || \
51 !defined(CONFIG_NANDSIM_THIRD_ID_BYTE) || \
52 !defined(CONFIG_NANDSIM_FOURTH_ID_BYTE)
53 #define CONFIG_NANDSIM_FIRST_ID_BYTE 0x98
54 #define CONFIG_NANDSIM_SECOND_ID_BYTE 0x39
55 #define CONFIG_NANDSIM_THIRD_ID_BYTE 0xFF /* No byte */
56 #define CONFIG_NANDSIM_FOURTH_ID_BYTE 0xFF /* No byte */
57 #endif
58
59 #ifndef CONFIG_NANDSIM_ACCESS_DELAY
60 #define CONFIG_NANDSIM_ACCESS_DELAY 25
61 #endif
62 #ifndef CONFIG_NANDSIM_PROGRAMM_DELAY
63 #define CONFIG_NANDSIM_PROGRAMM_DELAY 200
64 #endif
65 #ifndef CONFIG_NANDSIM_ERASE_DELAY
66 #define CONFIG_NANDSIM_ERASE_DELAY 2
67 #endif
68 #ifndef CONFIG_NANDSIM_OUTPUT_CYCLE
69 #define CONFIG_NANDSIM_OUTPUT_CYCLE 40
70 #endif
71 #ifndef CONFIG_NANDSIM_INPUT_CYCLE
72 #define CONFIG_NANDSIM_INPUT_CYCLE 50
73 #endif
74 #ifndef CONFIG_NANDSIM_BUS_WIDTH
75 #define CONFIG_NANDSIM_BUS_WIDTH 8
76 #endif
77 #ifndef CONFIG_NANDSIM_DO_DELAYS
78 #define CONFIG_NANDSIM_DO_DELAYS 0
79 #endif
80 #ifndef CONFIG_NANDSIM_LOG
81 #define CONFIG_NANDSIM_LOG 0
82 #endif
83 #ifndef CONFIG_NANDSIM_DBG
84 #define CONFIG_NANDSIM_DBG 0
85 #endif
86 #ifndef CONFIG_NANDSIM_MAX_PARTS
87 #define CONFIG_NANDSIM_MAX_PARTS 32
88 #endif
89
90 static uint first_id_byte = CONFIG_NANDSIM_FIRST_ID_BYTE;
91 static uint second_id_byte = CONFIG_NANDSIM_SECOND_ID_BYTE;
92 static uint third_id_byte = CONFIG_NANDSIM_THIRD_ID_BYTE;
93 static uint fourth_id_byte = CONFIG_NANDSIM_FOURTH_ID_BYTE;
94 static uint access_delay = CONFIG_NANDSIM_ACCESS_DELAY;
95 static uint programm_delay = CONFIG_NANDSIM_PROGRAMM_DELAY;
96 static uint erase_delay = CONFIG_NANDSIM_ERASE_DELAY;
97 static uint output_cycle = CONFIG_NANDSIM_OUTPUT_CYCLE;
98 static uint input_cycle = CONFIG_NANDSIM_INPUT_CYCLE;
99 static uint bus_width = CONFIG_NANDSIM_BUS_WIDTH;
100 static uint do_delays = CONFIG_NANDSIM_DO_DELAYS;
101 static uint log = CONFIG_NANDSIM_LOG;
102 static uint dbg = CONFIG_NANDSIM_DBG;
103 static unsigned long parts[CONFIG_NANDSIM_MAX_PARTS];
104 static unsigned int parts_num;
105 static char *badblocks = NULL;
106 static char *weakblocks = NULL;
107 static char *weakpages = NULL;
108 static unsigned int bitflips = 0;
109 static char *gravepages = NULL;
110 static unsigned int overridesize = 0;
111 static char *cache_file = NULL;
112 static unsigned int bbt;
113 static unsigned int bch;
114
115 module_param(first_id_byte, uint, 0400);
116 module_param(second_id_byte, uint, 0400);
117 module_param(third_id_byte, uint, 0400);
118 module_param(fourth_id_byte, uint, 0400);
119 module_param(access_delay, uint, 0400);
120 module_param(programm_delay, uint, 0400);
121 module_param(erase_delay, uint, 0400);
122 module_param(output_cycle, uint, 0400);
123 module_param(input_cycle, uint, 0400);
124 module_param(bus_width, uint, 0400);
125 module_param(do_delays, uint, 0400);
126 module_param(log, uint, 0400);
127 module_param(dbg, uint, 0400);
128 module_param_array(parts, ulong, &parts_num, 0400);
129 module_param(badblocks, charp, 0400);
130 module_param(weakblocks, charp, 0400);
131 module_param(weakpages, charp, 0400);
132 module_param(bitflips, uint, 0400);
133 module_param(gravepages, charp, 0400);
134 module_param(overridesize, uint, 0400);
135 module_param(cache_file, charp, 0400);
136 module_param(bbt, uint, 0400);
137 module_param(bch, uint, 0400);
138
139 MODULE_PARM_DESC(first_id_byte, "The first byte returned by NAND Flash 'read ID' command (manufacturer ID)");
140 MODULE_PARM_DESC(second_id_byte, "The second byte returned by NAND Flash 'read ID' command (chip ID)");
141 MODULE_PARM_DESC(third_id_byte, "The third byte returned by NAND Flash 'read ID' command");
142 MODULE_PARM_DESC(fourth_id_byte, "The fourth byte returned by NAND Flash 'read ID' command");
143 MODULE_PARM_DESC(access_delay, "Initial page access delay (microseconds)");
144 MODULE_PARM_DESC(programm_delay, "Page programm delay (microseconds");
145 MODULE_PARM_DESC(erase_delay, "Sector erase delay (milliseconds)");
146 MODULE_PARM_DESC(output_cycle, "Word output (from flash) time (nanoseconds)");
147 MODULE_PARM_DESC(input_cycle, "Word input (to flash) time (nanoseconds)");
148 MODULE_PARM_DESC(bus_width, "Chip's bus width (8- or 16-bit)");
149 MODULE_PARM_DESC(do_delays, "Simulate NAND delays using busy-waits if not zero");
150 MODULE_PARM_DESC(log, "Perform logging if not zero");
151 MODULE_PARM_DESC(dbg, "Output debug information if not zero");
152 MODULE_PARM_DESC(parts, "Partition sizes (in erase blocks) separated by commas");
153 /* Page and erase block positions for the following parameters are independent of any partitions */
154 MODULE_PARM_DESC(badblocks, "Erase blocks that are initially marked bad, separated by commas");
155 MODULE_PARM_DESC(weakblocks, "Weak erase blocks [: remaining erase cycles (defaults to 3)]"
156 " separated by commas e.g. 113:2 means eb 113"
157 " can be erased only twice before failing");
158 MODULE_PARM_DESC(weakpages, "Weak pages [: maximum writes (defaults to 3)]"
159 " separated by commas e.g. 1401:2 means page 1401"
160 " can be written only twice before failing");
161 MODULE_PARM_DESC(bitflips, "Maximum number of random bit flips per page (zero by default)");
162 MODULE_PARM_DESC(gravepages, "Pages that lose data [: maximum reads (defaults to 3)]"
163 " separated by commas e.g. 1401:2 means page 1401"
164 " can be read only twice before failing");
165 MODULE_PARM_DESC(overridesize, "Specifies the NAND Flash size overriding the ID bytes. "
166 "The size is specified in erase blocks and as the exponent of a power of two"
167 " e.g. 5 means a size of 32 erase blocks");
168 MODULE_PARM_DESC(cache_file, "File to use to cache nand pages instead of memory");
169 MODULE_PARM_DESC(bbt, "0 OOB, 1 BBT with marker in OOB, 2 BBT with marker in data area");
170 MODULE_PARM_DESC(bch, "Enable BCH ecc and set how many bits should "
171 "be correctable in 512-byte blocks");
172
173 /* The largest possible page size */
174 #define NS_LARGEST_PAGE_SIZE 4096
175
176 /* The prefix for simulator output */
177 #define NS_OUTPUT_PREFIX "[nandsim]"
178
179 /* Simulator's output macros (logging, debugging, warning, error) */
180 #define NS_LOG(args...) \
181 do { if (log) printk(KERN_DEBUG NS_OUTPUT_PREFIX " log: " args); } while(0)
182 #define NS_DBG(args...) \
183 do { if (dbg) printk(KERN_DEBUG NS_OUTPUT_PREFIX " debug: " args); } while(0)
184 #define NS_WARN(args...) \
185 do { printk(KERN_WARNING NS_OUTPUT_PREFIX " warning: " args); } while(0)
186 #define NS_ERR(args...) \
187 do { printk(KERN_ERR NS_OUTPUT_PREFIX " error: " args); } while(0)
188 #define NS_INFO(args...) \
189 do { printk(KERN_INFO NS_OUTPUT_PREFIX " " args); } while(0)
190
191 /* Busy-wait delay macros (microseconds, milliseconds) */
192 #define NS_UDELAY(us) \
193 do { if (do_delays) udelay(us); } while(0)
194 #define NS_MDELAY(us) \
195 do { if (do_delays) mdelay(us); } while(0)
196
197 /* Is the nandsim structure initialized ? */
198 #define NS_IS_INITIALIZED(ns) ((ns)->geom.totsz != 0)
199
200 /* Good operation completion status */
201 #define NS_STATUS_OK(ns) (NAND_STATUS_READY | (NAND_STATUS_WP * ((ns)->lines.wp == 0)))
202
203 /* Operation failed completion status */
204 #define NS_STATUS_FAILED(ns) (NAND_STATUS_FAIL | NS_STATUS_OK(ns))
205
206 /* Calculate the page offset in flash RAM image by (row, column) address */
207 #define NS_RAW_OFFSET(ns) \
208 (((ns)->regs.row << (ns)->geom.pgshift) + ((ns)->regs.row * (ns)->geom.oobsz) + (ns)->regs.column)
209
210 /* Calculate the OOB offset in flash RAM image by (row, column) address */
211 #define NS_RAW_OFFSET_OOB(ns) (NS_RAW_OFFSET(ns) + ns->geom.pgsz)
212
213 /* After a command is input, the simulator goes to one of the following states */
214 #define STATE_CMD_READ0 0x00000001 /* read data from the beginning of page */
215 #define STATE_CMD_READ1 0x00000002 /* read data from the second half of page */
216 #define STATE_CMD_READSTART 0x00000003 /* read data second command (large page devices) */
217 #define STATE_CMD_PAGEPROG 0x00000004 /* start page program */
218 #define STATE_CMD_READOOB 0x00000005 /* read OOB area */
219 #define STATE_CMD_ERASE1 0x00000006 /* sector erase first command */
220 #define STATE_CMD_STATUS 0x00000007 /* read status */
221 #define STATE_CMD_SEQIN 0x00000009 /* sequential data input */
222 #define STATE_CMD_READID 0x0000000A /* read ID */
223 #define STATE_CMD_ERASE2 0x0000000B /* sector erase second command */
224 #define STATE_CMD_RESET 0x0000000C /* reset */
225 #define STATE_CMD_RNDOUT 0x0000000D /* random output command */
226 #define STATE_CMD_RNDOUTSTART 0x0000000E /* random output start command */
227 #define STATE_CMD_MASK 0x0000000F /* command states mask */
228
229 /* After an address is input, the simulator goes to one of these states */
230 #define STATE_ADDR_PAGE 0x00000010 /* full (row, column) address is accepted */
231 #define STATE_ADDR_SEC 0x00000020 /* sector address was accepted */
232 #define STATE_ADDR_COLUMN 0x00000030 /* column address was accepted */
233 #define STATE_ADDR_ZERO 0x00000040 /* one byte zero address was accepted */
234 #define STATE_ADDR_MASK 0x00000070 /* address states mask */
235
236 /* During data input/output the simulator is in these states */
237 #define STATE_DATAIN 0x00000100 /* waiting for data input */
238 #define STATE_DATAIN_MASK 0x00000100 /* data input states mask */
239
240 #define STATE_DATAOUT 0x00001000 /* waiting for page data output */
241 #define STATE_DATAOUT_ID 0x00002000 /* waiting for ID bytes output */
242 #define STATE_DATAOUT_STATUS 0x00003000 /* waiting for status output */
243 #define STATE_DATAOUT_STATUS_M 0x00004000 /* waiting for multi-plane status output */
244 #define STATE_DATAOUT_MASK 0x00007000 /* data output states mask */
245
246 /* Previous operation is done, ready to accept new requests */
247 #define STATE_READY 0x00000000
248
249 /* This state is used to mark that the next state isn't known yet */
250 #define STATE_UNKNOWN 0x10000000
251
252 /* Simulator's actions bit masks */
253 #define ACTION_CPY 0x00100000 /* copy page/OOB to the internal buffer */
254 #define ACTION_PRGPAGE 0x00200000 /* program the internal buffer to flash */
255 #define ACTION_SECERASE 0x00300000 /* erase sector */
256 #define ACTION_ZEROOFF 0x00400000 /* don't add any offset to address */
257 #define ACTION_HALFOFF 0x00500000 /* add to address half of page */
258 #define ACTION_OOBOFF 0x00600000 /* add to address OOB offset */
259 #define ACTION_MASK 0x00700000 /* action mask */
260
261 #define NS_OPER_NUM 13 /* Number of operations supported by the simulator */
262 #define NS_OPER_STATES 6 /* Maximum number of states in operation */
263
264 #define OPT_ANY 0xFFFFFFFF /* any chip supports this operation */
265 #define OPT_PAGE512 0x00000002 /* 512-byte page chips */
266 #define OPT_PAGE2048 0x00000008 /* 2048-byte page chips */
267 #define OPT_SMARTMEDIA 0x00000010 /* SmartMedia technology chips */
268 #define OPT_PAGE512_8BIT 0x00000040 /* 512-byte page chips with 8-bit bus width */
269 #define OPT_PAGE4096 0x00000080 /* 4096-byte page chips */
270 #define OPT_LARGEPAGE (OPT_PAGE2048 | OPT_PAGE4096) /* 2048 & 4096-byte page chips */
271 #define OPT_SMALLPAGE (OPT_PAGE512) /* 512-byte page chips */
272
273 /* Remove action bits from state */
274 #define NS_STATE(x) ((x) & ~ACTION_MASK)
275
276 /*
277 * Maximum previous states which need to be saved. Currently saving is
278 * only needed for page program operation with preceded read command
279 * (which is only valid for 512-byte pages).
280 */
281 #define NS_MAX_PREVSTATES 1
282
283 /* Maximum page cache pages needed to read or write a NAND page to the cache_file */
284 #define NS_MAX_HELD_PAGES 16
285
286 struct nandsim_debug_info {
287 struct dentry *dfs_root;
288 struct dentry *dfs_wear_report;
289 };
290
291 /*
292 * A union to represent flash memory contents and flash buffer.
293 */
294 union ns_mem {
295 u_char *byte; /* for byte access */
296 uint16_t *word; /* for 16-bit word access */
297 };
298
299 /*
300 * The structure which describes all the internal simulator data.
301 */
302 struct nandsim {
303 struct mtd_partition partitions[CONFIG_NANDSIM_MAX_PARTS];
304 unsigned int nbparts;
305
306 uint busw; /* flash chip bus width (8 or 16) */
307 u_char ids[4]; /* chip's ID bytes */
308 uint32_t options; /* chip's characteristic bits */
309 uint32_t state; /* current chip state */
310 uint32_t nxstate; /* next expected state */
311
312 uint32_t *op; /* current operation, NULL operations isn't known yet */
313 uint32_t pstates[NS_MAX_PREVSTATES]; /* previous states */
314 uint16_t npstates; /* number of previous states saved */
315 uint16_t stateidx; /* current state index */
316
317 /* The simulated NAND flash pages array */
318 union ns_mem *pages;
319
320 /* Slab allocator for nand pages */
321 struct kmem_cache *nand_pages_slab;
322
323 /* Internal buffer of page + OOB size bytes */
324 union ns_mem buf;
325
326 /* NAND flash "geometry" */
327 struct {
328 uint64_t totsz; /* total flash size, bytes */
329 uint32_t secsz; /* flash sector (erase block) size, bytes */
330 uint pgsz; /* NAND flash page size, bytes */
331 uint oobsz; /* page OOB area size, bytes */
332 uint64_t totszoob; /* total flash size including OOB, bytes */
333 uint pgszoob; /* page size including OOB , bytes*/
334 uint secszoob; /* sector size including OOB, bytes */
335 uint pgnum; /* total number of pages */
336 uint pgsec; /* number of pages per sector */
337 uint secshift; /* bits number in sector size */
338 uint pgshift; /* bits number in page size */
339 uint oobshift; /* bits number in OOB size */
340 uint pgaddrbytes; /* bytes per page address */
341 uint secaddrbytes; /* bytes per sector address */
342 uint idbytes; /* the number ID bytes that this chip outputs */
343 } geom;
344
345 /* NAND flash internal registers */
346 struct {
347 unsigned command; /* the command register */
348 u_char status; /* the status register */
349 uint row; /* the page number */
350 uint column; /* the offset within page */
351 uint count; /* internal counter */
352 uint num; /* number of bytes which must be processed */
353 uint off; /* fixed page offset */
354 } regs;
355
356 /* NAND flash lines state */
357 struct {
358 int ce; /* chip Enable */
359 int cle; /* command Latch Enable */
360 int ale; /* address Latch Enable */
361 int wp; /* write Protect */
362 } lines;
363
364 /* Fields needed when using a cache file */
365 struct file *cfile; /* Open file */
366 unsigned char *pages_written; /* Which pages have been written */
367 void *file_buf;
368 struct page *held_pages[NS_MAX_HELD_PAGES];
369 int held_cnt;
370
371 struct nandsim_debug_info dbg;
372 };
373
374 /*
375 * Operations array. To perform any operation the simulator must pass
376 * through the correspondent states chain.
377 */
378 static struct nandsim_operations {
379 uint32_t reqopts; /* options which are required to perform the operation */
380 uint32_t states[NS_OPER_STATES]; /* operation's states */
381 } ops[NS_OPER_NUM] = {
382 /* Read page + OOB from the beginning */
383 {OPT_SMALLPAGE, {STATE_CMD_READ0 | ACTION_ZEROOFF, STATE_ADDR_PAGE | ACTION_CPY,
384 STATE_DATAOUT, STATE_READY}},
385 /* Read page + OOB from the second half */
386 {OPT_PAGE512_8BIT, {STATE_CMD_READ1 | ACTION_HALFOFF, STATE_ADDR_PAGE | ACTION_CPY,
387 STATE_DATAOUT, STATE_READY}},
388 /* Read OOB */
389 {OPT_SMALLPAGE, {STATE_CMD_READOOB | ACTION_OOBOFF, STATE_ADDR_PAGE | ACTION_CPY,
390 STATE_DATAOUT, STATE_READY}},
391 /* Program page starting from the beginning */
392 {OPT_ANY, {STATE_CMD_SEQIN, STATE_ADDR_PAGE, STATE_DATAIN,
393 STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
394 /* Program page starting from the beginning */
395 {OPT_SMALLPAGE, {STATE_CMD_READ0, STATE_CMD_SEQIN | ACTION_ZEROOFF, STATE_ADDR_PAGE,
396 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
397 /* Program page starting from the second half */
398 {OPT_PAGE512, {STATE_CMD_READ1, STATE_CMD_SEQIN | ACTION_HALFOFF, STATE_ADDR_PAGE,
399 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
400 /* Program OOB */
401 {OPT_SMALLPAGE, {STATE_CMD_READOOB, STATE_CMD_SEQIN | ACTION_OOBOFF, STATE_ADDR_PAGE,
402 STATE_DATAIN, STATE_CMD_PAGEPROG | ACTION_PRGPAGE, STATE_READY}},
403 /* Erase sector */
404 {OPT_ANY, {STATE_CMD_ERASE1, STATE_ADDR_SEC, STATE_CMD_ERASE2 | ACTION_SECERASE, STATE_READY}},
405 /* Read status */
406 {OPT_ANY, {STATE_CMD_STATUS, STATE_DATAOUT_STATUS, STATE_READY}},
407 /* Read ID */
408 {OPT_ANY, {STATE_CMD_READID, STATE_ADDR_ZERO, STATE_DATAOUT_ID, STATE_READY}},
409 /* Large page devices read page */
410 {OPT_LARGEPAGE, {STATE_CMD_READ0, STATE_ADDR_PAGE, STATE_CMD_READSTART | ACTION_CPY,
411 STATE_DATAOUT, STATE_READY}},
412 /* Large page devices random page read */
413 {OPT_LARGEPAGE, {STATE_CMD_RNDOUT, STATE_ADDR_COLUMN, STATE_CMD_RNDOUTSTART | ACTION_CPY,
414 STATE_DATAOUT, STATE_READY}},
415 };
416
417 struct weak_block {
418 struct list_head list;
419 unsigned int erase_block_no;
420 unsigned int max_erases;
421 unsigned int erases_done;
422 };
423
424 static LIST_HEAD(weak_blocks);
425
426 struct weak_page {
427 struct list_head list;
428 unsigned int page_no;
429 unsigned int max_writes;
430 unsigned int writes_done;
431 };
432
433 static LIST_HEAD(weak_pages);
434
435 struct grave_page {
436 struct list_head list;
437 unsigned int page_no;
438 unsigned int max_reads;
439 unsigned int reads_done;
440 };
441
442 static LIST_HEAD(grave_pages);
443
444 static unsigned long *erase_block_wear = NULL;
445 static unsigned int wear_eb_count = 0;
446 static unsigned long total_wear = 0;
447
448 /* MTD structure for NAND controller */
449 static struct mtd_info *nsmtd;
450
nandsim_debugfs_show(struct seq_file * m,void * private)451 static int nandsim_debugfs_show(struct seq_file *m, void *private)
452 {
453 unsigned long wmin = -1, wmax = 0, avg;
454 unsigned long deciles[10], decile_max[10], tot = 0;
455 unsigned int i;
456
457 /* Calc wear stats */
458 for (i = 0; i < wear_eb_count; ++i) {
459 unsigned long wear = erase_block_wear[i];
460 if (wear < wmin)
461 wmin = wear;
462 if (wear > wmax)
463 wmax = wear;
464 tot += wear;
465 }
466
467 for (i = 0; i < 9; ++i) {
468 deciles[i] = 0;
469 decile_max[i] = (wmax * (i + 1) + 5) / 10;
470 }
471 deciles[9] = 0;
472 decile_max[9] = wmax;
473 for (i = 0; i < wear_eb_count; ++i) {
474 int d;
475 unsigned long wear = erase_block_wear[i];
476 for (d = 0; d < 10; ++d)
477 if (wear <= decile_max[d]) {
478 deciles[d] += 1;
479 break;
480 }
481 }
482 avg = tot / wear_eb_count;
483
484 /* Output wear report */
485 seq_printf(m, "Total numbers of erases: %lu\n", tot);
486 seq_printf(m, "Number of erase blocks: %u\n", wear_eb_count);
487 seq_printf(m, "Average number of erases: %lu\n", avg);
488 seq_printf(m, "Maximum number of erases: %lu\n", wmax);
489 seq_printf(m, "Minimum number of erases: %lu\n", wmin);
490 for (i = 0; i < 10; ++i) {
491 unsigned long from = (i ? decile_max[i - 1] + 1 : 0);
492 if (from > decile_max[i])
493 continue;
494 seq_printf(m, "Number of ebs with erase counts from %lu to %lu : %lu\n",
495 from,
496 decile_max[i],
497 deciles[i]);
498 }
499
500 return 0;
501 }
502
nandsim_debugfs_open(struct inode * inode,struct file * file)503 static int nandsim_debugfs_open(struct inode *inode, struct file *file)
504 {
505 return single_open(file, nandsim_debugfs_show, inode->i_private);
506 }
507
508 static const struct file_operations dfs_fops = {
509 .open = nandsim_debugfs_open,
510 .read = seq_read,
511 .llseek = seq_lseek,
512 .release = single_release,
513 };
514
515 /**
516 * nandsim_debugfs_create - initialize debugfs
517 * @dev: nandsim device description object
518 *
519 * This function creates all debugfs files for UBI device @ubi. Returns zero in
520 * case of success and a negative error code in case of failure.
521 */
nandsim_debugfs_create(struct nandsim * dev)522 static int nandsim_debugfs_create(struct nandsim *dev)
523 {
524 struct nandsim_debug_info *dbg = &dev->dbg;
525 struct dentry *dent;
526 int err;
527
528 if (!IS_ENABLED(CONFIG_DEBUG_FS))
529 return 0;
530
531 dent = debugfs_create_dir("nandsim", NULL);
532 if (IS_ERR_OR_NULL(dent)) {
533 int err = dent ? -ENODEV : PTR_ERR(dent);
534
535 NS_ERR("cannot create \"nandsim\" debugfs directory, err %d\n",
536 err);
537 return err;
538 }
539 dbg->dfs_root = dent;
540
541 dent = debugfs_create_file("wear_report", S_IRUSR,
542 dbg->dfs_root, dev, &dfs_fops);
543 if (IS_ERR_OR_NULL(dent))
544 goto out_remove;
545 dbg->dfs_wear_report = dent;
546
547 return 0;
548
549 out_remove:
550 debugfs_remove_recursive(dbg->dfs_root);
551 err = dent ? PTR_ERR(dent) : -ENODEV;
552 return err;
553 }
554
555 /**
556 * nandsim_debugfs_remove - destroy all debugfs files
557 */
nandsim_debugfs_remove(struct nandsim * ns)558 static void nandsim_debugfs_remove(struct nandsim *ns)
559 {
560 if (IS_ENABLED(CONFIG_DEBUG_FS))
561 debugfs_remove_recursive(ns->dbg.dfs_root);
562 }
563
564 /*
565 * Allocate array of page pointers, create slab allocation for an array
566 * and initialize the array by NULL pointers.
567 *
568 * RETURNS: 0 if success, -ENOMEM if memory alloc fails.
569 */
alloc_device(struct nandsim * ns)570 static int alloc_device(struct nandsim *ns)
571 {
572 struct file *cfile;
573 int i, err;
574
575 if (cache_file) {
576 cfile = filp_open(cache_file, O_CREAT | O_RDWR | O_LARGEFILE, 0600);
577 if (IS_ERR(cfile))
578 return PTR_ERR(cfile);
579 if (!cfile->f_op || (!cfile->f_op->read && !cfile->f_op->aio_read)) {
580 NS_ERR("alloc_device: cache file not readable\n");
581 err = -EINVAL;
582 goto err_close;
583 }
584 if (!cfile->f_op->write && !cfile->f_op->aio_write) {
585 NS_ERR("alloc_device: cache file not writeable\n");
586 err = -EINVAL;
587 goto err_close;
588 }
589 ns->pages_written = vzalloc(ns->geom.pgnum);
590 if (!ns->pages_written) {
591 NS_ERR("alloc_device: unable to allocate pages written array\n");
592 err = -ENOMEM;
593 goto err_close;
594 }
595 ns->file_buf = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
596 if (!ns->file_buf) {
597 NS_ERR("alloc_device: unable to allocate file buf\n");
598 err = -ENOMEM;
599 goto err_free;
600 }
601 ns->cfile = cfile;
602 return 0;
603 }
604
605 ns->pages = vmalloc(ns->geom.pgnum * sizeof(union ns_mem));
606 if (!ns->pages) {
607 NS_ERR("alloc_device: unable to allocate page array\n");
608 return -ENOMEM;
609 }
610 for (i = 0; i < ns->geom.pgnum; i++) {
611 ns->pages[i].byte = NULL;
612 }
613 ns->nand_pages_slab = kmem_cache_create("nandsim",
614 ns->geom.pgszoob, 0, 0, NULL);
615 if (!ns->nand_pages_slab) {
616 NS_ERR("cache_create: unable to create kmem_cache\n");
617 return -ENOMEM;
618 }
619
620 return 0;
621
622 err_free:
623 vfree(ns->pages_written);
624 err_close:
625 filp_close(cfile, NULL);
626 return err;
627 }
628
629 /*
630 * Free any allocated pages, and free the array of page pointers.
631 */
free_device(struct nandsim * ns)632 static void free_device(struct nandsim *ns)
633 {
634 int i;
635
636 if (ns->cfile) {
637 kfree(ns->file_buf);
638 vfree(ns->pages_written);
639 filp_close(ns->cfile, NULL);
640 return;
641 }
642
643 if (ns->pages) {
644 for (i = 0; i < ns->geom.pgnum; i++) {
645 if (ns->pages[i].byte)
646 kmem_cache_free(ns->nand_pages_slab,
647 ns->pages[i].byte);
648 }
649 kmem_cache_destroy(ns->nand_pages_slab);
650 vfree(ns->pages);
651 }
652 }
653
get_partition_name(int i)654 static char *get_partition_name(int i)
655 {
656 char buf[64];
657 sprintf(buf, "NAND simulator partition %d", i);
658 return kstrdup(buf, GFP_KERNEL);
659 }
660
661 /*
662 * Initialize the nandsim structure.
663 *
664 * RETURNS: 0 if success, -ERRNO if failure.
665 */
init_nandsim(struct mtd_info * mtd)666 static int init_nandsim(struct mtd_info *mtd)
667 {
668 struct nand_chip *chip = mtd->priv;
669 struct nandsim *ns = chip->priv;
670 int i, ret = 0;
671 uint64_t remains;
672 uint64_t next_offset;
673
674 if (NS_IS_INITIALIZED(ns)) {
675 NS_ERR("init_nandsim: nandsim is already initialized\n");
676 return -EIO;
677 }
678
679 /* Force mtd to not do delays */
680 chip->chip_delay = 0;
681
682 /* Initialize the NAND flash parameters */
683 ns->busw = chip->options & NAND_BUSWIDTH_16 ? 16 : 8;
684 ns->geom.totsz = mtd->size;
685 ns->geom.pgsz = mtd->writesize;
686 ns->geom.oobsz = mtd->oobsize;
687 ns->geom.secsz = mtd->erasesize;
688 ns->geom.pgszoob = ns->geom.pgsz + ns->geom.oobsz;
689 ns->geom.pgnum = div_u64(ns->geom.totsz, ns->geom.pgsz);
690 ns->geom.totszoob = ns->geom.totsz + (uint64_t)ns->geom.pgnum * ns->geom.oobsz;
691 ns->geom.secshift = ffs(ns->geom.secsz) - 1;
692 ns->geom.pgshift = chip->page_shift;
693 ns->geom.oobshift = ffs(ns->geom.oobsz) - 1;
694 ns->geom.pgsec = ns->geom.secsz / ns->geom.pgsz;
695 ns->geom.secszoob = ns->geom.secsz + ns->geom.oobsz * ns->geom.pgsec;
696 ns->options = 0;
697
698 if (ns->geom.pgsz == 512) {
699 ns->options |= OPT_PAGE512;
700 if (ns->busw == 8)
701 ns->options |= OPT_PAGE512_8BIT;
702 } else if (ns->geom.pgsz == 2048) {
703 ns->options |= OPT_PAGE2048;
704 } else if (ns->geom.pgsz == 4096) {
705 ns->options |= OPT_PAGE4096;
706 } else {
707 NS_ERR("init_nandsim: unknown page size %u\n", ns->geom.pgsz);
708 return -EIO;
709 }
710
711 if (ns->options & OPT_SMALLPAGE) {
712 if (ns->geom.totsz <= (32 << 20)) {
713 ns->geom.pgaddrbytes = 3;
714 ns->geom.secaddrbytes = 2;
715 } else {
716 ns->geom.pgaddrbytes = 4;
717 ns->geom.secaddrbytes = 3;
718 }
719 } else {
720 if (ns->geom.totsz <= (128 << 20)) {
721 ns->geom.pgaddrbytes = 4;
722 ns->geom.secaddrbytes = 2;
723 } else {
724 ns->geom.pgaddrbytes = 5;
725 ns->geom.secaddrbytes = 3;
726 }
727 }
728
729 /* Fill the partition_info structure */
730 if (parts_num > ARRAY_SIZE(ns->partitions)) {
731 NS_ERR("too many partitions.\n");
732 ret = -EINVAL;
733 goto error;
734 }
735 remains = ns->geom.totsz;
736 next_offset = 0;
737 for (i = 0; i < parts_num; ++i) {
738 uint64_t part_sz = (uint64_t)parts[i] * ns->geom.secsz;
739
740 if (!part_sz || part_sz > remains) {
741 NS_ERR("bad partition size.\n");
742 ret = -EINVAL;
743 goto error;
744 }
745 ns->partitions[i].name = get_partition_name(i);
746 ns->partitions[i].offset = next_offset;
747 ns->partitions[i].size = part_sz;
748 next_offset += ns->partitions[i].size;
749 remains -= ns->partitions[i].size;
750 }
751 ns->nbparts = parts_num;
752 if (remains) {
753 if (parts_num + 1 > ARRAY_SIZE(ns->partitions)) {
754 NS_ERR("too many partitions.\n");
755 ret = -EINVAL;
756 goto error;
757 }
758 ns->partitions[i].name = get_partition_name(i);
759 ns->partitions[i].offset = next_offset;
760 ns->partitions[i].size = remains;
761 ns->nbparts += 1;
762 }
763
764 /* Detect how many ID bytes the NAND chip outputs */
765 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
766 if (second_id_byte != nand_flash_ids[i].dev_id)
767 continue;
768 }
769
770 if (ns->busw == 16)
771 NS_WARN("16-bit flashes support wasn't tested\n");
772
773 printk("flash size: %llu MiB\n",
774 (unsigned long long)ns->geom.totsz >> 20);
775 printk("page size: %u bytes\n", ns->geom.pgsz);
776 printk("OOB area size: %u bytes\n", ns->geom.oobsz);
777 printk("sector size: %u KiB\n", ns->geom.secsz >> 10);
778 printk("pages number: %u\n", ns->geom.pgnum);
779 printk("pages per sector: %u\n", ns->geom.pgsec);
780 printk("bus width: %u\n", ns->busw);
781 printk("bits in sector size: %u\n", ns->geom.secshift);
782 printk("bits in page size: %u\n", ns->geom.pgshift);
783 printk("bits in OOB size: %u\n", ns->geom.oobshift);
784 printk("flash size with OOB: %llu KiB\n",
785 (unsigned long long)ns->geom.totszoob >> 10);
786 printk("page address bytes: %u\n", ns->geom.pgaddrbytes);
787 printk("sector address bytes: %u\n", ns->geom.secaddrbytes);
788 printk("options: %#x\n", ns->options);
789
790 if ((ret = alloc_device(ns)) != 0)
791 goto error;
792
793 /* Allocate / initialize the internal buffer */
794 ns->buf.byte = kmalloc(ns->geom.pgszoob, GFP_KERNEL);
795 if (!ns->buf.byte) {
796 NS_ERR("init_nandsim: unable to allocate %u bytes for the internal buffer\n",
797 ns->geom.pgszoob);
798 ret = -ENOMEM;
799 goto error;
800 }
801 memset(ns->buf.byte, 0xFF, ns->geom.pgszoob);
802
803 return 0;
804
805 error:
806 free_device(ns);
807
808 return ret;
809 }
810
811 /*
812 * Free the nandsim structure.
813 */
free_nandsim(struct nandsim * ns)814 static void free_nandsim(struct nandsim *ns)
815 {
816 kfree(ns->buf.byte);
817 free_device(ns);
818
819 return;
820 }
821
parse_badblocks(struct nandsim * ns,struct mtd_info * mtd)822 static int parse_badblocks(struct nandsim *ns, struct mtd_info *mtd)
823 {
824 char *w;
825 int zero_ok;
826 unsigned int erase_block_no;
827 loff_t offset;
828
829 if (!badblocks)
830 return 0;
831 w = badblocks;
832 do {
833 zero_ok = (*w == '0' ? 1 : 0);
834 erase_block_no = simple_strtoul(w, &w, 0);
835 if (!zero_ok && !erase_block_no) {
836 NS_ERR("invalid badblocks.\n");
837 return -EINVAL;
838 }
839 offset = erase_block_no * ns->geom.secsz;
840 if (mtd_block_markbad(mtd, offset)) {
841 NS_ERR("invalid badblocks.\n");
842 return -EINVAL;
843 }
844 if (*w == ',')
845 w += 1;
846 } while (*w);
847 return 0;
848 }
849
parse_weakblocks(void)850 static int parse_weakblocks(void)
851 {
852 char *w;
853 int zero_ok;
854 unsigned int erase_block_no;
855 unsigned int max_erases;
856 struct weak_block *wb;
857
858 if (!weakblocks)
859 return 0;
860 w = weakblocks;
861 do {
862 zero_ok = (*w == '0' ? 1 : 0);
863 erase_block_no = simple_strtoul(w, &w, 0);
864 if (!zero_ok && !erase_block_no) {
865 NS_ERR("invalid weakblocks.\n");
866 return -EINVAL;
867 }
868 max_erases = 3;
869 if (*w == ':') {
870 w += 1;
871 max_erases = simple_strtoul(w, &w, 0);
872 }
873 if (*w == ',')
874 w += 1;
875 wb = kzalloc(sizeof(*wb), GFP_KERNEL);
876 if (!wb) {
877 NS_ERR("unable to allocate memory.\n");
878 return -ENOMEM;
879 }
880 wb->erase_block_no = erase_block_no;
881 wb->max_erases = max_erases;
882 list_add(&wb->list, &weak_blocks);
883 } while (*w);
884 return 0;
885 }
886
erase_error(unsigned int erase_block_no)887 static int erase_error(unsigned int erase_block_no)
888 {
889 struct weak_block *wb;
890
891 list_for_each_entry(wb, &weak_blocks, list)
892 if (wb->erase_block_no == erase_block_no) {
893 if (wb->erases_done >= wb->max_erases)
894 return 1;
895 wb->erases_done += 1;
896 return 0;
897 }
898 return 0;
899 }
900
parse_weakpages(void)901 static int parse_weakpages(void)
902 {
903 char *w;
904 int zero_ok;
905 unsigned int page_no;
906 unsigned int max_writes;
907 struct weak_page *wp;
908
909 if (!weakpages)
910 return 0;
911 w = weakpages;
912 do {
913 zero_ok = (*w == '0' ? 1 : 0);
914 page_no = simple_strtoul(w, &w, 0);
915 if (!zero_ok && !page_no) {
916 NS_ERR("invalid weakpagess.\n");
917 return -EINVAL;
918 }
919 max_writes = 3;
920 if (*w == ':') {
921 w += 1;
922 max_writes = simple_strtoul(w, &w, 0);
923 }
924 if (*w == ',')
925 w += 1;
926 wp = kzalloc(sizeof(*wp), GFP_KERNEL);
927 if (!wp) {
928 NS_ERR("unable to allocate memory.\n");
929 return -ENOMEM;
930 }
931 wp->page_no = page_no;
932 wp->max_writes = max_writes;
933 list_add(&wp->list, &weak_pages);
934 } while (*w);
935 return 0;
936 }
937
write_error(unsigned int page_no)938 static int write_error(unsigned int page_no)
939 {
940 struct weak_page *wp;
941
942 list_for_each_entry(wp, &weak_pages, list)
943 if (wp->page_no == page_no) {
944 if (wp->writes_done >= wp->max_writes)
945 return 1;
946 wp->writes_done += 1;
947 return 0;
948 }
949 return 0;
950 }
951
parse_gravepages(void)952 static int parse_gravepages(void)
953 {
954 char *g;
955 int zero_ok;
956 unsigned int page_no;
957 unsigned int max_reads;
958 struct grave_page *gp;
959
960 if (!gravepages)
961 return 0;
962 g = gravepages;
963 do {
964 zero_ok = (*g == '0' ? 1 : 0);
965 page_no = simple_strtoul(g, &g, 0);
966 if (!zero_ok && !page_no) {
967 NS_ERR("invalid gravepagess.\n");
968 return -EINVAL;
969 }
970 max_reads = 3;
971 if (*g == ':') {
972 g += 1;
973 max_reads = simple_strtoul(g, &g, 0);
974 }
975 if (*g == ',')
976 g += 1;
977 gp = kzalloc(sizeof(*gp), GFP_KERNEL);
978 if (!gp) {
979 NS_ERR("unable to allocate memory.\n");
980 return -ENOMEM;
981 }
982 gp->page_no = page_no;
983 gp->max_reads = max_reads;
984 list_add(&gp->list, &grave_pages);
985 } while (*g);
986 return 0;
987 }
988
read_error(unsigned int page_no)989 static int read_error(unsigned int page_no)
990 {
991 struct grave_page *gp;
992
993 list_for_each_entry(gp, &grave_pages, list)
994 if (gp->page_no == page_no) {
995 if (gp->reads_done >= gp->max_reads)
996 return 1;
997 gp->reads_done += 1;
998 return 0;
999 }
1000 return 0;
1001 }
1002
free_lists(void)1003 static void free_lists(void)
1004 {
1005 struct list_head *pos, *n;
1006 list_for_each_safe(pos, n, &weak_blocks) {
1007 list_del(pos);
1008 kfree(list_entry(pos, struct weak_block, list));
1009 }
1010 list_for_each_safe(pos, n, &weak_pages) {
1011 list_del(pos);
1012 kfree(list_entry(pos, struct weak_page, list));
1013 }
1014 list_for_each_safe(pos, n, &grave_pages) {
1015 list_del(pos);
1016 kfree(list_entry(pos, struct grave_page, list));
1017 }
1018 kfree(erase_block_wear);
1019 }
1020
setup_wear_reporting(struct mtd_info * mtd)1021 static int setup_wear_reporting(struct mtd_info *mtd)
1022 {
1023 size_t mem;
1024
1025 wear_eb_count = div_u64(mtd->size, mtd->erasesize);
1026 mem = wear_eb_count * sizeof(unsigned long);
1027 if (mem / sizeof(unsigned long) != wear_eb_count) {
1028 NS_ERR("Too many erase blocks for wear reporting\n");
1029 return -ENOMEM;
1030 }
1031 erase_block_wear = kzalloc(mem, GFP_KERNEL);
1032 if (!erase_block_wear) {
1033 NS_ERR("Too many erase blocks for wear reporting\n");
1034 return -ENOMEM;
1035 }
1036 return 0;
1037 }
1038
update_wear(unsigned int erase_block_no)1039 static void update_wear(unsigned int erase_block_no)
1040 {
1041 if (!erase_block_wear)
1042 return;
1043 total_wear += 1;
1044 /*
1045 * TODO: Notify this through a debugfs entry,
1046 * instead of showing an error message.
1047 */
1048 if (total_wear == 0)
1049 NS_ERR("Erase counter total overflow\n");
1050 erase_block_wear[erase_block_no] += 1;
1051 if (erase_block_wear[erase_block_no] == 0)
1052 NS_ERR("Erase counter overflow for erase block %u\n", erase_block_no);
1053 }
1054
1055 /*
1056 * Returns the string representation of 'state' state.
1057 */
get_state_name(uint32_t state)1058 static char *get_state_name(uint32_t state)
1059 {
1060 switch (NS_STATE(state)) {
1061 case STATE_CMD_READ0:
1062 return "STATE_CMD_READ0";
1063 case STATE_CMD_READ1:
1064 return "STATE_CMD_READ1";
1065 case STATE_CMD_PAGEPROG:
1066 return "STATE_CMD_PAGEPROG";
1067 case STATE_CMD_READOOB:
1068 return "STATE_CMD_READOOB";
1069 case STATE_CMD_READSTART:
1070 return "STATE_CMD_READSTART";
1071 case STATE_CMD_ERASE1:
1072 return "STATE_CMD_ERASE1";
1073 case STATE_CMD_STATUS:
1074 return "STATE_CMD_STATUS";
1075 case STATE_CMD_SEQIN:
1076 return "STATE_CMD_SEQIN";
1077 case STATE_CMD_READID:
1078 return "STATE_CMD_READID";
1079 case STATE_CMD_ERASE2:
1080 return "STATE_CMD_ERASE2";
1081 case STATE_CMD_RESET:
1082 return "STATE_CMD_RESET";
1083 case STATE_CMD_RNDOUT:
1084 return "STATE_CMD_RNDOUT";
1085 case STATE_CMD_RNDOUTSTART:
1086 return "STATE_CMD_RNDOUTSTART";
1087 case STATE_ADDR_PAGE:
1088 return "STATE_ADDR_PAGE";
1089 case STATE_ADDR_SEC:
1090 return "STATE_ADDR_SEC";
1091 case STATE_ADDR_ZERO:
1092 return "STATE_ADDR_ZERO";
1093 case STATE_ADDR_COLUMN:
1094 return "STATE_ADDR_COLUMN";
1095 case STATE_DATAIN:
1096 return "STATE_DATAIN";
1097 case STATE_DATAOUT:
1098 return "STATE_DATAOUT";
1099 case STATE_DATAOUT_ID:
1100 return "STATE_DATAOUT_ID";
1101 case STATE_DATAOUT_STATUS:
1102 return "STATE_DATAOUT_STATUS";
1103 case STATE_DATAOUT_STATUS_M:
1104 return "STATE_DATAOUT_STATUS_M";
1105 case STATE_READY:
1106 return "STATE_READY";
1107 case STATE_UNKNOWN:
1108 return "STATE_UNKNOWN";
1109 }
1110
1111 NS_ERR("get_state_name: unknown state, BUG\n");
1112 return NULL;
1113 }
1114
1115 /*
1116 * Check if command is valid.
1117 *
1118 * RETURNS: 1 if wrong command, 0 if right.
1119 */
check_command(int cmd)1120 static int check_command(int cmd)
1121 {
1122 switch (cmd) {
1123
1124 case NAND_CMD_READ0:
1125 case NAND_CMD_READ1:
1126 case NAND_CMD_READSTART:
1127 case NAND_CMD_PAGEPROG:
1128 case NAND_CMD_READOOB:
1129 case NAND_CMD_ERASE1:
1130 case NAND_CMD_STATUS:
1131 case NAND_CMD_SEQIN:
1132 case NAND_CMD_READID:
1133 case NAND_CMD_ERASE2:
1134 case NAND_CMD_RESET:
1135 case NAND_CMD_RNDOUT:
1136 case NAND_CMD_RNDOUTSTART:
1137 return 0;
1138
1139 default:
1140 return 1;
1141 }
1142 }
1143
1144 /*
1145 * Returns state after command is accepted by command number.
1146 */
get_state_by_command(unsigned command)1147 static uint32_t get_state_by_command(unsigned command)
1148 {
1149 switch (command) {
1150 case NAND_CMD_READ0:
1151 return STATE_CMD_READ0;
1152 case NAND_CMD_READ1:
1153 return STATE_CMD_READ1;
1154 case NAND_CMD_PAGEPROG:
1155 return STATE_CMD_PAGEPROG;
1156 case NAND_CMD_READSTART:
1157 return STATE_CMD_READSTART;
1158 case NAND_CMD_READOOB:
1159 return STATE_CMD_READOOB;
1160 case NAND_CMD_ERASE1:
1161 return STATE_CMD_ERASE1;
1162 case NAND_CMD_STATUS:
1163 return STATE_CMD_STATUS;
1164 case NAND_CMD_SEQIN:
1165 return STATE_CMD_SEQIN;
1166 case NAND_CMD_READID:
1167 return STATE_CMD_READID;
1168 case NAND_CMD_ERASE2:
1169 return STATE_CMD_ERASE2;
1170 case NAND_CMD_RESET:
1171 return STATE_CMD_RESET;
1172 case NAND_CMD_RNDOUT:
1173 return STATE_CMD_RNDOUT;
1174 case NAND_CMD_RNDOUTSTART:
1175 return STATE_CMD_RNDOUTSTART;
1176 }
1177
1178 NS_ERR("get_state_by_command: unknown command, BUG\n");
1179 return 0;
1180 }
1181
1182 /*
1183 * Move an address byte to the correspondent internal register.
1184 */
accept_addr_byte(struct nandsim * ns,u_char bt)1185 static inline void accept_addr_byte(struct nandsim *ns, u_char bt)
1186 {
1187 uint byte = (uint)bt;
1188
1189 if (ns->regs.count < (ns->geom.pgaddrbytes - ns->geom.secaddrbytes))
1190 ns->regs.column |= (byte << 8 * ns->regs.count);
1191 else {
1192 ns->regs.row |= (byte << 8 * (ns->regs.count -
1193 ns->geom.pgaddrbytes +
1194 ns->geom.secaddrbytes));
1195 }
1196
1197 return;
1198 }
1199
1200 /*
1201 * Switch to STATE_READY state.
1202 */
switch_to_ready_state(struct nandsim * ns,u_char status)1203 static inline void switch_to_ready_state(struct nandsim *ns, u_char status)
1204 {
1205 NS_DBG("switch_to_ready_state: switch to %s state\n", get_state_name(STATE_READY));
1206
1207 ns->state = STATE_READY;
1208 ns->nxstate = STATE_UNKNOWN;
1209 ns->op = NULL;
1210 ns->npstates = 0;
1211 ns->stateidx = 0;
1212 ns->regs.num = 0;
1213 ns->regs.count = 0;
1214 ns->regs.off = 0;
1215 ns->regs.row = 0;
1216 ns->regs.column = 0;
1217 ns->regs.status = status;
1218 }
1219
1220 /*
1221 * If the operation isn't known yet, try to find it in the global array
1222 * of supported operations.
1223 *
1224 * Operation can be unknown because of the following.
1225 * 1. New command was accepted and this is the first call to find the
1226 * correspondent states chain. In this case ns->npstates = 0;
1227 * 2. There are several operations which begin with the same command(s)
1228 * (for example program from the second half and read from the
1229 * second half operations both begin with the READ1 command). In this
1230 * case the ns->pstates[] array contains previous states.
1231 *
1232 * Thus, the function tries to find operation containing the following
1233 * states (if the 'flag' parameter is 0):
1234 * ns->pstates[0], ... ns->pstates[ns->npstates], ns->state
1235 *
1236 * If (one and only one) matching operation is found, it is accepted (
1237 * ns->ops, ns->state, ns->nxstate are initialized, ns->npstate is
1238 * zeroed).
1239 *
1240 * If there are several matches, the current state is pushed to the
1241 * ns->pstates.
1242 *
1243 * The operation can be unknown only while commands are input to the chip.
1244 * As soon as address command is accepted, the operation must be known.
1245 * In such situation the function is called with 'flag' != 0, and the
1246 * operation is searched using the following pattern:
1247 * ns->pstates[0], ... ns->pstates[ns->npstates], <address input>
1248 *
1249 * It is supposed that this pattern must either match one operation or
1250 * none. There can't be ambiguity in that case.
1251 *
1252 * If no matches found, the function does the following:
1253 * 1. if there are saved states present, try to ignore them and search
1254 * again only using the last command. If nothing was found, switch
1255 * to the STATE_READY state.
1256 * 2. if there are no saved states, switch to the STATE_READY state.
1257 *
1258 * RETURNS: -2 - no matched operations found.
1259 * -1 - several matches.
1260 * 0 - operation is found.
1261 */
find_operation(struct nandsim * ns,uint32_t flag)1262 static int find_operation(struct nandsim *ns, uint32_t flag)
1263 {
1264 int opsfound = 0;
1265 int i, j, idx = 0;
1266
1267 for (i = 0; i < NS_OPER_NUM; i++) {
1268
1269 int found = 1;
1270
1271 if (!(ns->options & ops[i].reqopts))
1272 /* Ignore operations we can't perform */
1273 continue;
1274
1275 if (flag) {
1276 if (!(ops[i].states[ns->npstates] & STATE_ADDR_MASK))
1277 continue;
1278 } else {
1279 if (NS_STATE(ns->state) != NS_STATE(ops[i].states[ns->npstates]))
1280 continue;
1281 }
1282
1283 for (j = 0; j < ns->npstates; j++)
1284 if (NS_STATE(ops[i].states[j]) != NS_STATE(ns->pstates[j])
1285 && (ns->options & ops[idx].reqopts)) {
1286 found = 0;
1287 break;
1288 }
1289
1290 if (found) {
1291 idx = i;
1292 opsfound += 1;
1293 }
1294 }
1295
1296 if (opsfound == 1) {
1297 /* Exact match */
1298 ns->op = &ops[idx].states[0];
1299 if (flag) {
1300 /*
1301 * In this case the find_operation function was
1302 * called when address has just began input. But it isn't
1303 * yet fully input and the current state must
1304 * not be one of STATE_ADDR_*, but the STATE_ADDR_*
1305 * state must be the next state (ns->nxstate).
1306 */
1307 ns->stateidx = ns->npstates - 1;
1308 } else {
1309 ns->stateidx = ns->npstates;
1310 }
1311 ns->npstates = 0;
1312 ns->state = ns->op[ns->stateidx];
1313 ns->nxstate = ns->op[ns->stateidx + 1];
1314 NS_DBG("find_operation: operation found, index: %d, state: %s, nxstate %s\n",
1315 idx, get_state_name(ns->state), get_state_name(ns->nxstate));
1316 return 0;
1317 }
1318
1319 if (opsfound == 0) {
1320 /* Nothing was found. Try to ignore previous commands (if any) and search again */
1321 if (ns->npstates != 0) {
1322 NS_DBG("find_operation: no operation found, try again with state %s\n",
1323 get_state_name(ns->state));
1324 ns->npstates = 0;
1325 return find_operation(ns, 0);
1326
1327 }
1328 NS_DBG("find_operation: no operations found\n");
1329 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1330 return -2;
1331 }
1332
1333 if (flag) {
1334 /* This shouldn't happen */
1335 NS_DBG("find_operation: BUG, operation must be known if address is input\n");
1336 return -2;
1337 }
1338
1339 NS_DBG("find_operation: there is still ambiguity\n");
1340
1341 ns->pstates[ns->npstates++] = ns->state;
1342
1343 return -1;
1344 }
1345
put_pages(struct nandsim * ns)1346 static void put_pages(struct nandsim *ns)
1347 {
1348 int i;
1349
1350 for (i = 0; i < ns->held_cnt; i++)
1351 page_cache_release(ns->held_pages[i]);
1352 }
1353
1354 /* Get page cache pages in advance to provide NOFS memory allocation */
get_pages(struct nandsim * ns,struct file * file,size_t count,loff_t pos)1355 static int get_pages(struct nandsim *ns, struct file *file, size_t count, loff_t pos)
1356 {
1357 pgoff_t index, start_index, end_index;
1358 struct page *page;
1359 struct address_space *mapping = file->f_mapping;
1360
1361 start_index = pos >> PAGE_CACHE_SHIFT;
1362 end_index = (pos + count - 1) >> PAGE_CACHE_SHIFT;
1363 if (end_index - start_index + 1 > NS_MAX_HELD_PAGES)
1364 return -EINVAL;
1365 ns->held_cnt = 0;
1366 for (index = start_index; index <= end_index; index++) {
1367 page = find_get_page(mapping, index);
1368 if (page == NULL) {
1369 page = find_or_create_page(mapping, index, GFP_NOFS);
1370 if (page == NULL) {
1371 write_inode_now(mapping->host, 1);
1372 page = find_or_create_page(mapping, index, GFP_NOFS);
1373 }
1374 if (page == NULL) {
1375 put_pages(ns);
1376 return -ENOMEM;
1377 }
1378 unlock_page(page);
1379 }
1380 ns->held_pages[ns->held_cnt++] = page;
1381 }
1382 return 0;
1383 }
1384
set_memalloc(void)1385 static int set_memalloc(void)
1386 {
1387 if (current->flags & PF_MEMALLOC)
1388 return 0;
1389 current->flags |= PF_MEMALLOC;
1390 return 1;
1391 }
1392
clear_memalloc(int memalloc)1393 static void clear_memalloc(int memalloc)
1394 {
1395 if (memalloc)
1396 current->flags &= ~PF_MEMALLOC;
1397 }
1398
read_file(struct nandsim * ns,struct file * file,void * buf,size_t count,loff_t pos)1399 static ssize_t read_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1400 {
1401 ssize_t tx;
1402 int err, memalloc;
1403
1404 err = get_pages(ns, file, count, pos);
1405 if (err)
1406 return err;
1407 memalloc = set_memalloc();
1408 tx = kernel_read(file, pos, buf, count);
1409 clear_memalloc(memalloc);
1410 put_pages(ns);
1411 return tx;
1412 }
1413
write_file(struct nandsim * ns,struct file * file,void * buf,size_t count,loff_t pos)1414 static ssize_t write_file(struct nandsim *ns, struct file *file, void *buf, size_t count, loff_t pos)
1415 {
1416 ssize_t tx;
1417 int err, memalloc;
1418
1419 err = get_pages(ns, file, count, pos);
1420 if (err)
1421 return err;
1422 memalloc = set_memalloc();
1423 tx = kernel_write(file, buf, count, pos);
1424 clear_memalloc(memalloc);
1425 put_pages(ns);
1426 return tx;
1427 }
1428
1429 /*
1430 * Returns a pointer to the current page.
1431 */
NS_GET_PAGE(struct nandsim * ns)1432 static inline union ns_mem *NS_GET_PAGE(struct nandsim *ns)
1433 {
1434 return &(ns->pages[ns->regs.row]);
1435 }
1436
1437 /*
1438 * Retuns a pointer to the current byte, within the current page.
1439 */
NS_PAGE_BYTE_OFF(struct nandsim * ns)1440 static inline u_char *NS_PAGE_BYTE_OFF(struct nandsim *ns)
1441 {
1442 return NS_GET_PAGE(ns)->byte + ns->regs.column + ns->regs.off;
1443 }
1444
do_read_error(struct nandsim * ns,int num)1445 int do_read_error(struct nandsim *ns, int num)
1446 {
1447 unsigned int page_no = ns->regs.row;
1448
1449 if (read_error(page_no)) {
1450 prandom_bytes(ns->buf.byte, num);
1451 NS_WARN("simulating read error in page %u\n", page_no);
1452 return 1;
1453 }
1454 return 0;
1455 }
1456
do_bit_flips(struct nandsim * ns,int num)1457 void do_bit_flips(struct nandsim *ns, int num)
1458 {
1459 if (bitflips && prandom_u32() < (1 << 22)) {
1460 int flips = 1;
1461 if (bitflips > 1)
1462 flips = (prandom_u32() % (int) bitflips) + 1;
1463 while (flips--) {
1464 int pos = prandom_u32() % (num * 8);
1465 ns->buf.byte[pos / 8] ^= (1 << (pos % 8));
1466 NS_WARN("read_page: flipping bit %d in page %d "
1467 "reading from %d ecc: corrected=%u failed=%u\n",
1468 pos, ns->regs.row, ns->regs.column + ns->regs.off,
1469 nsmtd->ecc_stats.corrected, nsmtd->ecc_stats.failed);
1470 }
1471 }
1472 }
1473
1474 /*
1475 * Fill the NAND buffer with data read from the specified page.
1476 */
read_page(struct nandsim * ns,int num)1477 static void read_page(struct nandsim *ns, int num)
1478 {
1479 union ns_mem *mypage;
1480
1481 if (ns->cfile) {
1482 if (!ns->pages_written[ns->regs.row]) {
1483 NS_DBG("read_page: page %d not written\n", ns->regs.row);
1484 memset(ns->buf.byte, 0xFF, num);
1485 } else {
1486 loff_t pos;
1487 ssize_t tx;
1488
1489 NS_DBG("read_page: page %d written, reading from %d\n",
1490 ns->regs.row, ns->regs.column + ns->regs.off);
1491 if (do_read_error(ns, num))
1492 return;
1493 pos = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1494 tx = read_file(ns, ns->cfile, ns->buf.byte, num, pos);
1495 if (tx != num) {
1496 NS_ERR("read_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1497 return;
1498 }
1499 do_bit_flips(ns, num);
1500 }
1501 return;
1502 }
1503
1504 mypage = NS_GET_PAGE(ns);
1505 if (mypage->byte == NULL) {
1506 NS_DBG("read_page: page %d not allocated\n", ns->regs.row);
1507 memset(ns->buf.byte, 0xFF, num);
1508 } else {
1509 NS_DBG("read_page: page %d allocated, reading from %d\n",
1510 ns->regs.row, ns->regs.column + ns->regs.off);
1511 if (do_read_error(ns, num))
1512 return;
1513 memcpy(ns->buf.byte, NS_PAGE_BYTE_OFF(ns), num);
1514 do_bit_flips(ns, num);
1515 }
1516 }
1517
1518 /*
1519 * Erase all pages in the specified sector.
1520 */
erase_sector(struct nandsim * ns)1521 static void erase_sector(struct nandsim *ns)
1522 {
1523 union ns_mem *mypage;
1524 int i;
1525
1526 if (ns->cfile) {
1527 for (i = 0; i < ns->geom.pgsec; i++)
1528 if (ns->pages_written[ns->regs.row + i]) {
1529 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row + i);
1530 ns->pages_written[ns->regs.row + i] = 0;
1531 }
1532 return;
1533 }
1534
1535 mypage = NS_GET_PAGE(ns);
1536 for (i = 0; i < ns->geom.pgsec; i++) {
1537 if (mypage->byte != NULL) {
1538 NS_DBG("erase_sector: freeing page %d\n", ns->regs.row+i);
1539 kmem_cache_free(ns->nand_pages_slab, mypage->byte);
1540 mypage->byte = NULL;
1541 }
1542 mypage++;
1543 }
1544 }
1545
1546 /*
1547 * Program the specified page with the contents from the NAND buffer.
1548 */
prog_page(struct nandsim * ns,int num)1549 static int prog_page(struct nandsim *ns, int num)
1550 {
1551 int i;
1552 union ns_mem *mypage;
1553 u_char *pg_off;
1554
1555 if (ns->cfile) {
1556 loff_t off;
1557 ssize_t tx;
1558 int all;
1559
1560 NS_DBG("prog_page: writing page %d\n", ns->regs.row);
1561 pg_off = ns->file_buf + ns->regs.column + ns->regs.off;
1562 off = (loff_t)ns->regs.row * ns->geom.pgszoob + ns->regs.column + ns->regs.off;
1563 if (!ns->pages_written[ns->regs.row]) {
1564 all = 1;
1565 memset(ns->file_buf, 0xff, ns->geom.pgszoob);
1566 } else {
1567 all = 0;
1568 tx = read_file(ns, ns->cfile, pg_off, num, off);
1569 if (tx != num) {
1570 NS_ERR("prog_page: read error for page %d ret %ld\n", ns->regs.row, (long)tx);
1571 return -1;
1572 }
1573 }
1574 for (i = 0; i < num; i++)
1575 pg_off[i] &= ns->buf.byte[i];
1576 if (all) {
1577 loff_t pos = (loff_t)ns->regs.row * ns->geom.pgszoob;
1578 tx = write_file(ns, ns->cfile, ns->file_buf, ns->geom.pgszoob, pos);
1579 if (tx != ns->geom.pgszoob) {
1580 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1581 return -1;
1582 }
1583 ns->pages_written[ns->regs.row] = 1;
1584 } else {
1585 tx = write_file(ns, ns->cfile, pg_off, num, off);
1586 if (tx != num) {
1587 NS_ERR("prog_page: write error for page %d ret %ld\n", ns->regs.row, (long)tx);
1588 return -1;
1589 }
1590 }
1591 return 0;
1592 }
1593
1594 mypage = NS_GET_PAGE(ns);
1595 if (mypage->byte == NULL) {
1596 NS_DBG("prog_page: allocating page %d\n", ns->regs.row);
1597 /*
1598 * We allocate memory with GFP_NOFS because a flash FS may
1599 * utilize this. If it is holding an FS lock, then gets here,
1600 * then kernel memory alloc runs writeback which goes to the FS
1601 * again and deadlocks. This was seen in practice.
1602 */
1603 mypage->byte = kmem_cache_alloc(ns->nand_pages_slab, GFP_NOFS);
1604 if (mypage->byte == NULL) {
1605 NS_ERR("prog_page: error allocating memory for page %d\n", ns->regs.row);
1606 return -1;
1607 }
1608 memset(mypage->byte, 0xFF, ns->geom.pgszoob);
1609 }
1610
1611 pg_off = NS_PAGE_BYTE_OFF(ns);
1612 for (i = 0; i < num; i++)
1613 pg_off[i] &= ns->buf.byte[i];
1614
1615 return 0;
1616 }
1617
1618 /*
1619 * If state has any action bit, perform this action.
1620 *
1621 * RETURNS: 0 if success, -1 if error.
1622 */
do_state_action(struct nandsim * ns,uint32_t action)1623 static int do_state_action(struct nandsim *ns, uint32_t action)
1624 {
1625 int num;
1626 int busdiv = ns->busw == 8 ? 1 : 2;
1627 unsigned int erase_block_no, page_no;
1628
1629 action &= ACTION_MASK;
1630
1631 /* Check that page address input is correct */
1632 if (action != ACTION_SECERASE && ns->regs.row >= ns->geom.pgnum) {
1633 NS_WARN("do_state_action: wrong page number (%#x)\n", ns->regs.row);
1634 return -1;
1635 }
1636
1637 switch (action) {
1638
1639 case ACTION_CPY:
1640 /*
1641 * Copy page data to the internal buffer.
1642 */
1643
1644 /* Column shouldn't be very large */
1645 if (ns->regs.column >= (ns->geom.pgszoob - ns->regs.off)) {
1646 NS_ERR("do_state_action: column number is too large\n");
1647 break;
1648 }
1649 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1650 read_page(ns, num);
1651
1652 NS_DBG("do_state_action: (ACTION_CPY:) copy %d bytes to int buf, raw offset %d\n",
1653 num, NS_RAW_OFFSET(ns) + ns->regs.off);
1654
1655 if (ns->regs.off == 0)
1656 NS_LOG("read page %d\n", ns->regs.row);
1657 else if (ns->regs.off < ns->geom.pgsz)
1658 NS_LOG("read page %d (second half)\n", ns->regs.row);
1659 else
1660 NS_LOG("read OOB of page %d\n", ns->regs.row);
1661
1662 NS_UDELAY(access_delay);
1663 NS_UDELAY(input_cycle * ns->geom.pgsz / 1000 / busdiv);
1664
1665 break;
1666
1667 case ACTION_SECERASE:
1668 /*
1669 * Erase sector.
1670 */
1671
1672 if (ns->lines.wp) {
1673 NS_ERR("do_state_action: device is write-protected, ignore sector erase\n");
1674 return -1;
1675 }
1676
1677 if (ns->regs.row >= ns->geom.pgnum - ns->geom.pgsec
1678 || (ns->regs.row & ~(ns->geom.secsz - 1))) {
1679 NS_ERR("do_state_action: wrong sector address (%#x)\n", ns->regs.row);
1680 return -1;
1681 }
1682
1683 ns->regs.row = (ns->regs.row <<
1684 8 * (ns->geom.pgaddrbytes - ns->geom.secaddrbytes)) | ns->regs.column;
1685 ns->regs.column = 0;
1686
1687 erase_block_no = ns->regs.row >> (ns->geom.secshift - ns->geom.pgshift);
1688
1689 NS_DBG("do_state_action: erase sector at address %#x, off = %d\n",
1690 ns->regs.row, NS_RAW_OFFSET(ns));
1691 NS_LOG("erase sector %u\n", erase_block_no);
1692
1693 erase_sector(ns);
1694
1695 NS_MDELAY(erase_delay);
1696
1697 if (erase_block_wear)
1698 update_wear(erase_block_no);
1699
1700 if (erase_error(erase_block_no)) {
1701 NS_WARN("simulating erase failure in erase block %u\n", erase_block_no);
1702 return -1;
1703 }
1704
1705 break;
1706
1707 case ACTION_PRGPAGE:
1708 /*
1709 * Program page - move internal buffer data to the page.
1710 */
1711
1712 if (ns->lines.wp) {
1713 NS_WARN("do_state_action: device is write-protected, programm\n");
1714 return -1;
1715 }
1716
1717 num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1718 if (num != ns->regs.count) {
1719 NS_ERR("do_state_action: too few bytes were input (%d instead of %d)\n",
1720 ns->regs.count, num);
1721 return -1;
1722 }
1723
1724 if (prog_page(ns, num) == -1)
1725 return -1;
1726
1727 page_no = ns->regs.row;
1728
1729 NS_DBG("do_state_action: copy %d bytes from int buf to (%#x, %#x), raw off = %d\n",
1730 num, ns->regs.row, ns->regs.column, NS_RAW_OFFSET(ns) + ns->regs.off);
1731 NS_LOG("programm page %d\n", ns->regs.row);
1732
1733 NS_UDELAY(programm_delay);
1734 NS_UDELAY(output_cycle * ns->geom.pgsz / 1000 / busdiv);
1735
1736 if (write_error(page_no)) {
1737 NS_WARN("simulating write failure in page %u\n", page_no);
1738 return -1;
1739 }
1740
1741 break;
1742
1743 case ACTION_ZEROOFF:
1744 NS_DBG("do_state_action: set internal offset to 0\n");
1745 ns->regs.off = 0;
1746 break;
1747
1748 case ACTION_HALFOFF:
1749 if (!(ns->options & OPT_PAGE512_8BIT)) {
1750 NS_ERR("do_state_action: BUG! can't skip half of page for non-512"
1751 "byte page size 8x chips\n");
1752 return -1;
1753 }
1754 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz/2);
1755 ns->regs.off = ns->geom.pgsz/2;
1756 break;
1757
1758 case ACTION_OOBOFF:
1759 NS_DBG("do_state_action: set internal offset to %d\n", ns->geom.pgsz);
1760 ns->regs.off = ns->geom.pgsz;
1761 break;
1762
1763 default:
1764 NS_DBG("do_state_action: BUG! unknown action\n");
1765 }
1766
1767 return 0;
1768 }
1769
1770 /*
1771 * Switch simulator's state.
1772 */
switch_state(struct nandsim * ns)1773 static void switch_state(struct nandsim *ns)
1774 {
1775 if (ns->op) {
1776 /*
1777 * The current operation have already been identified.
1778 * Just follow the states chain.
1779 */
1780
1781 ns->stateidx += 1;
1782 ns->state = ns->nxstate;
1783 ns->nxstate = ns->op[ns->stateidx + 1];
1784
1785 NS_DBG("switch_state: operation is known, switch to the next state, "
1786 "state: %s, nxstate: %s\n",
1787 get_state_name(ns->state), get_state_name(ns->nxstate));
1788
1789 /* See, whether we need to do some action */
1790 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1791 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1792 return;
1793 }
1794
1795 } else {
1796 /*
1797 * We don't yet know which operation we perform.
1798 * Try to identify it.
1799 */
1800
1801 /*
1802 * The only event causing the switch_state function to
1803 * be called with yet unknown operation is new command.
1804 */
1805 ns->state = get_state_by_command(ns->regs.command);
1806
1807 NS_DBG("switch_state: operation is unknown, try to find it\n");
1808
1809 if (find_operation(ns, 0) != 0)
1810 return;
1811
1812 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
1813 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
1814 return;
1815 }
1816 }
1817
1818 /* For 16x devices column means the page offset in words */
1819 if ((ns->nxstate & STATE_ADDR_MASK) && ns->busw == 16) {
1820 NS_DBG("switch_state: double the column number for 16x device\n");
1821 ns->regs.column <<= 1;
1822 }
1823
1824 if (NS_STATE(ns->nxstate) == STATE_READY) {
1825 /*
1826 * The current state is the last. Return to STATE_READY
1827 */
1828
1829 u_char status = NS_STATUS_OK(ns);
1830
1831 /* In case of data states, see if all bytes were input/output */
1832 if ((ns->state & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK))
1833 && ns->regs.count != ns->regs.num) {
1834 NS_WARN("switch_state: not all bytes were processed, %d left\n",
1835 ns->regs.num - ns->regs.count);
1836 status = NS_STATUS_FAILED(ns);
1837 }
1838
1839 NS_DBG("switch_state: operation complete, switch to STATE_READY state\n");
1840
1841 switch_to_ready_state(ns, status);
1842
1843 return;
1844 } else if (ns->nxstate & (STATE_DATAIN_MASK | STATE_DATAOUT_MASK)) {
1845 /*
1846 * If the next state is data input/output, switch to it now
1847 */
1848
1849 ns->state = ns->nxstate;
1850 ns->nxstate = ns->op[++ns->stateidx + 1];
1851 ns->regs.num = ns->regs.count = 0;
1852
1853 NS_DBG("switch_state: the next state is data I/O, switch, "
1854 "state: %s, nxstate: %s\n",
1855 get_state_name(ns->state), get_state_name(ns->nxstate));
1856
1857 /*
1858 * Set the internal register to the count of bytes which
1859 * are expected to be input or output
1860 */
1861 switch (NS_STATE(ns->state)) {
1862 case STATE_DATAIN:
1863 case STATE_DATAOUT:
1864 ns->regs.num = ns->geom.pgszoob - ns->regs.off - ns->regs.column;
1865 break;
1866
1867 case STATE_DATAOUT_ID:
1868 ns->regs.num = ns->geom.idbytes;
1869 break;
1870
1871 case STATE_DATAOUT_STATUS:
1872 case STATE_DATAOUT_STATUS_M:
1873 ns->regs.count = ns->regs.num = 0;
1874 break;
1875
1876 default:
1877 NS_ERR("switch_state: BUG! unknown data state\n");
1878 }
1879
1880 } else if (ns->nxstate & STATE_ADDR_MASK) {
1881 /*
1882 * If the next state is address input, set the internal
1883 * register to the number of expected address bytes
1884 */
1885
1886 ns->regs.count = 0;
1887
1888 switch (NS_STATE(ns->nxstate)) {
1889 case STATE_ADDR_PAGE:
1890 ns->regs.num = ns->geom.pgaddrbytes;
1891
1892 break;
1893 case STATE_ADDR_SEC:
1894 ns->regs.num = ns->geom.secaddrbytes;
1895 break;
1896
1897 case STATE_ADDR_ZERO:
1898 ns->regs.num = 1;
1899 break;
1900
1901 case STATE_ADDR_COLUMN:
1902 /* Column address is always 2 bytes */
1903 ns->regs.num = ns->geom.pgaddrbytes - ns->geom.secaddrbytes;
1904 break;
1905
1906 default:
1907 NS_ERR("switch_state: BUG! unknown address state\n");
1908 }
1909 } else {
1910 /*
1911 * Just reset internal counters.
1912 */
1913
1914 ns->regs.num = 0;
1915 ns->regs.count = 0;
1916 }
1917 }
1918
ns_nand_read_byte(struct mtd_info * mtd)1919 static u_char ns_nand_read_byte(struct mtd_info *mtd)
1920 {
1921 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1922 u_char outb = 0x00;
1923
1924 /* Sanity and correctness checks */
1925 if (!ns->lines.ce) {
1926 NS_ERR("read_byte: chip is disabled, return %#x\n", (uint)outb);
1927 return outb;
1928 }
1929 if (ns->lines.ale || ns->lines.cle) {
1930 NS_ERR("read_byte: ALE or CLE pin is high, return %#x\n", (uint)outb);
1931 return outb;
1932 }
1933 if (!(ns->state & STATE_DATAOUT_MASK)) {
1934 NS_WARN("read_byte: unexpected data output cycle, state is %s "
1935 "return %#x\n", get_state_name(ns->state), (uint)outb);
1936 return outb;
1937 }
1938
1939 /* Status register may be read as many times as it is wanted */
1940 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS) {
1941 NS_DBG("read_byte: return %#x status\n", ns->regs.status);
1942 return ns->regs.status;
1943 }
1944
1945 /* Check if there is any data in the internal buffer which may be read */
1946 if (ns->regs.count == ns->regs.num) {
1947 NS_WARN("read_byte: no more data to output, return %#x\n", (uint)outb);
1948 return outb;
1949 }
1950
1951 switch (NS_STATE(ns->state)) {
1952 case STATE_DATAOUT:
1953 if (ns->busw == 8) {
1954 outb = ns->buf.byte[ns->regs.count];
1955 ns->regs.count += 1;
1956 } else {
1957 outb = (u_char)cpu_to_le16(ns->buf.word[ns->regs.count >> 1]);
1958 ns->regs.count += 2;
1959 }
1960 break;
1961 case STATE_DATAOUT_ID:
1962 NS_DBG("read_byte: read ID byte %d, total = %d\n", ns->regs.count, ns->regs.num);
1963 outb = ns->ids[ns->regs.count];
1964 ns->regs.count += 1;
1965 break;
1966 default:
1967 BUG();
1968 }
1969
1970 if (ns->regs.count == ns->regs.num) {
1971 NS_DBG("read_byte: all bytes were read\n");
1972
1973 if (NS_STATE(ns->nxstate) == STATE_READY)
1974 switch_state(ns);
1975 }
1976
1977 return outb;
1978 }
1979
ns_nand_write_byte(struct mtd_info * mtd,u_char byte)1980 static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte)
1981 {
1982 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
1983
1984 /* Sanity and correctness checks */
1985 if (!ns->lines.ce) {
1986 NS_ERR("write_byte: chip is disabled, ignore write\n");
1987 return;
1988 }
1989 if (ns->lines.ale && ns->lines.cle) {
1990 NS_ERR("write_byte: ALE and CLE pins are high simultaneously, ignore write\n");
1991 return;
1992 }
1993
1994 if (ns->lines.cle == 1) {
1995 /*
1996 * The byte written is a command.
1997 */
1998
1999 if (byte == NAND_CMD_RESET) {
2000 NS_LOG("reset chip\n");
2001 switch_to_ready_state(ns, NS_STATUS_OK(ns));
2002 return;
2003 }
2004
2005 /* Check that the command byte is correct */
2006 if (check_command(byte)) {
2007 NS_ERR("write_byte: unknown command %#x\n", (uint)byte);
2008 return;
2009 }
2010
2011 if (NS_STATE(ns->state) == STATE_DATAOUT_STATUS
2012 || NS_STATE(ns->state) == STATE_DATAOUT_STATUS_M
2013 || NS_STATE(ns->state) == STATE_DATAOUT) {
2014 int row = ns->regs.row;
2015
2016 switch_state(ns);
2017 if (byte == NAND_CMD_RNDOUT)
2018 ns->regs.row = row;
2019 }
2020
2021 /* Check if chip is expecting command */
2022 if (NS_STATE(ns->nxstate) != STATE_UNKNOWN && !(ns->nxstate & STATE_CMD_MASK)) {
2023 /* Do not warn if only 2 id bytes are read */
2024 if (!(ns->regs.command == NAND_CMD_READID &&
2025 NS_STATE(ns->state) == STATE_DATAOUT_ID && ns->regs.count == 2)) {
2026 /*
2027 * We are in situation when something else (not command)
2028 * was expected but command was input. In this case ignore
2029 * previous command(s)/state(s) and accept the last one.
2030 */
2031 NS_WARN("write_byte: command (%#x) wasn't expected, expected state is %s, "
2032 "ignore previous states\n", (uint)byte, get_state_name(ns->nxstate));
2033 }
2034 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2035 }
2036
2037 NS_DBG("command byte corresponding to %s state accepted\n",
2038 get_state_name(get_state_by_command(byte)));
2039 ns->regs.command = byte;
2040 switch_state(ns);
2041
2042 } else if (ns->lines.ale == 1) {
2043 /*
2044 * The byte written is an address.
2045 */
2046
2047 if (NS_STATE(ns->nxstate) == STATE_UNKNOWN) {
2048
2049 NS_DBG("write_byte: operation isn't known yet, identify it\n");
2050
2051 if (find_operation(ns, 1) < 0)
2052 return;
2053
2054 if ((ns->state & ACTION_MASK) && do_state_action(ns, ns->state) < 0) {
2055 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2056 return;
2057 }
2058
2059 ns->regs.count = 0;
2060 switch (NS_STATE(ns->nxstate)) {
2061 case STATE_ADDR_PAGE:
2062 ns->regs.num = ns->geom.pgaddrbytes;
2063 break;
2064 case STATE_ADDR_SEC:
2065 ns->regs.num = ns->geom.secaddrbytes;
2066 break;
2067 case STATE_ADDR_ZERO:
2068 ns->regs.num = 1;
2069 break;
2070 default:
2071 BUG();
2072 }
2073 }
2074
2075 /* Check that chip is expecting address */
2076 if (!(ns->nxstate & STATE_ADDR_MASK)) {
2077 NS_ERR("write_byte: address (%#x) isn't expected, expected state is %s, "
2078 "switch to STATE_READY\n", (uint)byte, get_state_name(ns->nxstate));
2079 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2080 return;
2081 }
2082
2083 /* Check if this is expected byte */
2084 if (ns->regs.count == ns->regs.num) {
2085 NS_ERR("write_byte: no more address bytes expected\n");
2086 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2087 return;
2088 }
2089
2090 accept_addr_byte(ns, byte);
2091
2092 ns->regs.count += 1;
2093
2094 NS_DBG("write_byte: address byte %#x was accepted (%d bytes input, %d expected)\n",
2095 (uint)byte, ns->regs.count, ns->regs.num);
2096
2097 if (ns->regs.count == ns->regs.num) {
2098 NS_DBG("address (%#x, %#x) is accepted\n", ns->regs.row, ns->regs.column);
2099 switch_state(ns);
2100 }
2101
2102 } else {
2103 /*
2104 * The byte written is an input data.
2105 */
2106
2107 /* Check that chip is expecting data input */
2108 if (!(ns->state & STATE_DATAIN_MASK)) {
2109 NS_ERR("write_byte: data input (%#x) isn't expected, state is %s, "
2110 "switch to %s\n", (uint)byte,
2111 get_state_name(ns->state), get_state_name(STATE_READY));
2112 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2113 return;
2114 }
2115
2116 /* Check if this is expected byte */
2117 if (ns->regs.count == ns->regs.num) {
2118 NS_WARN("write_byte: %u input bytes has already been accepted, ignore write\n",
2119 ns->regs.num);
2120 return;
2121 }
2122
2123 if (ns->busw == 8) {
2124 ns->buf.byte[ns->regs.count] = byte;
2125 ns->regs.count += 1;
2126 } else {
2127 ns->buf.word[ns->regs.count >> 1] = cpu_to_le16((uint16_t)byte);
2128 ns->regs.count += 2;
2129 }
2130 }
2131
2132 return;
2133 }
2134
ns_hwcontrol(struct mtd_info * mtd,int cmd,unsigned int bitmask)2135 static void ns_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int bitmask)
2136 {
2137 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2138
2139 ns->lines.cle = bitmask & NAND_CLE ? 1 : 0;
2140 ns->lines.ale = bitmask & NAND_ALE ? 1 : 0;
2141 ns->lines.ce = bitmask & NAND_NCE ? 1 : 0;
2142
2143 if (cmd != NAND_CMD_NONE)
2144 ns_nand_write_byte(mtd, cmd);
2145 }
2146
ns_device_ready(struct mtd_info * mtd)2147 static int ns_device_ready(struct mtd_info *mtd)
2148 {
2149 NS_DBG("device_ready\n");
2150 return 1;
2151 }
2152
ns_nand_read_word(struct mtd_info * mtd)2153 static uint16_t ns_nand_read_word(struct mtd_info *mtd)
2154 {
2155 struct nand_chip *chip = (struct nand_chip *)mtd->priv;
2156
2157 NS_DBG("read_word\n");
2158
2159 return chip->read_byte(mtd) | (chip->read_byte(mtd) << 8);
2160 }
2161
ns_nand_write_buf(struct mtd_info * mtd,const u_char * buf,int len)2162 static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
2163 {
2164 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2165
2166 /* Check that chip is expecting data input */
2167 if (!(ns->state & STATE_DATAIN_MASK)) {
2168 NS_ERR("write_buf: data input isn't expected, state is %s, "
2169 "switch to STATE_READY\n", get_state_name(ns->state));
2170 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2171 return;
2172 }
2173
2174 /* Check if these are expected bytes */
2175 if (ns->regs.count + len > ns->regs.num) {
2176 NS_ERR("write_buf: too many input bytes\n");
2177 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2178 return;
2179 }
2180
2181 memcpy(ns->buf.byte + ns->regs.count, buf, len);
2182 ns->regs.count += len;
2183
2184 if (ns->regs.count == ns->regs.num) {
2185 NS_DBG("write_buf: %d bytes were written\n", ns->regs.count);
2186 }
2187 }
2188
ns_nand_read_buf(struct mtd_info * mtd,u_char * buf,int len)2189 static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
2190 {
2191 struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv;
2192
2193 /* Sanity and correctness checks */
2194 if (!ns->lines.ce) {
2195 NS_ERR("read_buf: chip is disabled\n");
2196 return;
2197 }
2198 if (ns->lines.ale || ns->lines.cle) {
2199 NS_ERR("read_buf: ALE or CLE pin is high\n");
2200 return;
2201 }
2202 if (!(ns->state & STATE_DATAOUT_MASK)) {
2203 NS_WARN("read_buf: unexpected data output cycle, current state is %s\n",
2204 get_state_name(ns->state));
2205 return;
2206 }
2207
2208 if (NS_STATE(ns->state) != STATE_DATAOUT) {
2209 int i;
2210
2211 for (i = 0; i < len; i++)
2212 buf[i] = ((struct nand_chip *)mtd->priv)->read_byte(mtd);
2213
2214 return;
2215 }
2216
2217 /* Check if these are expected bytes */
2218 if (ns->regs.count + len > ns->regs.num) {
2219 NS_ERR("read_buf: too many bytes to read\n");
2220 switch_to_ready_state(ns, NS_STATUS_FAILED(ns));
2221 return;
2222 }
2223
2224 memcpy(buf, ns->buf.byte + ns->regs.count, len);
2225 ns->regs.count += len;
2226
2227 if (ns->regs.count == ns->regs.num) {
2228 if (NS_STATE(ns->nxstate) == STATE_READY)
2229 switch_state(ns);
2230 }
2231
2232 return;
2233 }
2234
2235 /*
2236 * Module initialization function
2237 */
ns_init_module(void)2238 static int __init ns_init_module(void)
2239 {
2240 struct nand_chip *chip;
2241 struct nandsim *nand;
2242 int retval = -ENOMEM, i;
2243
2244 if (bus_width != 8 && bus_width != 16) {
2245 NS_ERR("wrong bus width (%d), use only 8 or 16\n", bus_width);
2246 return -EINVAL;
2247 }
2248
2249 /* Allocate and initialize mtd_info, nand_chip and nandsim structures */
2250 nsmtd = kzalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip)
2251 + sizeof(struct nandsim), GFP_KERNEL);
2252 if (!nsmtd) {
2253 NS_ERR("unable to allocate core structures.\n");
2254 return -ENOMEM;
2255 }
2256 chip = (struct nand_chip *)(nsmtd + 1);
2257 nsmtd->priv = (void *)chip;
2258 nand = (struct nandsim *)(chip + 1);
2259 chip->priv = (void *)nand;
2260
2261 /*
2262 * Register simulator's callbacks.
2263 */
2264 chip->cmd_ctrl = ns_hwcontrol;
2265 chip->read_byte = ns_nand_read_byte;
2266 chip->dev_ready = ns_device_ready;
2267 chip->write_buf = ns_nand_write_buf;
2268 chip->read_buf = ns_nand_read_buf;
2269 chip->read_word = ns_nand_read_word;
2270 chip->ecc.mode = NAND_ECC_SOFT;
2271 /* The NAND_SKIP_BBTSCAN option is necessary for 'overridesize' */
2272 /* and 'badblocks' parameters to work */
2273 chip->options |= NAND_SKIP_BBTSCAN;
2274
2275 switch (bbt) {
2276 case 2:
2277 chip->bbt_options |= NAND_BBT_NO_OOB;
2278 case 1:
2279 chip->bbt_options |= NAND_BBT_USE_FLASH;
2280 case 0:
2281 break;
2282 default:
2283 NS_ERR("bbt has to be 0..2\n");
2284 retval = -EINVAL;
2285 goto error;
2286 }
2287 /*
2288 * Perform minimum nandsim structure initialization to handle
2289 * the initial ID read command correctly
2290 */
2291 if (third_id_byte != 0xFF || fourth_id_byte != 0xFF)
2292 nand->geom.idbytes = 4;
2293 else
2294 nand->geom.idbytes = 2;
2295 nand->regs.status = NS_STATUS_OK(nand);
2296 nand->nxstate = STATE_UNKNOWN;
2297 nand->options |= OPT_PAGE512; /* temporary value */
2298 nand->ids[0] = first_id_byte;
2299 nand->ids[1] = second_id_byte;
2300 nand->ids[2] = third_id_byte;
2301 nand->ids[3] = fourth_id_byte;
2302 if (bus_width == 16) {
2303 nand->busw = 16;
2304 chip->options |= NAND_BUSWIDTH_16;
2305 }
2306
2307 nsmtd->owner = THIS_MODULE;
2308
2309 if ((retval = parse_weakblocks()) != 0)
2310 goto error;
2311
2312 if ((retval = parse_weakpages()) != 0)
2313 goto error;
2314
2315 if ((retval = parse_gravepages()) != 0)
2316 goto error;
2317
2318 retval = nand_scan_ident(nsmtd, 1, NULL);
2319 if (retval) {
2320 NS_ERR("cannot scan NAND Simulator device\n");
2321 if (retval > 0)
2322 retval = -ENXIO;
2323 goto error;
2324 }
2325
2326 if (bch) {
2327 unsigned int eccsteps, eccbytes;
2328 if (!mtd_nand_has_bch()) {
2329 NS_ERR("BCH ECC support is disabled\n");
2330 retval = -EINVAL;
2331 goto error;
2332 }
2333 /* use 512-byte ecc blocks */
2334 eccsteps = nsmtd->writesize/512;
2335 eccbytes = (bch*13+7)/8;
2336 /* do not bother supporting small page devices */
2337 if ((nsmtd->oobsize < 64) || !eccsteps) {
2338 NS_ERR("bch not available on small page devices\n");
2339 retval = -EINVAL;
2340 goto error;
2341 }
2342 if ((eccbytes*eccsteps+2) > nsmtd->oobsize) {
2343 NS_ERR("invalid bch value %u\n", bch);
2344 retval = -EINVAL;
2345 goto error;
2346 }
2347 chip->ecc.mode = NAND_ECC_SOFT_BCH;
2348 chip->ecc.size = 512;
2349 chip->ecc.bytes = eccbytes;
2350 NS_INFO("using %u-bit/%u bytes BCH ECC\n", bch, chip->ecc.size);
2351 }
2352
2353 retval = nand_scan_tail(nsmtd);
2354 if (retval) {
2355 NS_ERR("can't register NAND Simulator\n");
2356 if (retval > 0)
2357 retval = -ENXIO;
2358 goto error;
2359 }
2360
2361 if (overridesize) {
2362 uint64_t new_size = (uint64_t)nsmtd->erasesize << overridesize;
2363 if (new_size >> overridesize != nsmtd->erasesize) {
2364 NS_ERR("overridesize is too big\n");
2365 retval = -EINVAL;
2366 goto err_exit;
2367 }
2368 /* N.B. This relies on nand_scan not doing anything with the size before we change it */
2369 nsmtd->size = new_size;
2370 chip->chipsize = new_size;
2371 chip->chip_shift = ffs(nsmtd->erasesize) + overridesize - 1;
2372 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
2373 }
2374
2375 if ((retval = setup_wear_reporting(nsmtd)) != 0)
2376 goto err_exit;
2377
2378 if ((retval = nandsim_debugfs_create(nand)) != 0)
2379 goto err_exit;
2380
2381 if ((retval = init_nandsim(nsmtd)) != 0)
2382 goto err_exit;
2383
2384 if ((retval = nand_default_bbt(nsmtd)) != 0)
2385 goto err_exit;
2386
2387 if ((retval = parse_badblocks(nand, nsmtd)) != 0)
2388 goto err_exit;
2389
2390 /* Register NAND partitions */
2391 retval = mtd_device_register(nsmtd, &nand->partitions[0],
2392 nand->nbparts);
2393 if (retval != 0)
2394 goto err_exit;
2395
2396 return 0;
2397
2398 err_exit:
2399 free_nandsim(nand);
2400 nand_release(nsmtd);
2401 for (i = 0;i < ARRAY_SIZE(nand->partitions); ++i)
2402 kfree(nand->partitions[i].name);
2403 error:
2404 kfree(nsmtd);
2405 free_lists();
2406
2407 return retval;
2408 }
2409
2410 module_init(ns_init_module);
2411
2412 /*
2413 * Module clean-up function
2414 */
ns_cleanup_module(void)2415 static void __exit ns_cleanup_module(void)
2416 {
2417 struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv;
2418 int i;
2419
2420 nandsim_debugfs_remove(ns);
2421 free_nandsim(ns); /* Free nandsim private resources */
2422 nand_release(nsmtd); /* Unregister driver */
2423 for (i = 0;i < ARRAY_SIZE(ns->partitions); ++i)
2424 kfree(ns->partitions[i].name);
2425 kfree(nsmtd); /* Free other structures */
2426 free_lists();
2427 }
2428
2429 module_exit(ns_cleanup_module);
2430
2431 MODULE_LICENSE ("GPL");
2432 MODULE_AUTHOR ("Artem B. Bityuckiy");
2433 MODULE_DESCRIPTION ("The NAND flash simulator");
2434