1 /*
2 * xircom_cb: A driver for the (tulip-like) Xircom Cardbus ethernet cards
3 *
4 * This software is (C) by the respective authors, and licensed under the GPL
5 * License.
6 *
7 * Written by Arjan van de Ven for Red Hat, Inc.
8 * Based on work by Jeff Garzik, Doug Ledford and Donald Becker
9 *
10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference.
12 *
13 *
14 * $Id: xircom_cb.c,v 1.33 2001/03/19 14:02:07 arjanv Exp $
15 */
16
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/string.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/slab.h>
25 #include <linux/interrupt.h>
26 #include <linux/pci.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/skbuff.h>
30 #include <linux/delay.h>
31 #include <linux/init.h>
32 #include <linux/bitops.h>
33
34 #include <asm/uaccess.h>
35 #include <asm/io.h>
36 #ifdef CONFIG_NET_POLL_CONTROLLER
37 #include <asm/irq.h>
38 #endif
39
40 MODULE_DESCRIPTION("Xircom Cardbus ethernet driver");
41 MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>");
42 MODULE_LICENSE("GPL");
43
44 #define xw32(reg, val) iowrite32(val, ioaddr + (reg))
45 #define xr32(reg) ioread32(ioaddr + (reg))
46 #define xr8(reg) ioread8(ioaddr + (reg))
47
48 /* IO registers on the card, offsets */
49 #define CSR0 0x00
50 #define CSR1 0x08
51 #define CSR2 0x10
52 #define CSR3 0x18
53 #define CSR4 0x20
54 #define CSR5 0x28
55 #define CSR6 0x30
56 #define CSR7 0x38
57 #define CSR8 0x40
58 #define CSR9 0x48
59 #define CSR10 0x50
60 #define CSR11 0x58
61 #define CSR12 0x60
62 #define CSR13 0x68
63 #define CSR14 0x70
64 #define CSR15 0x78
65 #define CSR16 0x80
66
67 /* PCI registers */
68 #define PCI_POWERMGMT 0x40
69
70 /* Offsets of the buffers within the descriptor pages, in bytes */
71
72 #define NUMDESCRIPTORS 4
73
74 static int bufferoffsets[NUMDESCRIPTORS] = {128,2048,4096,6144};
75
76
77 struct xircom_private {
78 /* Send and receive buffers, kernel-addressable and dma addressable forms */
79
80 __le32 *rx_buffer;
81 __le32 *tx_buffer;
82
83 dma_addr_t rx_dma_handle;
84 dma_addr_t tx_dma_handle;
85
86 struct sk_buff *tx_skb[4];
87
88 void __iomem *ioaddr;
89 int open;
90
91 /* transmit_used is the rotating counter that indicates which transmit
92 descriptor has to be used next */
93 int transmit_used;
94
95 /* Spinlock to serialize register operations.
96 It must be helt while manipulating the following registers:
97 CSR0, CSR6, CSR7, CSR9, CSR10, CSR15
98 */
99 spinlock_t lock;
100
101 struct pci_dev *pdev;
102 struct net_device *dev;
103 };
104
105
106 /* Function prototypes */
107 static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id);
108 static void xircom_remove(struct pci_dev *pdev);
109 static irqreturn_t xircom_interrupt(int irq, void *dev_instance);
110 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
111 struct net_device *dev);
112 static int xircom_open(struct net_device *dev);
113 static int xircom_close(struct net_device *dev);
114 static void xircom_up(struct xircom_private *card);
115 #ifdef CONFIG_NET_POLL_CONTROLLER
116 static void xircom_poll_controller(struct net_device *dev);
117 #endif
118
119 static void investigate_read_descriptor(struct net_device *dev,struct xircom_private *card, int descnr, unsigned int bufferoffset);
120 static void investigate_write_descriptor(struct net_device *dev, struct xircom_private *card, int descnr, unsigned int bufferoffset);
121 static void read_mac_address(struct xircom_private *card);
122 static void transceiver_voodoo(struct xircom_private *card);
123 static void initialize_card(struct xircom_private *card);
124 static void trigger_transmit(struct xircom_private *card);
125 static void trigger_receive(struct xircom_private *card);
126 static void setup_descriptors(struct xircom_private *card);
127 static void remove_descriptors(struct xircom_private *card);
128 static int link_status_changed(struct xircom_private *card);
129 static void activate_receiver(struct xircom_private *card);
130 static void deactivate_receiver(struct xircom_private *card);
131 static void activate_transmitter(struct xircom_private *card);
132 static void deactivate_transmitter(struct xircom_private *card);
133 static void enable_transmit_interrupt(struct xircom_private *card);
134 static void enable_receive_interrupt(struct xircom_private *card);
135 static void enable_link_interrupt(struct xircom_private *card);
136 static void disable_all_interrupts(struct xircom_private *card);
137 static int link_status(struct xircom_private *card);
138
139
140
141 static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = {
142 { PCI_VDEVICE(XIRCOM, 0x0003), },
143 {0,},
144 };
145 MODULE_DEVICE_TABLE(pci, xircom_pci_table);
146
147 static struct pci_driver xircom_ops = {
148 .name = "xircom_cb",
149 .id_table = xircom_pci_table,
150 .probe = xircom_probe,
151 .remove = xircom_remove,
152 };
153
154
155 #if defined DEBUG && DEBUG > 1
print_binary(unsigned int number)156 static void print_binary(unsigned int number)
157 {
158 int i,i2;
159 char buffer[64];
160 memset(buffer,0,64);
161 i2=0;
162 for (i=31;i>=0;i--) {
163 if (number & (1<<i))
164 buffer[i2++]='1';
165 else
166 buffer[i2++]='0';
167 if ((i&3)==0)
168 buffer[i2++]=' ';
169 }
170 pr_debug("%s\n",buffer);
171 }
172 #endif
173
174 static const struct net_device_ops netdev_ops = {
175 .ndo_open = xircom_open,
176 .ndo_stop = xircom_close,
177 .ndo_start_xmit = xircom_start_xmit,
178 .ndo_change_mtu = eth_change_mtu,
179 .ndo_set_mac_address = eth_mac_addr,
180 .ndo_validate_addr = eth_validate_addr,
181 #ifdef CONFIG_NET_POLL_CONTROLLER
182 .ndo_poll_controller = xircom_poll_controller,
183 #endif
184 };
185
186 /* xircom_probe is the code that gets called on device insertion.
187 it sets up the hardware and registers the device to the networklayer.
188
189 TODO: Send 1 or 2 "dummy" packets here as the card seems to discard the
190 first two packets that get send, and pump hates that.
191
192 */
xircom_probe(struct pci_dev * pdev,const struct pci_device_id * id)193 static int xircom_probe(struct pci_dev *pdev, const struct pci_device_id *id)
194 {
195 struct device *d = &pdev->dev;
196 struct net_device *dev = NULL;
197 struct xircom_private *private;
198 unsigned long flags;
199 unsigned short tmp16;
200 int rc;
201
202 /* First do the PCI initialisation */
203
204 rc = pci_enable_device(pdev);
205 if (rc < 0)
206 goto out;
207
208 /* disable all powermanagement */
209 pci_write_config_dword(pdev, PCI_POWERMGMT, 0x0000);
210
211 pci_set_master(pdev); /* Why isn't this done by pci_enable_device ?*/
212
213 /* clear PCI status, if any */
214 pci_read_config_word (pdev,PCI_STATUS, &tmp16);
215 pci_write_config_word (pdev, PCI_STATUS,tmp16);
216
217 rc = pci_request_regions(pdev, "xircom_cb");
218 if (rc < 0) {
219 pr_err("%s: failed to allocate io-region\n", __func__);
220 goto err_disable;
221 }
222
223 rc = -ENOMEM;
224 /*
225 Before changing the hardware, allocate the memory.
226 This way, we can fail gracefully if not enough memory
227 is available.
228 */
229 dev = alloc_etherdev(sizeof(struct xircom_private));
230 if (!dev)
231 goto err_release;
232
233 private = netdev_priv(dev);
234
235 /* Allocate the send/receive buffers */
236 private->rx_buffer = dma_alloc_coherent(d, 8192,
237 &private->rx_dma_handle,
238 GFP_KERNEL);
239 if (private->rx_buffer == NULL)
240 goto rx_buf_fail;
241
242 private->tx_buffer = dma_alloc_coherent(d, 8192,
243 &private->tx_dma_handle,
244 GFP_KERNEL);
245 if (private->tx_buffer == NULL)
246 goto tx_buf_fail;
247
248 SET_NETDEV_DEV(dev, &pdev->dev);
249
250
251 private->dev = dev;
252 private->pdev = pdev;
253
254 /* IO range. */
255 private->ioaddr = pci_iomap(pdev, 0, 0);
256 if (!private->ioaddr)
257 goto reg_fail;
258
259 spin_lock_init(&private->lock);
260
261 initialize_card(private);
262 read_mac_address(private);
263 setup_descriptors(private);
264
265 dev->netdev_ops = &netdev_ops;
266 pci_set_drvdata(pdev, dev);
267
268 rc = register_netdev(dev);
269 if (rc < 0) {
270 pr_err("%s: netdevice registration failed\n", __func__);
271 goto err_unmap;
272 }
273
274 netdev_info(dev, "Xircom cardbus revision %i at irq %i\n",
275 pdev->revision, pdev->irq);
276 /* start the transmitter to get a heartbeat */
277 /* TODO: send 2 dummy packets here */
278 transceiver_voodoo(private);
279
280 spin_lock_irqsave(&private->lock,flags);
281 activate_transmitter(private);
282 activate_receiver(private);
283 spin_unlock_irqrestore(&private->lock,flags);
284
285 trigger_receive(private);
286 out:
287 return rc;
288
289 err_unmap:
290 pci_iounmap(pdev, private->ioaddr);
291 reg_fail:
292 pci_set_drvdata(pdev, NULL);
293 dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle);
294 tx_buf_fail:
295 dma_free_coherent(d, 8192, private->rx_buffer, private->rx_dma_handle);
296 rx_buf_fail:
297 free_netdev(dev);
298 err_release:
299 pci_release_regions(pdev);
300 err_disable:
301 pci_disable_device(pdev);
302 goto out;
303 }
304
305
306 /*
307 xircom_remove is called on module-unload or on device-eject.
308 it unregisters the irq, io-region and network device.
309 Interrupts and such are already stopped in the "ifconfig ethX down"
310 code.
311 */
xircom_remove(struct pci_dev * pdev)312 static void xircom_remove(struct pci_dev *pdev)
313 {
314 struct net_device *dev = pci_get_drvdata(pdev);
315 struct xircom_private *card = netdev_priv(dev);
316 struct device *d = &pdev->dev;
317
318 unregister_netdev(dev);
319 pci_iounmap(pdev, card->ioaddr);
320 pci_set_drvdata(pdev, NULL);
321 dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle);
322 dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle);
323 free_netdev(dev);
324 pci_release_regions(pdev);
325 pci_disable_device(pdev);
326 }
327
xircom_interrupt(int irq,void * dev_instance)328 static irqreturn_t xircom_interrupt(int irq, void *dev_instance)
329 {
330 struct net_device *dev = (struct net_device *) dev_instance;
331 struct xircom_private *card = netdev_priv(dev);
332 void __iomem *ioaddr = card->ioaddr;
333 unsigned int status;
334 int i;
335
336 spin_lock(&card->lock);
337 status = xr32(CSR5);
338
339 #if defined DEBUG && DEBUG > 1
340 print_binary(status);
341 pr_debug("tx status 0x%08x 0x%08x\n",
342 card->tx_buffer[0], card->tx_buffer[4]);
343 pr_debug("rx status 0x%08x 0x%08x\n",
344 card->rx_buffer[0], card->rx_buffer[4]);
345 #endif
346 /* Handle shared irq and hotplug */
347 if (status == 0 || status == 0xffffffff) {
348 spin_unlock(&card->lock);
349 return IRQ_NONE;
350 }
351
352 if (link_status_changed(card)) {
353 int newlink;
354 netdev_dbg(dev, "Link status has changed\n");
355 newlink = link_status(card);
356 netdev_info(dev, "Link is %d mbit\n", newlink);
357 if (newlink)
358 netif_carrier_on(dev);
359 else
360 netif_carrier_off(dev);
361
362 }
363
364 /* Clear all remaining interrupts */
365 status |= 0xffffffff; /* FIXME: make this clear only the
366 real existing bits */
367 xw32(CSR5, status);
368
369
370 for (i=0;i<NUMDESCRIPTORS;i++)
371 investigate_write_descriptor(dev,card,i,bufferoffsets[i]);
372 for (i=0;i<NUMDESCRIPTORS;i++)
373 investigate_read_descriptor(dev,card,i,bufferoffsets[i]);
374
375 spin_unlock(&card->lock);
376 return IRQ_HANDLED;
377 }
378
xircom_start_xmit(struct sk_buff * skb,struct net_device * dev)379 static netdev_tx_t xircom_start_xmit(struct sk_buff *skb,
380 struct net_device *dev)
381 {
382 struct xircom_private *card;
383 unsigned long flags;
384 int nextdescriptor;
385 int desc;
386
387 card = netdev_priv(dev);
388 spin_lock_irqsave(&card->lock,flags);
389
390 /* First see if we can free some descriptors */
391 for (desc=0;desc<NUMDESCRIPTORS;desc++)
392 investigate_write_descriptor(dev,card,desc,bufferoffsets[desc]);
393
394
395 nextdescriptor = (card->transmit_used +1) % (NUMDESCRIPTORS);
396 desc = card->transmit_used;
397
398 /* only send the packet if the descriptor is free */
399 if (card->tx_buffer[4*desc]==0) {
400 /* Copy the packet data; zero the memory first as the card
401 sometimes sends more than you ask it to. */
402
403 memset(&card->tx_buffer[bufferoffsets[desc]/4],0,1536);
404 skb_copy_from_linear_data(skb,
405 &(card->tx_buffer[bufferoffsets[desc] / 4]),
406 skb->len);
407 /* FIXME: The specification tells us that the length we send HAS to be a multiple of
408 4 bytes. */
409
410 card->tx_buffer[4*desc+1] = cpu_to_le32(skb->len);
411 if (desc == NUMDESCRIPTORS - 1) /* bit 25: last descriptor of the ring */
412 card->tx_buffer[4*desc+1] |= cpu_to_le32(1<<25);
413
414 card->tx_buffer[4*desc+1] |= cpu_to_le32(0xF0000000);
415 /* 0xF0... means want interrupts*/
416 card->tx_skb[desc] = skb;
417
418 wmb();
419 /* This gives the descriptor to the card */
420 card->tx_buffer[4*desc] = cpu_to_le32(0x80000000);
421 trigger_transmit(card);
422 if (card->tx_buffer[nextdescriptor*4] & cpu_to_le32(0x8000000)) {
423 /* next descriptor is occupied... */
424 netif_stop_queue(dev);
425 }
426 card->transmit_used = nextdescriptor;
427 spin_unlock_irqrestore(&card->lock,flags);
428 return NETDEV_TX_OK;
429 }
430
431 /* Uh oh... no free descriptor... drop the packet */
432 netif_stop_queue(dev);
433 spin_unlock_irqrestore(&card->lock,flags);
434 trigger_transmit(card);
435
436 return NETDEV_TX_BUSY;
437 }
438
439
440
441
xircom_open(struct net_device * dev)442 static int xircom_open(struct net_device *dev)
443 {
444 struct xircom_private *xp = netdev_priv(dev);
445 const int irq = xp->pdev->irq;
446 int retval;
447
448 netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq);
449 retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev);
450 if (retval)
451 return retval;
452
453 xircom_up(xp);
454 xp->open = 1;
455
456 return 0;
457 }
458
xircom_close(struct net_device * dev)459 static int xircom_close(struct net_device *dev)
460 {
461 struct xircom_private *card;
462 unsigned long flags;
463
464 card = netdev_priv(dev);
465 netif_stop_queue(dev); /* we don't want new packets */
466
467
468 spin_lock_irqsave(&card->lock,flags);
469
470 disable_all_interrupts(card);
471 #if 0
472 /* We can enable this again once we send dummy packets on ifconfig ethX up */
473 deactivate_receiver(card);
474 deactivate_transmitter(card);
475 #endif
476 remove_descriptors(card);
477
478 spin_unlock_irqrestore(&card->lock,flags);
479
480 card->open = 0;
481 free_irq(card->pdev->irq, dev);
482
483 return 0;
484
485 }
486
487
488 #ifdef CONFIG_NET_POLL_CONTROLLER
xircom_poll_controller(struct net_device * dev)489 static void xircom_poll_controller(struct net_device *dev)
490 {
491 struct xircom_private *xp = netdev_priv(dev);
492 const int irq = xp->pdev->irq;
493
494 disable_irq(irq);
495 xircom_interrupt(irq, dev);
496 enable_irq(irq);
497 }
498 #endif
499
500
initialize_card(struct xircom_private * card)501 static void initialize_card(struct xircom_private *card)
502 {
503 void __iomem *ioaddr = card->ioaddr;
504 unsigned long flags;
505 u32 val;
506
507 spin_lock_irqsave(&card->lock, flags);
508
509 /* First: reset the card */
510 val = xr32(CSR0);
511 val |= 0x01; /* Software reset */
512 xw32(CSR0, val);
513
514 udelay(100); /* give the card some time to reset */
515
516 val = xr32(CSR0);
517 val &= ~0x01; /* disable Software reset */
518 xw32(CSR0, val);
519
520
521 val = 0; /* Value 0x00 is a safe and conservative value
522 for the PCI configuration settings */
523 xw32(CSR0, val);
524
525
526 disable_all_interrupts(card);
527 deactivate_receiver(card);
528 deactivate_transmitter(card);
529
530 spin_unlock_irqrestore(&card->lock, flags);
531 }
532
533 /*
534 trigger_transmit causes the card to check for frames to be transmitted.
535 This is accomplished by writing to the CSR1 port. The documentation
536 claims that the act of writing is sufficient and that the value is
537 ignored; I chose zero.
538 */
trigger_transmit(struct xircom_private * card)539 static void trigger_transmit(struct xircom_private *card)
540 {
541 void __iomem *ioaddr = card->ioaddr;
542
543 xw32(CSR1, 0);
544 }
545
546 /*
547 trigger_receive causes the card to check for empty frames in the
548 descriptor list in which packets can be received.
549 This is accomplished by writing to the CSR2 port. The documentation
550 claims that the act of writing is sufficient and that the value is
551 ignored; I chose zero.
552 */
trigger_receive(struct xircom_private * card)553 static void trigger_receive(struct xircom_private *card)
554 {
555 void __iomem *ioaddr = card->ioaddr;
556
557 xw32(CSR2, 0);
558 }
559
560 /*
561 setup_descriptors initializes the send and receive buffers to be valid
562 descriptors and programs the addresses into the card.
563 */
setup_descriptors(struct xircom_private * card)564 static void setup_descriptors(struct xircom_private *card)
565 {
566 void __iomem *ioaddr = card->ioaddr;
567 u32 address;
568 int i;
569
570 BUG_ON(card->rx_buffer == NULL);
571 BUG_ON(card->tx_buffer == NULL);
572
573 /* Receive descriptors */
574 memset(card->rx_buffer, 0, 128); /* clear the descriptors */
575 for (i=0;i<NUMDESCRIPTORS;i++ ) {
576
577 /* Rx Descr0: It's empty, let the card own it, no errors -> 0x80000000 */
578 card->rx_buffer[i*4 + 0] = cpu_to_le32(0x80000000);
579 /* Rx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
580 card->rx_buffer[i*4 + 1] = cpu_to_le32(1536);
581 if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
582 card->rx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
583
584 /* Rx Descr2: address of the buffer
585 we store the buffer at the 2nd half of the page */
586
587 address = card->rx_dma_handle;
588 card->rx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
589 /* Rx Desc3: address of 2nd buffer -> 0 */
590 card->rx_buffer[i*4 + 3] = 0;
591 }
592
593 wmb();
594 /* Write the receive descriptor ring address to the card */
595 address = card->rx_dma_handle;
596 xw32(CSR3, address); /* Receive descr list address */
597
598
599 /* transmit descriptors */
600 memset(card->tx_buffer, 0, 128); /* clear the descriptors */
601
602 for (i=0;i<NUMDESCRIPTORS;i++ ) {
603 /* Tx Descr0: Empty, we own it, no errors -> 0x00000000 */
604 card->tx_buffer[i*4 + 0] = 0x00000000;
605 /* Tx Descr1: buffer 1 is 1536 bytes, buffer 2 is 0 bytes */
606 card->tx_buffer[i*4 + 1] = cpu_to_le32(1536);
607 if (i == NUMDESCRIPTORS - 1) /* bit 25 is "last descriptor" */
608 card->tx_buffer[i*4 + 1] |= cpu_to_le32(1 << 25);
609
610 /* Tx Descr2: address of the buffer
611 we store the buffer at the 2nd half of the page */
612 address = card->tx_dma_handle;
613 card->tx_buffer[i*4 + 2] = cpu_to_le32(address + bufferoffsets[i]);
614 /* Tx Desc3: address of 2nd buffer -> 0 */
615 card->tx_buffer[i*4 + 3] = 0;
616 }
617
618 wmb();
619 /* wite the transmit descriptor ring to the card */
620 address = card->tx_dma_handle;
621 xw32(CSR4, address); /* xmit descr list address */
622 }
623
624 /*
625 remove_descriptors informs the card the descriptors are no longer
626 valid by setting the address in the card to 0x00.
627 */
remove_descriptors(struct xircom_private * card)628 static void remove_descriptors(struct xircom_private *card)
629 {
630 void __iomem *ioaddr = card->ioaddr;
631 unsigned int val;
632
633 val = 0;
634 xw32(CSR3, val); /* Receive descriptor address */
635 xw32(CSR4, val); /* Send descriptor address */
636 }
637
638 /*
639 link_status_changed returns 1 if the card has indicated that
640 the link status has changed. The new link status has to be read from CSR12.
641
642 This function also clears the status-bit.
643 */
link_status_changed(struct xircom_private * card)644 static int link_status_changed(struct xircom_private *card)
645 {
646 void __iomem *ioaddr = card->ioaddr;
647 unsigned int val;
648
649 val = xr32(CSR5); /* Status register */
650 if (!(val & (1 << 27))) /* no change */
651 return 0;
652
653 /* clear the event by writing a 1 to the bit in the
654 status register. */
655 val = (1 << 27);
656 xw32(CSR5, val);
657
658 return 1;
659 }
660
661
662 /*
663 transmit_active returns 1 if the transmitter on the card is
664 in a non-stopped state.
665 */
transmit_active(struct xircom_private * card)666 static int transmit_active(struct xircom_private *card)
667 {
668 void __iomem *ioaddr = card->ioaddr;
669
670 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */
671 return 0;
672
673 return 1;
674 }
675
676 /*
677 receive_active returns 1 if the receiver on the card is
678 in a non-stopped state.
679 */
receive_active(struct xircom_private * card)680 static int receive_active(struct xircom_private *card)
681 {
682 void __iomem *ioaddr = card->ioaddr;
683
684 if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */
685 return 0;
686
687 return 1;
688 }
689
690 /*
691 activate_receiver enables the receiver on the card.
692 Before being allowed to active the receiver, the receiver
693 must be completely de-activated. To achieve this,
694 this code actually disables the receiver first; then it waits for the
695 receiver to become inactive, then it activates the receiver and then
696 it waits for the receiver to be active.
697
698 must be called with the lock held and interrupts disabled.
699 */
activate_receiver(struct xircom_private * card)700 static void activate_receiver(struct xircom_private *card)
701 {
702 void __iomem *ioaddr = card->ioaddr;
703 unsigned int val;
704 int counter;
705
706 val = xr32(CSR6); /* Operation mode */
707
708 /* If the "active" bit is set and the receiver is already
709 active, no need to do the expensive thing */
710 if ((val&2) && (receive_active(card)))
711 return;
712
713
714 val = val & ~2; /* disable the receiver */
715 xw32(CSR6, val);
716
717 counter = 10;
718 while (counter > 0) {
719 if (!receive_active(card))
720 break;
721 /* wait a while */
722 udelay(50);
723 counter--;
724 if (counter <= 0)
725 netdev_err(card->dev, "Receiver failed to deactivate\n");
726 }
727
728 /* enable the receiver */
729 val = xr32(CSR6); /* Operation mode */
730 val = val | 2; /* enable the receiver */
731 xw32(CSR6, val);
732
733 /* now wait for the card to activate again */
734 counter = 10;
735 while (counter > 0) {
736 if (receive_active(card))
737 break;
738 /* wait a while */
739 udelay(50);
740 counter--;
741 if (counter <= 0)
742 netdev_err(card->dev,
743 "Receiver failed to re-activate\n");
744 }
745 }
746
747 /*
748 deactivate_receiver disables the receiver on the card.
749 To achieve this this code disables the receiver first;
750 then it waits for the receiver to become inactive.
751
752 must be called with the lock held and interrupts disabled.
753 */
deactivate_receiver(struct xircom_private * card)754 static void deactivate_receiver(struct xircom_private *card)
755 {
756 void __iomem *ioaddr = card->ioaddr;
757 unsigned int val;
758 int counter;
759
760 val = xr32(CSR6); /* Operation mode */
761 val = val & ~2; /* disable the receiver */
762 xw32(CSR6, val);
763
764 counter = 10;
765 while (counter > 0) {
766 if (!receive_active(card))
767 break;
768 /* wait a while */
769 udelay(50);
770 counter--;
771 if (counter <= 0)
772 netdev_err(card->dev, "Receiver failed to deactivate\n");
773 }
774 }
775
776
777 /*
778 activate_transmitter enables the transmitter on the card.
779 Before being allowed to active the transmitter, the transmitter
780 must be completely de-activated. To achieve this,
781 this code actually disables the transmitter first; then it waits for the
782 transmitter to become inactive, then it activates the transmitter and then
783 it waits for the transmitter to be active again.
784
785 must be called with the lock held and interrupts disabled.
786 */
activate_transmitter(struct xircom_private * card)787 static void activate_transmitter(struct xircom_private *card)
788 {
789 void __iomem *ioaddr = card->ioaddr;
790 unsigned int val;
791 int counter;
792
793 val = xr32(CSR6); /* Operation mode */
794
795 /* If the "active" bit is set and the receiver is already
796 active, no need to do the expensive thing */
797 if ((val&(1<<13)) && (transmit_active(card)))
798 return;
799
800 val = val & ~(1 << 13); /* disable the transmitter */
801 xw32(CSR6, val);
802
803 counter = 10;
804 while (counter > 0) {
805 if (!transmit_active(card))
806 break;
807 /* wait a while */
808 udelay(50);
809 counter--;
810 if (counter <= 0)
811 netdev_err(card->dev,
812 "Transmitter failed to deactivate\n");
813 }
814
815 /* enable the transmitter */
816 val = xr32(CSR6); /* Operation mode */
817 val = val | (1 << 13); /* enable the transmitter */
818 xw32(CSR6, val);
819
820 /* now wait for the card to activate again */
821 counter = 10;
822 while (counter > 0) {
823 if (transmit_active(card))
824 break;
825 /* wait a while */
826 udelay(50);
827 counter--;
828 if (counter <= 0)
829 netdev_err(card->dev,
830 "Transmitter failed to re-activate\n");
831 }
832 }
833
834 /*
835 deactivate_transmitter disables the transmitter on the card.
836 To achieve this this code disables the transmitter first;
837 then it waits for the transmitter to become inactive.
838
839 must be called with the lock held and interrupts disabled.
840 */
deactivate_transmitter(struct xircom_private * card)841 static void deactivate_transmitter(struct xircom_private *card)
842 {
843 void __iomem *ioaddr = card->ioaddr;
844 unsigned int val;
845 int counter;
846
847 val = xr32(CSR6); /* Operation mode */
848 val = val & ~2; /* disable the transmitter */
849 xw32(CSR6, val);
850
851 counter = 20;
852 while (counter > 0) {
853 if (!transmit_active(card))
854 break;
855 /* wait a while */
856 udelay(50);
857 counter--;
858 if (counter <= 0)
859 netdev_err(card->dev,
860 "Transmitter failed to deactivate\n");
861 }
862 }
863
864
865 /*
866 enable_transmit_interrupt enables the transmit interrupt
867
868 must be called with the lock held and interrupts disabled.
869 */
enable_transmit_interrupt(struct xircom_private * card)870 static void enable_transmit_interrupt(struct xircom_private *card)
871 {
872 void __iomem *ioaddr = card->ioaddr;
873 unsigned int val;
874
875 val = xr32(CSR7); /* Interrupt enable register */
876 val |= 1; /* enable the transmit interrupt */
877 xw32(CSR7, val);
878 }
879
880
881 /*
882 enable_receive_interrupt enables the receive interrupt
883
884 must be called with the lock held and interrupts disabled.
885 */
enable_receive_interrupt(struct xircom_private * card)886 static void enable_receive_interrupt(struct xircom_private *card)
887 {
888 void __iomem *ioaddr = card->ioaddr;
889 unsigned int val;
890
891 val = xr32(CSR7); /* Interrupt enable register */
892 val = val | (1 << 6); /* enable the receive interrupt */
893 xw32(CSR7, val);
894 }
895
896 /*
897 enable_link_interrupt enables the link status change interrupt
898
899 must be called with the lock held and interrupts disabled.
900 */
enable_link_interrupt(struct xircom_private * card)901 static void enable_link_interrupt(struct xircom_private *card)
902 {
903 void __iomem *ioaddr = card->ioaddr;
904 unsigned int val;
905
906 val = xr32(CSR7); /* Interrupt enable register */
907 val = val | (1 << 27); /* enable the link status chage interrupt */
908 xw32(CSR7, val);
909 }
910
911
912
913 /*
914 disable_all_interrupts disables all interrupts
915
916 must be called with the lock held and interrupts disabled.
917 */
disable_all_interrupts(struct xircom_private * card)918 static void disable_all_interrupts(struct xircom_private *card)
919 {
920 void __iomem *ioaddr = card->ioaddr;
921
922 xw32(CSR7, 0);
923 }
924
925 /*
926 enable_common_interrupts enables several weird interrupts
927
928 must be called with the lock held and interrupts disabled.
929 */
enable_common_interrupts(struct xircom_private * card)930 static void enable_common_interrupts(struct xircom_private *card)
931 {
932 void __iomem *ioaddr = card->ioaddr;
933 unsigned int val;
934
935 val = xr32(CSR7); /* Interrupt enable register */
936 val |= (1<<16); /* Normal Interrupt Summary */
937 val |= (1<<15); /* Abnormal Interrupt Summary */
938 val |= (1<<13); /* Fatal bus error */
939 val |= (1<<8); /* Receive Process Stopped */
940 val |= (1<<7); /* Receive Buffer Unavailable */
941 val |= (1<<5); /* Transmit Underflow */
942 val |= (1<<2); /* Transmit Buffer Unavailable */
943 val |= (1<<1); /* Transmit Process Stopped */
944 xw32(CSR7, val);
945 }
946
947 /*
948 enable_promisc starts promisc mode
949
950 must be called with the lock held and interrupts disabled.
951 */
enable_promisc(struct xircom_private * card)952 static int enable_promisc(struct xircom_private *card)
953 {
954 void __iomem *ioaddr = card->ioaddr;
955 unsigned int val;
956
957 val = xr32(CSR6);
958 val = val | (1 << 6);
959 xw32(CSR6, val);
960
961 return 1;
962 }
963
964
965
966
967 /*
968 link_status() checks the links status and will return 0 for no link, 10 for 10mbit link and 100 for.. guess what.
969
970 Must be called in locked state with interrupts disabled
971 */
link_status(struct xircom_private * card)972 static int link_status(struct xircom_private *card)
973 {
974 void __iomem *ioaddr = card->ioaddr;
975 u8 val;
976
977 val = xr8(CSR12);
978
979 /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */
980 if (!(val & (1 << 2)))
981 return 10;
982 /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */
983 if (!(val & (1 << 1)))
984 return 100;
985
986 /* If we get here -> no link at all */
987
988 return 0;
989 }
990
991
992
993
994
995 /*
996 read_mac_address() reads the MAC address from the NIC and stores it in the "dev" structure.
997
998 This function will take the spinlock itself and can, as a result, not be called with the lock helt.
999 */
read_mac_address(struct xircom_private * card)1000 static void read_mac_address(struct xircom_private *card)
1001 {
1002 void __iomem *ioaddr = card->ioaddr;
1003 unsigned long flags;
1004 u8 link;
1005 int i;
1006
1007 spin_lock_irqsave(&card->lock, flags);
1008
1009 xw32(CSR9, 1 << 12); /* enable boot rom access */
1010 for (i = 0x100; i < 0x1f7; i += link + 2) {
1011 u8 tuple, data_id, data_count;
1012
1013 xw32(CSR10, i);
1014 tuple = xr32(CSR9);
1015 xw32(CSR10, i + 1);
1016 link = xr32(CSR9);
1017 xw32(CSR10, i + 2);
1018 data_id = xr32(CSR9);
1019 xw32(CSR10, i + 3);
1020 data_count = xr32(CSR9);
1021 if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) {
1022 int j;
1023
1024 for (j = 0; j < 6; j++) {
1025 xw32(CSR10, i + j + 4);
1026 card->dev->dev_addr[j] = xr32(CSR9) & 0xff;
1027 }
1028 break;
1029 } else if (link == 0) {
1030 break;
1031 }
1032 }
1033 spin_unlock_irqrestore(&card->lock, flags);
1034 pr_debug(" %pM\n", card->dev->dev_addr);
1035 }
1036
1037
1038 /*
1039 transceiver_voodoo() enables the external UTP plug thingy.
1040 it's called voodoo as I stole this code and cannot cross-reference
1041 it with the specification.
1042 */
transceiver_voodoo(struct xircom_private * card)1043 static void transceiver_voodoo(struct xircom_private *card)
1044 {
1045 void __iomem *ioaddr = card->ioaddr;
1046 unsigned long flags;
1047
1048 /* disable all powermanagement */
1049 pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1050
1051 setup_descriptors(card);
1052
1053 spin_lock_irqsave(&card->lock, flags);
1054
1055 xw32(CSR15, 0x0008);
1056 udelay(25);
1057 xw32(CSR15, 0xa8050000);
1058 udelay(25);
1059 xw32(CSR15, 0xa00f0000);
1060 udelay(25);
1061
1062 spin_unlock_irqrestore(&card->lock, flags);
1063
1064 netif_start_queue(card->dev);
1065 }
1066
1067
xircom_up(struct xircom_private * card)1068 static void xircom_up(struct xircom_private *card)
1069 {
1070 unsigned long flags;
1071 int i;
1072
1073 /* disable all powermanagement */
1074 pci_write_config_dword(card->pdev, PCI_POWERMGMT, 0x0000);
1075
1076 setup_descriptors(card);
1077
1078 spin_lock_irqsave(&card->lock, flags);
1079
1080
1081 enable_link_interrupt(card);
1082 enable_transmit_interrupt(card);
1083 enable_receive_interrupt(card);
1084 enable_common_interrupts(card);
1085 enable_promisc(card);
1086
1087 /* The card can have received packets already, read them away now */
1088 for (i=0;i<NUMDESCRIPTORS;i++)
1089 investigate_read_descriptor(card->dev,card,i,bufferoffsets[i]);
1090
1091
1092 spin_unlock_irqrestore(&card->lock, flags);
1093 trigger_receive(card);
1094 trigger_transmit(card);
1095 netif_start_queue(card->dev);
1096 }
1097
1098 /* Bufferoffset is in BYTES */
1099 static void
investigate_read_descriptor(struct net_device * dev,struct xircom_private * card,int descnr,unsigned int bufferoffset)1100 investigate_read_descriptor(struct net_device *dev, struct xircom_private *card,
1101 int descnr, unsigned int bufferoffset)
1102 {
1103 int status;
1104
1105 status = le32_to_cpu(card->rx_buffer[4*descnr]);
1106
1107 if (status > 0) { /* packet received */
1108
1109 /* TODO: discard error packets */
1110
1111 short pkt_len = ((status >> 16) & 0x7ff) - 4;
1112 /* minus 4, we don't want the CRC */
1113 struct sk_buff *skb;
1114
1115 if (pkt_len > 1518) {
1116 netdev_err(dev, "Packet length %i is bogus\n", pkt_len);
1117 pkt_len = 1518;
1118 }
1119
1120 skb = netdev_alloc_skb(dev, pkt_len + 2);
1121 if (skb == NULL) {
1122 dev->stats.rx_dropped++;
1123 goto out;
1124 }
1125 skb_reserve(skb, 2);
1126 skb_copy_to_linear_data(skb,
1127 &card->rx_buffer[bufferoffset / 4],
1128 pkt_len);
1129 skb_put(skb, pkt_len);
1130 skb->protocol = eth_type_trans(skb, dev);
1131 netif_rx(skb);
1132 dev->stats.rx_packets++;
1133 dev->stats.rx_bytes += pkt_len;
1134
1135 out:
1136 /* give the buffer back to the card */
1137 card->rx_buffer[4*descnr] = cpu_to_le32(0x80000000);
1138 trigger_receive(card);
1139 }
1140 }
1141
1142
1143 /* Bufferoffset is in BYTES */
1144 static void
investigate_write_descriptor(struct net_device * dev,struct xircom_private * card,int descnr,unsigned int bufferoffset)1145 investigate_write_descriptor(struct net_device *dev,
1146 struct xircom_private *card,
1147 int descnr, unsigned int bufferoffset)
1148 {
1149 int status;
1150
1151 status = le32_to_cpu(card->tx_buffer[4*descnr]);
1152 #if 0
1153 if (status & 0x8000) { /* Major error */
1154 pr_err("Major transmit error status %x\n", status);
1155 card->tx_buffer[4*descnr] = 0;
1156 netif_wake_queue (dev);
1157 }
1158 #endif
1159 if (status > 0) { /* bit 31 is 0 when done */
1160 if (card->tx_skb[descnr]!=NULL) {
1161 dev->stats.tx_bytes += card->tx_skb[descnr]->len;
1162 dev_kfree_skb_irq(card->tx_skb[descnr]);
1163 }
1164 card->tx_skb[descnr] = NULL;
1165 /* Bit 8 in the status field is 1 if there was a collision */
1166 if (status & (1 << 8))
1167 dev->stats.collisions++;
1168 card->tx_buffer[4*descnr] = 0; /* descriptor is free again */
1169 netif_wake_queue (dev);
1170 dev->stats.tx_packets++;
1171 }
1172 }
1173
xircom_init(void)1174 static int __init xircom_init(void)
1175 {
1176 return pci_register_driver(&xircom_ops);
1177 }
1178
xircom_exit(void)1179 static void __exit xircom_exit(void)
1180 {
1181 pci_unregister_driver(&xircom_ops);
1182 }
1183
1184 module_init(xircom_init)
1185 module_exit(xircom_exit)
1186
1187