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1 /******************************************************************************
2  *
3  * GPL LICENSE SUMMARY
4  *
5  * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of version 2 of the GNU General Public License as
9  * published by the Free Software Foundation.
10  *
11  * This program is distributed in the hope that it will be useful, but
12  * WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
14  * General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19  * USA
20  *
21  * The full GNU General Public License is included in this distribution
22  * in the file called LICENSE.GPL.
23  *
24  * Contact Information:
25  *  Intel Linux Wireless <ilw@linux.intel.com>
26  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27  *****************************************************************************/
28 
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/etherdevice.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/types.h>
35 #include <linux/lockdep.h>
36 #include <linux/init.h>
37 #include <linux/pci.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/skbuff.h>
41 #include <net/mac80211.h>
42 
43 #include "common.h"
44 
45 int
_il_poll_bit(struct il_priv * il,u32 addr,u32 bits,u32 mask,int timeout)46 _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
47 {
48 	const int interval = 10; /* microseconds */
49 	int t = 0;
50 
51 	do {
52 		if ((_il_rd(il, addr) & mask) == (bits & mask))
53 			return t;
54 		udelay(interval);
55 		t += interval;
56 	} while (t < timeout);
57 
58 	return -ETIMEDOUT;
59 }
60 EXPORT_SYMBOL(_il_poll_bit);
61 
62 void
il_set_bit(struct il_priv * p,u32 r,u32 m)63 il_set_bit(struct il_priv *p, u32 r, u32 m)
64 {
65 	unsigned long reg_flags;
66 
67 	spin_lock_irqsave(&p->reg_lock, reg_flags);
68 	_il_set_bit(p, r, m);
69 	spin_unlock_irqrestore(&p->reg_lock, reg_flags);
70 }
71 EXPORT_SYMBOL(il_set_bit);
72 
73 void
il_clear_bit(struct il_priv * p,u32 r,u32 m)74 il_clear_bit(struct il_priv *p, u32 r, u32 m)
75 {
76 	unsigned long reg_flags;
77 
78 	spin_lock_irqsave(&p->reg_lock, reg_flags);
79 	_il_clear_bit(p, r, m);
80 	spin_unlock_irqrestore(&p->reg_lock, reg_flags);
81 }
82 EXPORT_SYMBOL(il_clear_bit);
83 
84 bool
_il_grab_nic_access(struct il_priv * il)85 _il_grab_nic_access(struct il_priv *il)
86 {
87 	int ret;
88 	u32 val;
89 
90 	/* this bit wakes up the NIC */
91 	_il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
92 
93 	/*
94 	 * These bits say the device is running, and should keep running for
95 	 * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
96 	 * but they do not indicate that embedded SRAM is restored yet;
97 	 * 3945 and 4965 have volatile SRAM, and must save/restore contents
98 	 * to/from host DRAM when sleeping/waking for power-saving.
99 	 * Each direction takes approximately 1/4 millisecond; with this
100 	 * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
101 	 * series of register accesses are expected (e.g. reading Event Log),
102 	 * to keep device from sleeping.
103 	 *
104 	 * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
105 	 * SRAM is okay/restored.  We don't check that here because this call
106 	 * is just for hardware register access; but GP1 MAC_SLEEP check is a
107 	 * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
108 	 *
109 	 */
110 	ret =
111 	    _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
112 			 (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
113 			  CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
114 	if (unlikely(ret < 0)) {
115 		val = _il_rd(il, CSR_GP_CNTRL);
116 		WARN_ONCE(1, "Timeout waiting for ucode processor access "
117 			     "(CSR_GP_CNTRL 0x%08x)\n", val);
118 		_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
119 		return false;
120 	}
121 
122 	return true;
123 }
124 EXPORT_SYMBOL_GPL(_il_grab_nic_access);
125 
126 int
il_poll_bit(struct il_priv * il,u32 addr,u32 mask,int timeout)127 il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
128 {
129 	const int interval = 10; /* microseconds */
130 	int t = 0;
131 
132 	do {
133 		if ((il_rd(il, addr) & mask) == mask)
134 			return t;
135 		udelay(interval);
136 		t += interval;
137 	} while (t < timeout);
138 
139 	return -ETIMEDOUT;
140 }
141 EXPORT_SYMBOL(il_poll_bit);
142 
143 u32
il_rd_prph(struct il_priv * il,u32 reg)144 il_rd_prph(struct il_priv *il, u32 reg)
145 {
146 	unsigned long reg_flags;
147 	u32 val;
148 
149 	spin_lock_irqsave(&il->reg_lock, reg_flags);
150 	_il_grab_nic_access(il);
151 	val = _il_rd_prph(il, reg);
152 	_il_release_nic_access(il);
153 	spin_unlock_irqrestore(&il->reg_lock, reg_flags);
154 	return val;
155 }
156 EXPORT_SYMBOL(il_rd_prph);
157 
158 void
il_wr_prph(struct il_priv * il,u32 addr,u32 val)159 il_wr_prph(struct il_priv *il, u32 addr, u32 val)
160 {
161 	unsigned long reg_flags;
162 
163 	spin_lock_irqsave(&il->reg_lock, reg_flags);
164 	if (likely(_il_grab_nic_access(il))) {
165 		_il_wr_prph(il, addr, val);
166 		_il_release_nic_access(il);
167 	}
168 	spin_unlock_irqrestore(&il->reg_lock, reg_flags);
169 }
170 EXPORT_SYMBOL(il_wr_prph);
171 
172 u32
il_read_targ_mem(struct il_priv * il,u32 addr)173 il_read_targ_mem(struct il_priv *il, u32 addr)
174 {
175 	unsigned long reg_flags;
176 	u32 value;
177 
178 	spin_lock_irqsave(&il->reg_lock, reg_flags);
179 	_il_grab_nic_access(il);
180 
181 	_il_wr(il, HBUS_TARG_MEM_RADDR, addr);
182 	value = _il_rd(il, HBUS_TARG_MEM_RDAT);
183 
184 	_il_release_nic_access(il);
185 	spin_unlock_irqrestore(&il->reg_lock, reg_flags);
186 	return value;
187 }
188 EXPORT_SYMBOL(il_read_targ_mem);
189 
190 void
il_write_targ_mem(struct il_priv * il,u32 addr,u32 val)191 il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
192 {
193 	unsigned long reg_flags;
194 
195 	spin_lock_irqsave(&il->reg_lock, reg_flags);
196 	if (likely(_il_grab_nic_access(il))) {
197 		_il_wr(il, HBUS_TARG_MEM_WADDR, addr);
198 		_il_wr(il, HBUS_TARG_MEM_WDAT, val);
199 		_il_release_nic_access(il);
200 	}
201 	spin_unlock_irqrestore(&il->reg_lock, reg_flags);
202 }
203 EXPORT_SYMBOL(il_write_targ_mem);
204 
205 const char *
il_get_cmd_string(u8 cmd)206 il_get_cmd_string(u8 cmd)
207 {
208 	switch (cmd) {
209 		IL_CMD(N_ALIVE);
210 		IL_CMD(N_ERROR);
211 		IL_CMD(C_RXON);
212 		IL_CMD(C_RXON_ASSOC);
213 		IL_CMD(C_QOS_PARAM);
214 		IL_CMD(C_RXON_TIMING);
215 		IL_CMD(C_ADD_STA);
216 		IL_CMD(C_REM_STA);
217 		IL_CMD(C_WEPKEY);
218 		IL_CMD(N_3945_RX);
219 		IL_CMD(C_TX);
220 		IL_CMD(C_RATE_SCALE);
221 		IL_CMD(C_LEDS);
222 		IL_CMD(C_TX_LINK_QUALITY_CMD);
223 		IL_CMD(C_CHANNEL_SWITCH);
224 		IL_CMD(N_CHANNEL_SWITCH);
225 		IL_CMD(C_SPECTRUM_MEASUREMENT);
226 		IL_CMD(N_SPECTRUM_MEASUREMENT);
227 		IL_CMD(C_POWER_TBL);
228 		IL_CMD(N_PM_SLEEP);
229 		IL_CMD(N_PM_DEBUG_STATS);
230 		IL_CMD(C_SCAN);
231 		IL_CMD(C_SCAN_ABORT);
232 		IL_CMD(N_SCAN_START);
233 		IL_CMD(N_SCAN_RESULTS);
234 		IL_CMD(N_SCAN_COMPLETE);
235 		IL_CMD(N_BEACON);
236 		IL_CMD(C_TX_BEACON);
237 		IL_CMD(C_TX_PWR_TBL);
238 		IL_CMD(C_BT_CONFIG);
239 		IL_CMD(C_STATS);
240 		IL_CMD(N_STATS);
241 		IL_CMD(N_CARD_STATE);
242 		IL_CMD(N_MISSED_BEACONS);
243 		IL_CMD(C_CT_KILL_CONFIG);
244 		IL_CMD(C_SENSITIVITY);
245 		IL_CMD(C_PHY_CALIBRATION);
246 		IL_CMD(N_RX_PHY);
247 		IL_CMD(N_RX_MPDU);
248 		IL_CMD(N_RX);
249 		IL_CMD(N_COMPRESSED_BA);
250 	default:
251 		return "UNKNOWN";
252 
253 	}
254 }
255 EXPORT_SYMBOL(il_get_cmd_string);
256 
257 #define HOST_COMPLETE_TIMEOUT (HZ / 2)
258 
259 static void
il_generic_cmd_callback(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt)260 il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
261 			struct il_rx_pkt *pkt)
262 {
263 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
264 		IL_ERR("Bad return from %s (0x%08X)\n",
265 		       il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
266 		return;
267 	}
268 #ifdef CONFIG_IWLEGACY_DEBUG
269 	switch (cmd->hdr.cmd) {
270 	case C_TX_LINK_QUALITY_CMD:
271 	case C_SENSITIVITY:
272 		D_HC_DUMP("back from %s (0x%08X)\n",
273 			  il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
274 		break;
275 	default:
276 		D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
277 		     pkt->hdr.flags);
278 	}
279 #endif
280 }
281 
282 static int
il_send_cmd_async(struct il_priv * il,struct il_host_cmd * cmd)283 il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
284 {
285 	int ret;
286 
287 	BUG_ON(!(cmd->flags & CMD_ASYNC));
288 
289 	/* An asynchronous command can not expect an SKB to be set. */
290 	BUG_ON(cmd->flags & CMD_WANT_SKB);
291 
292 	/* Assign a generic callback if one is not provided */
293 	if (!cmd->callback)
294 		cmd->callback = il_generic_cmd_callback;
295 
296 	if (test_bit(S_EXIT_PENDING, &il->status))
297 		return -EBUSY;
298 
299 	ret = il_enqueue_hcmd(il, cmd);
300 	if (ret < 0) {
301 		IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
302 		       il_get_cmd_string(cmd->id), ret);
303 		return ret;
304 	}
305 	return 0;
306 }
307 
308 int
il_send_cmd_sync(struct il_priv * il,struct il_host_cmd * cmd)309 il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
310 {
311 	int cmd_idx;
312 	int ret;
313 
314 	lockdep_assert_held(&il->mutex);
315 
316 	BUG_ON(cmd->flags & CMD_ASYNC);
317 
318 	/* A synchronous command can not have a callback set. */
319 	BUG_ON(cmd->callback);
320 
321 	D_INFO("Attempting to send sync command %s\n",
322 	       il_get_cmd_string(cmd->id));
323 
324 	set_bit(S_HCMD_ACTIVE, &il->status);
325 	D_INFO("Setting HCMD_ACTIVE for command %s\n",
326 	       il_get_cmd_string(cmd->id));
327 
328 	cmd_idx = il_enqueue_hcmd(il, cmd);
329 	if (cmd_idx < 0) {
330 		ret = cmd_idx;
331 		IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
332 		       il_get_cmd_string(cmd->id), ret);
333 		goto out;
334 	}
335 
336 	ret = wait_event_timeout(il->wait_command_queue,
337 				 !test_bit(S_HCMD_ACTIVE, &il->status),
338 				 HOST_COMPLETE_TIMEOUT);
339 	if (!ret) {
340 		if (test_bit(S_HCMD_ACTIVE, &il->status)) {
341 			IL_ERR("Error sending %s: time out after %dms.\n",
342 			       il_get_cmd_string(cmd->id),
343 			       jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
344 
345 			clear_bit(S_HCMD_ACTIVE, &il->status);
346 			D_INFO("Clearing HCMD_ACTIVE for command %s\n",
347 			       il_get_cmd_string(cmd->id));
348 			ret = -ETIMEDOUT;
349 			goto cancel;
350 		}
351 	}
352 
353 	if (test_bit(S_RFKILL, &il->status)) {
354 		IL_ERR("Command %s aborted: RF KILL Switch\n",
355 		       il_get_cmd_string(cmd->id));
356 		ret = -ECANCELED;
357 		goto fail;
358 	}
359 	if (test_bit(S_FW_ERROR, &il->status)) {
360 		IL_ERR("Command %s failed: FW Error\n",
361 		       il_get_cmd_string(cmd->id));
362 		ret = -EIO;
363 		goto fail;
364 	}
365 	if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
366 		IL_ERR("Error: Response NULL in '%s'\n",
367 		       il_get_cmd_string(cmd->id));
368 		ret = -EIO;
369 		goto cancel;
370 	}
371 
372 	ret = 0;
373 	goto out;
374 
375 cancel:
376 	if (cmd->flags & CMD_WANT_SKB) {
377 		/*
378 		 * Cancel the CMD_WANT_SKB flag for the cmd in the
379 		 * TX cmd queue. Otherwise in case the cmd comes
380 		 * in later, it will possibly set an invalid
381 		 * address (cmd->meta.source).
382 		 */
383 		il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
384 	}
385 fail:
386 	if (cmd->reply_page) {
387 		il_free_pages(il, cmd->reply_page);
388 		cmd->reply_page = 0;
389 	}
390 out:
391 	return ret;
392 }
393 EXPORT_SYMBOL(il_send_cmd_sync);
394 
395 int
il_send_cmd(struct il_priv * il,struct il_host_cmd * cmd)396 il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
397 {
398 	if (cmd->flags & CMD_ASYNC)
399 		return il_send_cmd_async(il, cmd);
400 
401 	return il_send_cmd_sync(il, cmd);
402 }
403 EXPORT_SYMBOL(il_send_cmd);
404 
405 int
il_send_cmd_pdu(struct il_priv * il,u8 id,u16 len,const void * data)406 il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
407 {
408 	struct il_host_cmd cmd = {
409 		.id = id,
410 		.len = len,
411 		.data = data,
412 	};
413 
414 	return il_send_cmd_sync(il, &cmd);
415 }
416 EXPORT_SYMBOL(il_send_cmd_pdu);
417 
418 int
il_send_cmd_pdu_async(struct il_priv * il,u8 id,u16 len,const void * data,void (* callback)(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt))419 il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
420 		      void (*callback) (struct il_priv *il,
421 					struct il_device_cmd *cmd,
422 					struct il_rx_pkt *pkt))
423 {
424 	struct il_host_cmd cmd = {
425 		.id = id,
426 		.len = len,
427 		.data = data,
428 	};
429 
430 	cmd.flags |= CMD_ASYNC;
431 	cmd.callback = callback;
432 
433 	return il_send_cmd_async(il, &cmd);
434 }
435 EXPORT_SYMBOL(il_send_cmd_pdu_async);
436 
437 /* default: IL_LED_BLINK(0) using blinking idx table */
438 static int led_mode;
439 module_param(led_mode, int, S_IRUGO);
440 MODULE_PARM_DESC(led_mode,
441 		 "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
442 
443 /* Throughput		OFF time(ms)	ON time (ms)
444  *	>300			25		25
445  *	>200 to 300		40		40
446  *	>100 to 200		55		55
447  *	>70 to 100		65		65
448  *	>50 to 70		75		75
449  *	>20 to 50		85		85
450  *	>10 to 20		95		95
451  *	>5 to 10		110		110
452  *	>1 to 5			130		130
453  *	>0 to 1			167		167
454  *	<=0					SOLID ON
455  */
456 static const struct ieee80211_tpt_blink il_blink[] = {
457 	{.throughput = 0,		.blink_time = 334},
458 	{.throughput = 1 * 1024 - 1,	.blink_time = 260},
459 	{.throughput = 5 * 1024 - 1,	.blink_time = 220},
460 	{.throughput = 10 * 1024 - 1,	.blink_time = 190},
461 	{.throughput = 20 * 1024 - 1,	.blink_time = 170},
462 	{.throughput = 50 * 1024 - 1,	.blink_time = 150},
463 	{.throughput = 70 * 1024 - 1,	.blink_time = 130},
464 	{.throughput = 100 * 1024 - 1,	.blink_time = 110},
465 	{.throughput = 200 * 1024 - 1,	.blink_time = 80},
466 	{.throughput = 300 * 1024 - 1,	.blink_time = 50},
467 };
468 
469 /*
470  * Adjust led blink rate to compensate on a MAC Clock difference on every HW
471  * Led blink rate analysis showed an average deviation of 0% on 3945,
472  * 5% on 4965 HW.
473  * Need to compensate on the led on/off time per HW according to the deviation
474  * to achieve the desired led frequency
475  * The calculation is: (100-averageDeviation)/100 * blinkTime
476  * For code efficiency the calculation will be:
477  *     compensation = (100 - averageDeviation) * 64 / 100
478  *     NewBlinkTime = (compensation * BlinkTime) / 64
479  */
480 static inline u8
il_blink_compensation(struct il_priv * il,u8 time,u16 compensation)481 il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
482 {
483 	if (!compensation) {
484 		IL_ERR("undefined blink compensation: "
485 		       "use pre-defined blinking time\n");
486 		return time;
487 	}
488 
489 	return (u8) ((time * compensation) >> 6);
490 }
491 
492 /* Set led pattern command */
493 static int
il_led_cmd(struct il_priv * il,unsigned long on,unsigned long off)494 il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
495 {
496 	struct il_led_cmd led_cmd = {
497 		.id = IL_LED_LINK,
498 		.interval = IL_DEF_LED_INTRVL
499 	};
500 	int ret;
501 
502 	if (!test_bit(S_READY, &il->status))
503 		return -EBUSY;
504 
505 	if (il->blink_on == on && il->blink_off == off)
506 		return 0;
507 
508 	if (off == 0) {
509 		/* led is SOLID_ON */
510 		on = IL_LED_SOLID;
511 	}
512 
513 	D_LED("Led blink time compensation=%u\n",
514 	      il->cfg->led_compensation);
515 	led_cmd.on =
516 	    il_blink_compensation(il, on,
517 				  il->cfg->led_compensation);
518 	led_cmd.off =
519 	    il_blink_compensation(il, off,
520 				  il->cfg->led_compensation);
521 
522 	ret = il->ops->send_led_cmd(il, &led_cmd);
523 	if (!ret) {
524 		il->blink_on = on;
525 		il->blink_off = off;
526 	}
527 	return ret;
528 }
529 
530 static void
il_led_brightness_set(struct led_classdev * led_cdev,enum led_brightness brightness)531 il_led_brightness_set(struct led_classdev *led_cdev,
532 		      enum led_brightness brightness)
533 {
534 	struct il_priv *il = container_of(led_cdev, struct il_priv, led);
535 	unsigned long on = 0;
536 
537 	if (brightness > 0)
538 		on = IL_LED_SOLID;
539 
540 	il_led_cmd(il, on, 0);
541 }
542 
543 static int
il_led_blink_set(struct led_classdev * led_cdev,unsigned long * delay_on,unsigned long * delay_off)544 il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
545 		 unsigned long *delay_off)
546 {
547 	struct il_priv *il = container_of(led_cdev, struct il_priv, led);
548 
549 	return il_led_cmd(il, *delay_on, *delay_off);
550 }
551 
552 void
il_leds_init(struct il_priv * il)553 il_leds_init(struct il_priv *il)
554 {
555 	int mode = led_mode;
556 	int ret;
557 
558 	if (mode == IL_LED_DEFAULT)
559 		mode = il->cfg->led_mode;
560 
561 	il->led.name =
562 	    kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
563 	il->led.brightness_set = il_led_brightness_set;
564 	il->led.blink_set = il_led_blink_set;
565 	il->led.max_brightness = 1;
566 
567 	switch (mode) {
568 	case IL_LED_DEFAULT:
569 		WARN_ON(1);
570 		break;
571 	case IL_LED_BLINK:
572 		il->led.default_trigger =
573 		    ieee80211_create_tpt_led_trigger(il->hw,
574 						     IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
575 						     il_blink,
576 						     ARRAY_SIZE(il_blink));
577 		break;
578 	case IL_LED_RF_STATE:
579 		il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
580 		break;
581 	}
582 
583 	ret = led_classdev_register(&il->pci_dev->dev, &il->led);
584 	if (ret) {
585 		kfree(il->led.name);
586 		return;
587 	}
588 
589 	il->led_registered = true;
590 }
591 EXPORT_SYMBOL(il_leds_init);
592 
593 void
il_leds_exit(struct il_priv * il)594 il_leds_exit(struct il_priv *il)
595 {
596 	if (!il->led_registered)
597 		return;
598 
599 	led_classdev_unregister(&il->led);
600 	kfree(il->led.name);
601 }
602 EXPORT_SYMBOL(il_leds_exit);
603 
604 /************************** EEPROM BANDS ****************************
605  *
606  * The il_eeprom_band definitions below provide the mapping from the
607  * EEPROM contents to the specific channel number supported for each
608  * band.
609  *
610  * For example, il_priv->eeprom.band_3_channels[4] from the band_3
611  * definition below maps to physical channel 42 in the 5.2GHz spectrum.
612  * The specific geography and calibration information for that channel
613  * is contained in the eeprom map itself.
614  *
615  * During init, we copy the eeprom information and channel map
616  * information into il->channel_info_24/52 and il->channel_map_24/52
617  *
618  * channel_map_24/52 provides the idx in the channel_info array for a
619  * given channel.  We have to have two separate maps as there is channel
620  * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
621  * band_2
622  *
623  * A value of 0xff stored in the channel_map indicates that the channel
624  * is not supported by the hardware at all.
625  *
626  * A value of 0xfe in the channel_map indicates that the channel is not
627  * valid for Tx with the current hardware.  This means that
628  * while the system can tune and receive on a given channel, it may not
629  * be able to associate or transmit any frames on that
630  * channel.  There is no corresponding channel information for that
631  * entry.
632  *
633  *********************************************************************/
634 
635 /* 2.4 GHz */
636 const u8 il_eeprom_band_1[14] = {
637 	1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
638 };
639 
640 /* 5.2 GHz bands */
641 static const u8 il_eeprom_band_2[] = {	/* 4915-5080MHz */
642 	183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
643 };
644 
645 static const u8 il_eeprom_band_3[] = {	/* 5170-5320MHz */
646 	34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
647 };
648 
649 static const u8 il_eeprom_band_4[] = {	/* 5500-5700MHz */
650 	100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
651 };
652 
653 static const u8 il_eeprom_band_5[] = {	/* 5725-5825MHz */
654 	145, 149, 153, 157, 161, 165
655 };
656 
657 static const u8 il_eeprom_band_6[] = {	/* 2.4 ht40 channel */
658 	1, 2, 3, 4, 5, 6, 7
659 };
660 
661 static const u8 il_eeprom_band_7[] = {	/* 5.2 ht40 channel */
662 	36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
663 };
664 
665 /******************************************************************************
666  *
667  * EEPROM related functions
668  *
669 ******************************************************************************/
670 
671 static int
il_eeprom_verify_signature(struct il_priv * il)672 il_eeprom_verify_signature(struct il_priv *il)
673 {
674 	u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
675 	int ret = 0;
676 
677 	D_EEPROM("EEPROM signature=0x%08x\n", gp);
678 	switch (gp) {
679 	case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
680 	case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
681 		break;
682 	default:
683 		IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
684 		ret = -ENOENT;
685 		break;
686 	}
687 	return ret;
688 }
689 
690 const u8 *
il_eeprom_query_addr(const struct il_priv * il,size_t offset)691 il_eeprom_query_addr(const struct il_priv *il, size_t offset)
692 {
693 	BUG_ON(offset >= il->cfg->eeprom_size);
694 	return &il->eeprom[offset];
695 }
696 EXPORT_SYMBOL(il_eeprom_query_addr);
697 
698 u16
il_eeprom_query16(const struct il_priv * il,size_t offset)699 il_eeprom_query16(const struct il_priv *il, size_t offset)
700 {
701 	if (!il->eeprom)
702 		return 0;
703 	return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
704 }
705 EXPORT_SYMBOL(il_eeprom_query16);
706 
707 /**
708  * il_eeprom_init - read EEPROM contents
709  *
710  * Load the EEPROM contents from adapter into il->eeprom
711  *
712  * NOTE:  This routine uses the non-debug IO access functions.
713  */
714 int
il_eeprom_init(struct il_priv * il)715 il_eeprom_init(struct il_priv *il)
716 {
717 	__le16 *e;
718 	u32 gp = _il_rd(il, CSR_EEPROM_GP);
719 	int sz;
720 	int ret;
721 	u16 addr;
722 
723 	/* allocate eeprom */
724 	sz = il->cfg->eeprom_size;
725 	D_EEPROM("NVM size = %d\n", sz);
726 	il->eeprom = kzalloc(sz, GFP_KERNEL);
727 	if (!il->eeprom) {
728 		ret = -ENOMEM;
729 		goto alloc_err;
730 	}
731 	e = (__le16 *) il->eeprom;
732 
733 	il->ops->apm_init(il);
734 
735 	ret = il_eeprom_verify_signature(il);
736 	if (ret < 0) {
737 		IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
738 		ret = -ENOENT;
739 		goto err;
740 	}
741 
742 	/* Make sure driver (instead of uCode) is allowed to read EEPROM */
743 	ret = il->ops->eeprom_acquire_semaphore(il);
744 	if (ret < 0) {
745 		IL_ERR("Failed to acquire EEPROM semaphore.\n");
746 		ret = -ENOENT;
747 		goto err;
748 	}
749 
750 	/* eeprom is an array of 16bit values */
751 	for (addr = 0; addr < sz; addr += sizeof(u16)) {
752 		u32 r;
753 
754 		_il_wr(il, CSR_EEPROM_REG,
755 		       CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
756 
757 		ret =
758 		    _il_poll_bit(il, CSR_EEPROM_REG,
759 				 CSR_EEPROM_REG_READ_VALID_MSK,
760 				 CSR_EEPROM_REG_READ_VALID_MSK,
761 				 IL_EEPROM_ACCESS_TIMEOUT);
762 		if (ret < 0) {
763 			IL_ERR("Time out reading EEPROM[%d]\n", addr);
764 			goto done;
765 		}
766 		r = _il_rd(il, CSR_EEPROM_REG);
767 		e[addr / 2] = cpu_to_le16(r >> 16);
768 	}
769 
770 	D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
771 		 il_eeprom_query16(il, EEPROM_VERSION));
772 
773 	ret = 0;
774 done:
775 	il->ops->eeprom_release_semaphore(il);
776 
777 err:
778 	if (ret)
779 		il_eeprom_free(il);
780 	/* Reset chip to save power until we load uCode during "up". */
781 	il_apm_stop(il);
782 alloc_err:
783 	return ret;
784 }
785 EXPORT_SYMBOL(il_eeprom_init);
786 
787 void
il_eeprom_free(struct il_priv * il)788 il_eeprom_free(struct il_priv *il)
789 {
790 	kfree(il->eeprom);
791 	il->eeprom = NULL;
792 }
793 EXPORT_SYMBOL(il_eeprom_free);
794 
795 static void
il_init_band_reference(const struct il_priv * il,int eep_band,int * eeprom_ch_count,const struct il_eeprom_channel ** eeprom_ch_info,const u8 ** eeprom_ch_idx)796 il_init_band_reference(const struct il_priv *il, int eep_band,
797 		       int *eeprom_ch_count,
798 		       const struct il_eeprom_channel **eeprom_ch_info,
799 		       const u8 **eeprom_ch_idx)
800 {
801 	u32 offset = il->cfg->regulatory_bands[eep_band - 1];
802 
803 	switch (eep_band) {
804 	case 1:		/* 2.4GHz band */
805 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
806 		*eeprom_ch_info =
807 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
808 								     offset);
809 		*eeprom_ch_idx = il_eeprom_band_1;
810 		break;
811 	case 2:		/* 4.9GHz band */
812 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
813 		*eeprom_ch_info =
814 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
815 								     offset);
816 		*eeprom_ch_idx = il_eeprom_band_2;
817 		break;
818 	case 3:		/* 5.2GHz band */
819 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
820 		*eeprom_ch_info =
821 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
822 								     offset);
823 		*eeprom_ch_idx = il_eeprom_band_3;
824 		break;
825 	case 4:		/* 5.5GHz band */
826 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
827 		*eeprom_ch_info =
828 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
829 								     offset);
830 		*eeprom_ch_idx = il_eeprom_band_4;
831 		break;
832 	case 5:		/* 5.7GHz band */
833 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
834 		*eeprom_ch_info =
835 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
836 								     offset);
837 		*eeprom_ch_idx = il_eeprom_band_5;
838 		break;
839 	case 6:		/* 2.4GHz ht40 channels */
840 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
841 		*eeprom_ch_info =
842 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
843 								     offset);
844 		*eeprom_ch_idx = il_eeprom_band_6;
845 		break;
846 	case 7:		/* 5 GHz ht40 channels */
847 		*eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
848 		*eeprom_ch_info =
849 		    (struct il_eeprom_channel *)il_eeprom_query_addr(il,
850 								     offset);
851 		*eeprom_ch_idx = il_eeprom_band_7;
852 		break;
853 	default:
854 		BUG();
855 	}
856 }
857 
858 #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
859 			    ? # x " " : "")
860 /**
861  * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
862  *
863  * Does not set up a command, or touch hardware.
864  */
865 static int
il_mod_ht40_chan_info(struct il_priv * il,enum ieee80211_band band,u16 channel,const struct il_eeprom_channel * eeprom_ch,u8 clear_ht40_extension_channel)866 il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel,
867 		      const struct il_eeprom_channel *eeprom_ch,
868 		      u8 clear_ht40_extension_channel)
869 {
870 	struct il_channel_info *ch_info;
871 
872 	ch_info =
873 	    (struct il_channel_info *)il_get_channel_info(il, band, channel);
874 
875 	if (!il_is_channel_valid(ch_info))
876 		return -1;
877 
878 	D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
879 		 " Ad-Hoc %ssupported\n", ch_info->channel,
880 		 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
881 		 CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
882 		 CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
883 		 CHECK_AND_PRINT(DFS), eeprom_ch->flags,
884 		 eeprom_ch->max_power_avg,
885 		 ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
886 		  !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
887 
888 	ch_info->ht40_eeprom = *eeprom_ch;
889 	ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
890 	ch_info->ht40_flags = eeprom_ch->flags;
891 	if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
892 		ch_info->ht40_extension_channel &=
893 		    ~clear_ht40_extension_channel;
894 
895 	return 0;
896 }
897 
898 #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
899 			    ? # x " " : "")
900 
901 /**
902  * il_init_channel_map - Set up driver's info for all possible channels
903  */
904 int
il_init_channel_map(struct il_priv * il)905 il_init_channel_map(struct il_priv *il)
906 {
907 	int eeprom_ch_count = 0;
908 	const u8 *eeprom_ch_idx = NULL;
909 	const struct il_eeprom_channel *eeprom_ch_info = NULL;
910 	int band, ch;
911 	struct il_channel_info *ch_info;
912 
913 	if (il->channel_count) {
914 		D_EEPROM("Channel map already initialized.\n");
915 		return 0;
916 	}
917 
918 	D_EEPROM("Initializing regulatory info from EEPROM\n");
919 
920 	il->channel_count =
921 	    ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
922 	    ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
923 	    ARRAY_SIZE(il_eeprom_band_5);
924 
925 	D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
926 
927 	il->channel_info =
928 	    kzalloc(sizeof(struct il_channel_info) * il->channel_count,
929 		    GFP_KERNEL);
930 	if (!il->channel_info) {
931 		IL_ERR("Could not allocate channel_info\n");
932 		il->channel_count = 0;
933 		return -ENOMEM;
934 	}
935 
936 	ch_info = il->channel_info;
937 
938 	/* Loop through the 5 EEPROM bands adding them in order to the
939 	 * channel map we maintain (that contains additional information than
940 	 * what just in the EEPROM) */
941 	for (band = 1; band <= 5; band++) {
942 
943 		il_init_band_reference(il, band, &eeprom_ch_count,
944 				       &eeprom_ch_info, &eeprom_ch_idx);
945 
946 		/* Loop through each band adding each of the channels */
947 		for (ch = 0; ch < eeprom_ch_count; ch++) {
948 			ch_info->channel = eeprom_ch_idx[ch];
949 			ch_info->band =
950 			    (band ==
951 			     1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
952 
953 			/* permanently store EEPROM's channel regulatory flags
954 			 *   and max power in channel info database. */
955 			ch_info->eeprom = eeprom_ch_info[ch];
956 
957 			/* Copy the run-time flags so they are there even on
958 			 * invalid channels */
959 			ch_info->flags = eeprom_ch_info[ch].flags;
960 			/* First write that ht40 is not enabled, and then enable
961 			 * one by one */
962 			ch_info->ht40_extension_channel =
963 			    IEEE80211_CHAN_NO_HT40;
964 
965 			if (!(il_is_channel_valid(ch_info))) {
966 				D_EEPROM("Ch. %d Flags %x [%sGHz] - "
967 					 "No traffic\n", ch_info->channel,
968 					 ch_info->flags,
969 					 il_is_channel_a_band(ch_info) ? "5.2" :
970 					 "2.4");
971 				ch_info++;
972 				continue;
973 			}
974 
975 			/* Initialize regulatory-based run-time data */
976 			ch_info->max_power_avg = ch_info->curr_txpow =
977 			    eeprom_ch_info[ch].max_power_avg;
978 			ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
979 			ch_info->min_power = 0;
980 
981 			D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
982 				 " Ad-Hoc %ssupported\n", ch_info->channel,
983 				 il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
984 				 CHECK_AND_PRINT_I(VALID),
985 				 CHECK_AND_PRINT_I(IBSS),
986 				 CHECK_AND_PRINT_I(ACTIVE),
987 				 CHECK_AND_PRINT_I(RADAR),
988 				 CHECK_AND_PRINT_I(WIDE),
989 				 CHECK_AND_PRINT_I(DFS),
990 				 eeprom_ch_info[ch].flags,
991 				 eeprom_ch_info[ch].max_power_avg,
992 				 ((eeprom_ch_info[ch].
993 				   flags & EEPROM_CHANNEL_IBSS) &&
994 				  !(eeprom_ch_info[ch].
995 				    flags & EEPROM_CHANNEL_RADAR)) ? "" :
996 				 "not ");
997 
998 			ch_info++;
999 		}
1000 	}
1001 
1002 	/* Check if we do have HT40 channels */
1003 	if (il->cfg->regulatory_bands[5] == EEPROM_REGULATORY_BAND_NO_HT40 &&
1004 	    il->cfg->regulatory_bands[6] == EEPROM_REGULATORY_BAND_NO_HT40)
1005 		return 0;
1006 
1007 	/* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
1008 	for (band = 6; band <= 7; band++) {
1009 		enum ieee80211_band ieeeband;
1010 
1011 		il_init_band_reference(il, band, &eeprom_ch_count,
1012 				       &eeprom_ch_info, &eeprom_ch_idx);
1013 
1014 		/* EEPROM band 6 is 2.4, band 7 is 5 GHz */
1015 		ieeeband =
1016 		    (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
1017 
1018 		/* Loop through each band adding each of the channels */
1019 		for (ch = 0; ch < eeprom_ch_count; ch++) {
1020 			/* Set up driver's info for lower half */
1021 			il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
1022 					      &eeprom_ch_info[ch],
1023 					      IEEE80211_CHAN_NO_HT40PLUS);
1024 
1025 			/* Set up driver's info for upper half */
1026 			il_mod_ht40_chan_info(il, ieeeband,
1027 					      eeprom_ch_idx[ch] + 4,
1028 					      &eeprom_ch_info[ch],
1029 					      IEEE80211_CHAN_NO_HT40MINUS);
1030 		}
1031 	}
1032 
1033 	return 0;
1034 }
1035 EXPORT_SYMBOL(il_init_channel_map);
1036 
1037 /*
1038  * il_free_channel_map - undo allocations in il_init_channel_map
1039  */
1040 void
il_free_channel_map(struct il_priv * il)1041 il_free_channel_map(struct il_priv *il)
1042 {
1043 	kfree(il->channel_info);
1044 	il->channel_count = 0;
1045 }
1046 EXPORT_SYMBOL(il_free_channel_map);
1047 
1048 /**
1049  * il_get_channel_info - Find driver's ilate channel info
1050  *
1051  * Based on band and channel number.
1052  */
1053 const struct il_channel_info *
il_get_channel_info(const struct il_priv * il,enum ieee80211_band band,u16 channel)1054 il_get_channel_info(const struct il_priv *il, enum ieee80211_band band,
1055 		    u16 channel)
1056 {
1057 	int i;
1058 
1059 	switch (band) {
1060 	case IEEE80211_BAND_5GHZ:
1061 		for (i = 14; i < il->channel_count; i++) {
1062 			if (il->channel_info[i].channel == channel)
1063 				return &il->channel_info[i];
1064 		}
1065 		break;
1066 	case IEEE80211_BAND_2GHZ:
1067 		if (channel >= 1 && channel <= 14)
1068 			return &il->channel_info[channel - 1];
1069 		break;
1070 	default:
1071 		BUG();
1072 	}
1073 
1074 	return NULL;
1075 }
1076 EXPORT_SYMBOL(il_get_channel_info);
1077 
1078 /*
1079  * Setting power level allows the card to go to sleep when not busy.
1080  *
1081  * We calculate a sleep command based on the required latency, which
1082  * we get from mac80211. In order to handle thermal throttling, we can
1083  * also use pre-defined power levels.
1084  */
1085 
1086 /*
1087  * This defines the old power levels. They are still used by default
1088  * (level 1) and for thermal throttle (levels 3 through 5)
1089  */
1090 
1091 struct il_power_vec_entry {
1092 	struct il_powertable_cmd cmd;
1093 	u8 no_dtim;		/* number of skip dtim */
1094 };
1095 
1096 static void
il_power_sleep_cam_cmd(struct il_priv * il,struct il_powertable_cmd * cmd)1097 il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
1098 {
1099 	memset(cmd, 0, sizeof(*cmd));
1100 
1101 	if (il->power_data.pci_pm)
1102 		cmd->flags |= IL_POWER_PCI_PM_MSK;
1103 
1104 	D_POWER("Sleep command for CAM\n");
1105 }
1106 
1107 static int
il_set_power(struct il_priv * il,struct il_powertable_cmd * cmd)1108 il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
1109 {
1110 	D_POWER("Sending power/sleep command\n");
1111 	D_POWER("Flags value = 0x%08X\n", cmd->flags);
1112 	D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
1113 	D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
1114 	D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
1115 		le32_to_cpu(cmd->sleep_interval[0]),
1116 		le32_to_cpu(cmd->sleep_interval[1]),
1117 		le32_to_cpu(cmd->sleep_interval[2]),
1118 		le32_to_cpu(cmd->sleep_interval[3]),
1119 		le32_to_cpu(cmd->sleep_interval[4]));
1120 
1121 	return il_send_cmd_pdu(il, C_POWER_TBL,
1122 			       sizeof(struct il_powertable_cmd), cmd);
1123 }
1124 
1125 static int
il_power_set_mode(struct il_priv * il,struct il_powertable_cmd * cmd,bool force)1126 il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
1127 {
1128 	int ret;
1129 	bool update_chains;
1130 
1131 	lockdep_assert_held(&il->mutex);
1132 
1133 	/* Don't update the RX chain when chain noise calibration is running */
1134 	update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
1135 	    il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
1136 
1137 	if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
1138 		return 0;
1139 
1140 	if (!il_is_ready_rf(il))
1141 		return -EIO;
1142 
1143 	/* scan complete use sleep_power_next, need to be updated */
1144 	memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
1145 	if (test_bit(S_SCANNING, &il->status) && !force) {
1146 		D_INFO("Defer power set mode while scanning\n");
1147 		return 0;
1148 	}
1149 
1150 	if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
1151 		set_bit(S_POWER_PMI, &il->status);
1152 
1153 	ret = il_set_power(il, cmd);
1154 	if (!ret) {
1155 		if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
1156 			clear_bit(S_POWER_PMI, &il->status);
1157 
1158 		if (il->ops->update_chain_flags && update_chains)
1159 			il->ops->update_chain_flags(il);
1160 		else if (il->ops->update_chain_flags)
1161 			D_POWER("Cannot update the power, chain noise "
1162 				"calibration running: %d\n",
1163 				il->chain_noise_data.state);
1164 
1165 		memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
1166 	} else
1167 		IL_ERR("set power fail, ret = %d", ret);
1168 
1169 	return ret;
1170 }
1171 
1172 int
il_power_update_mode(struct il_priv * il,bool force)1173 il_power_update_mode(struct il_priv *il, bool force)
1174 {
1175 	struct il_powertable_cmd cmd;
1176 
1177 	il_power_sleep_cam_cmd(il, &cmd);
1178 	return il_power_set_mode(il, &cmd, force);
1179 }
1180 EXPORT_SYMBOL(il_power_update_mode);
1181 
1182 /* initialize to default */
1183 void
il_power_initialize(struct il_priv * il)1184 il_power_initialize(struct il_priv *il)
1185 {
1186 	u16 lctl;
1187 
1188 	pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
1189 	il->power_data.pci_pm = !(lctl & PCI_EXP_LNKCTL_ASPM_L0S);
1190 
1191 	il->power_data.debug_sleep_level_override = -1;
1192 
1193 	memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
1194 }
1195 EXPORT_SYMBOL(il_power_initialize);
1196 
1197 /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
1198  * sending probe req.  This should be set long enough to hear probe responses
1199  * from more than one AP.  */
1200 #define IL_ACTIVE_DWELL_TIME_24    (30)	/* all times in msec */
1201 #define IL_ACTIVE_DWELL_TIME_52    (20)
1202 
1203 #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
1204 #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
1205 
1206 /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
1207  * Must be set longer than active dwell time.
1208  * For the most reliable scan, set > AP beacon interval (typically 100msec). */
1209 #define IL_PASSIVE_DWELL_TIME_24   (20)	/* all times in msec */
1210 #define IL_PASSIVE_DWELL_TIME_52   (10)
1211 #define IL_PASSIVE_DWELL_BASE      (100)
1212 #define IL_CHANNEL_TUNE_TIME       5
1213 
1214 static int
il_send_scan_abort(struct il_priv * il)1215 il_send_scan_abort(struct il_priv *il)
1216 {
1217 	int ret;
1218 	struct il_rx_pkt *pkt;
1219 	struct il_host_cmd cmd = {
1220 		.id = C_SCAN_ABORT,
1221 		.flags = CMD_WANT_SKB,
1222 	};
1223 
1224 	/* Exit instantly with error when device is not ready
1225 	 * to receive scan abort command or it does not perform
1226 	 * hardware scan currently */
1227 	if (!test_bit(S_READY, &il->status) ||
1228 	    !test_bit(S_GEO_CONFIGURED, &il->status) ||
1229 	    !test_bit(S_SCAN_HW, &il->status) ||
1230 	    test_bit(S_FW_ERROR, &il->status) ||
1231 	    test_bit(S_EXIT_PENDING, &il->status))
1232 		return -EIO;
1233 
1234 	ret = il_send_cmd_sync(il, &cmd);
1235 	if (ret)
1236 		return ret;
1237 
1238 	pkt = (struct il_rx_pkt *)cmd.reply_page;
1239 	if (pkt->u.status != CAN_ABORT_STATUS) {
1240 		/* The scan abort will return 1 for success or
1241 		 * 2 for "failure".  A failure condition can be
1242 		 * due to simply not being in an active scan which
1243 		 * can occur if we send the scan abort before we
1244 		 * the microcode has notified us that a scan is
1245 		 * completed. */
1246 		D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
1247 		ret = -EIO;
1248 	}
1249 
1250 	il_free_pages(il, cmd.reply_page);
1251 	return ret;
1252 }
1253 
1254 static void
il_complete_scan(struct il_priv * il,bool aborted)1255 il_complete_scan(struct il_priv *il, bool aborted)
1256 {
1257 	/* check if scan was requested from mac80211 */
1258 	if (il->scan_request) {
1259 		D_SCAN("Complete scan in mac80211\n");
1260 		ieee80211_scan_completed(il->hw, aborted);
1261 	}
1262 
1263 	il->scan_vif = NULL;
1264 	il->scan_request = NULL;
1265 }
1266 
1267 void
il_force_scan_end(struct il_priv * il)1268 il_force_scan_end(struct il_priv *il)
1269 {
1270 	lockdep_assert_held(&il->mutex);
1271 
1272 	if (!test_bit(S_SCANNING, &il->status)) {
1273 		D_SCAN("Forcing scan end while not scanning\n");
1274 		return;
1275 	}
1276 
1277 	D_SCAN("Forcing scan end\n");
1278 	clear_bit(S_SCANNING, &il->status);
1279 	clear_bit(S_SCAN_HW, &il->status);
1280 	clear_bit(S_SCAN_ABORTING, &il->status);
1281 	il_complete_scan(il, true);
1282 }
1283 
1284 static void
il_do_scan_abort(struct il_priv * il)1285 il_do_scan_abort(struct il_priv *il)
1286 {
1287 	int ret;
1288 
1289 	lockdep_assert_held(&il->mutex);
1290 
1291 	if (!test_bit(S_SCANNING, &il->status)) {
1292 		D_SCAN("Not performing scan to abort\n");
1293 		return;
1294 	}
1295 
1296 	if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
1297 		D_SCAN("Scan abort in progress\n");
1298 		return;
1299 	}
1300 
1301 	ret = il_send_scan_abort(il);
1302 	if (ret) {
1303 		D_SCAN("Send scan abort failed %d\n", ret);
1304 		il_force_scan_end(il);
1305 	} else
1306 		D_SCAN("Successfully send scan abort\n");
1307 }
1308 
1309 /**
1310  * il_scan_cancel - Cancel any currently executing HW scan
1311  */
1312 int
il_scan_cancel(struct il_priv * il)1313 il_scan_cancel(struct il_priv *il)
1314 {
1315 	D_SCAN("Queuing abort scan\n");
1316 	queue_work(il->workqueue, &il->abort_scan);
1317 	return 0;
1318 }
1319 EXPORT_SYMBOL(il_scan_cancel);
1320 
1321 /**
1322  * il_scan_cancel_timeout - Cancel any currently executing HW scan
1323  * @ms: amount of time to wait (in milliseconds) for scan to abort
1324  *
1325  */
1326 int
il_scan_cancel_timeout(struct il_priv * il,unsigned long ms)1327 il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
1328 {
1329 	unsigned long timeout = jiffies + msecs_to_jiffies(ms);
1330 
1331 	lockdep_assert_held(&il->mutex);
1332 
1333 	D_SCAN("Scan cancel timeout\n");
1334 
1335 	il_do_scan_abort(il);
1336 
1337 	while (time_before_eq(jiffies, timeout)) {
1338 		if (!test_bit(S_SCAN_HW, &il->status))
1339 			break;
1340 		msleep(20);
1341 	}
1342 
1343 	return test_bit(S_SCAN_HW, &il->status);
1344 }
1345 EXPORT_SYMBOL(il_scan_cancel_timeout);
1346 
1347 /* Service response to C_SCAN (0x80) */
1348 static void
il_hdl_scan(struct il_priv * il,struct il_rx_buf * rxb)1349 il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
1350 {
1351 #ifdef CONFIG_IWLEGACY_DEBUG
1352 	struct il_rx_pkt *pkt = rxb_addr(rxb);
1353 	struct il_scanreq_notification *notif =
1354 	    (struct il_scanreq_notification *)pkt->u.raw;
1355 
1356 	D_SCAN("Scan request status = 0x%x\n", notif->status);
1357 #endif
1358 }
1359 
1360 /* Service N_SCAN_START (0x82) */
1361 static void
il_hdl_scan_start(struct il_priv * il,struct il_rx_buf * rxb)1362 il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
1363 {
1364 	struct il_rx_pkt *pkt = rxb_addr(rxb);
1365 	struct il_scanstart_notification *notif =
1366 	    (struct il_scanstart_notification *)pkt->u.raw;
1367 	il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
1368 	D_SCAN("Scan start: " "%d [802.11%s] "
1369 	       "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
1370 	       notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
1371 	       le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
1372 }
1373 
1374 /* Service N_SCAN_RESULTS (0x83) */
1375 static void
il_hdl_scan_results(struct il_priv * il,struct il_rx_buf * rxb)1376 il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
1377 {
1378 #ifdef CONFIG_IWLEGACY_DEBUG
1379 	struct il_rx_pkt *pkt = rxb_addr(rxb);
1380 	struct il_scanresults_notification *notif =
1381 	    (struct il_scanresults_notification *)pkt->u.raw;
1382 
1383 	D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
1384 	       "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
1385 	       le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
1386 	       le32_to_cpu(notif->stats[0]),
1387 	       le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
1388 #endif
1389 }
1390 
1391 /* Service N_SCAN_COMPLETE (0x84) */
1392 static void
il_hdl_scan_complete(struct il_priv * il,struct il_rx_buf * rxb)1393 il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
1394 {
1395 
1396 #ifdef CONFIG_IWLEGACY_DEBUG
1397 	struct il_rx_pkt *pkt = rxb_addr(rxb);
1398 	struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
1399 #endif
1400 
1401 	D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
1402 	       scan_notif->scanned_channels, scan_notif->tsf_low,
1403 	       scan_notif->tsf_high, scan_notif->status);
1404 
1405 	/* The HW is no longer scanning */
1406 	clear_bit(S_SCAN_HW, &il->status);
1407 
1408 	D_SCAN("Scan on %sGHz took %dms\n",
1409 	       (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
1410 	       jiffies_to_msecs(jiffies - il->scan_start));
1411 
1412 	queue_work(il->workqueue, &il->scan_completed);
1413 }
1414 
1415 void
il_setup_rx_scan_handlers(struct il_priv * il)1416 il_setup_rx_scan_handlers(struct il_priv *il)
1417 {
1418 	/* scan handlers */
1419 	il->handlers[C_SCAN] = il_hdl_scan;
1420 	il->handlers[N_SCAN_START] = il_hdl_scan_start;
1421 	il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
1422 	il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
1423 }
1424 EXPORT_SYMBOL(il_setup_rx_scan_handlers);
1425 
1426 u16
il_get_active_dwell_time(struct il_priv * il,enum ieee80211_band band,u8 n_probes)1427 il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
1428 			 u8 n_probes)
1429 {
1430 	if (band == IEEE80211_BAND_5GHZ)
1431 		return IL_ACTIVE_DWELL_TIME_52 +
1432 		    IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
1433 	else
1434 		return IL_ACTIVE_DWELL_TIME_24 +
1435 		    IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
1436 }
1437 EXPORT_SYMBOL(il_get_active_dwell_time);
1438 
1439 u16
il_get_passive_dwell_time(struct il_priv * il,enum ieee80211_band band,struct ieee80211_vif * vif)1440 il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
1441 			  struct ieee80211_vif *vif)
1442 {
1443 	u16 value;
1444 
1445 	u16 passive =
1446 	    (band ==
1447 	     IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
1448 	    IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
1449 	    IL_PASSIVE_DWELL_TIME_52;
1450 
1451 	if (il_is_any_associated(il)) {
1452 		/*
1453 		 * If we're associated, we clamp the maximum passive
1454 		 * dwell time to be 98% of the smallest beacon interval
1455 		 * (minus 2 * channel tune time)
1456 		 */
1457 		value = il->vif ? il->vif->bss_conf.beacon_int : 0;
1458 		if (value > IL_PASSIVE_DWELL_BASE || !value)
1459 			value = IL_PASSIVE_DWELL_BASE;
1460 		value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
1461 		passive = min(value, passive);
1462 	}
1463 
1464 	return passive;
1465 }
1466 EXPORT_SYMBOL(il_get_passive_dwell_time);
1467 
1468 void
il_init_scan_params(struct il_priv * il)1469 il_init_scan_params(struct il_priv *il)
1470 {
1471 	u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
1472 	if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
1473 		il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
1474 	if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
1475 		il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
1476 }
1477 EXPORT_SYMBOL(il_init_scan_params);
1478 
1479 static int
il_scan_initiate(struct il_priv * il,struct ieee80211_vif * vif)1480 il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
1481 {
1482 	int ret;
1483 
1484 	lockdep_assert_held(&il->mutex);
1485 
1486 	cancel_delayed_work(&il->scan_check);
1487 
1488 	if (!il_is_ready_rf(il)) {
1489 		IL_WARN("Request scan called when driver not ready.\n");
1490 		return -EIO;
1491 	}
1492 
1493 	if (test_bit(S_SCAN_HW, &il->status)) {
1494 		D_SCAN("Multiple concurrent scan requests in parallel.\n");
1495 		return -EBUSY;
1496 	}
1497 
1498 	if (test_bit(S_SCAN_ABORTING, &il->status)) {
1499 		D_SCAN("Scan request while abort pending.\n");
1500 		return -EBUSY;
1501 	}
1502 
1503 	D_SCAN("Starting scan...\n");
1504 
1505 	set_bit(S_SCANNING, &il->status);
1506 	il->scan_start = jiffies;
1507 
1508 	ret = il->ops->request_scan(il, vif);
1509 	if (ret) {
1510 		clear_bit(S_SCANNING, &il->status);
1511 		return ret;
1512 	}
1513 
1514 	queue_delayed_work(il->workqueue, &il->scan_check,
1515 			   IL_SCAN_CHECK_WATCHDOG);
1516 
1517 	return 0;
1518 }
1519 
1520 int
il_mac_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_scan_request * req)1521 il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1522 	       struct cfg80211_scan_request *req)
1523 {
1524 	struct il_priv *il = hw->priv;
1525 	int ret;
1526 
1527 	if (req->n_channels == 0) {
1528 		IL_ERR("Can not scan on no channels.\n");
1529 		return -EINVAL;
1530 	}
1531 
1532 	mutex_lock(&il->mutex);
1533 	D_MAC80211("enter\n");
1534 
1535 	if (test_bit(S_SCANNING, &il->status)) {
1536 		D_SCAN("Scan already in progress.\n");
1537 		ret = -EAGAIN;
1538 		goto out_unlock;
1539 	}
1540 
1541 	/* mac80211 will only ask for one band at a time */
1542 	il->scan_request = req;
1543 	il->scan_vif = vif;
1544 	il->scan_band = req->channels[0]->band;
1545 
1546 	ret = il_scan_initiate(il, vif);
1547 
1548 out_unlock:
1549 	D_MAC80211("leave ret %d\n", ret);
1550 	mutex_unlock(&il->mutex);
1551 
1552 	return ret;
1553 }
1554 EXPORT_SYMBOL(il_mac_hw_scan);
1555 
1556 static void
il_bg_scan_check(struct work_struct * data)1557 il_bg_scan_check(struct work_struct *data)
1558 {
1559 	struct il_priv *il =
1560 	    container_of(data, struct il_priv, scan_check.work);
1561 
1562 	D_SCAN("Scan check work\n");
1563 
1564 	/* Since we are here firmware does not finish scan and
1565 	 * most likely is in bad shape, so we don't bother to
1566 	 * send abort command, just force scan complete to mac80211 */
1567 	mutex_lock(&il->mutex);
1568 	il_force_scan_end(il);
1569 	mutex_unlock(&il->mutex);
1570 }
1571 
1572 /**
1573  * il_fill_probe_req - fill in all required fields and IE for probe request
1574  */
1575 
1576 u16
il_fill_probe_req(struct il_priv * il,struct ieee80211_mgmt * frame,const u8 * ta,const u8 * ies,int ie_len,int left)1577 il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
1578 		  const u8 *ta, const u8 *ies, int ie_len, int left)
1579 {
1580 	int len = 0;
1581 	u8 *pos = NULL;
1582 
1583 	/* Make sure there is enough space for the probe request,
1584 	 * two mandatory IEs and the data */
1585 	left -= 24;
1586 	if (left < 0)
1587 		return 0;
1588 
1589 	frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
1590 	eth_broadcast_addr(frame->da);
1591 	memcpy(frame->sa, ta, ETH_ALEN);
1592 	eth_broadcast_addr(frame->bssid);
1593 	frame->seq_ctrl = 0;
1594 
1595 	len += 24;
1596 
1597 	/* ...next IE... */
1598 	pos = &frame->u.probe_req.variable[0];
1599 
1600 	/* fill in our indirect SSID IE */
1601 	left -= 2;
1602 	if (left < 0)
1603 		return 0;
1604 	*pos++ = WLAN_EID_SSID;
1605 	*pos++ = 0;
1606 
1607 	len += 2;
1608 
1609 	if (WARN_ON(left < ie_len))
1610 		return len;
1611 
1612 	if (ies && ie_len) {
1613 		memcpy(pos, ies, ie_len);
1614 		len += ie_len;
1615 	}
1616 
1617 	return (u16) len;
1618 }
1619 EXPORT_SYMBOL(il_fill_probe_req);
1620 
1621 static void
il_bg_abort_scan(struct work_struct * work)1622 il_bg_abort_scan(struct work_struct *work)
1623 {
1624 	struct il_priv *il = container_of(work, struct il_priv, abort_scan);
1625 
1626 	D_SCAN("Abort scan work\n");
1627 
1628 	/* We keep scan_check work queued in case when firmware will not
1629 	 * report back scan completed notification */
1630 	mutex_lock(&il->mutex);
1631 	il_scan_cancel_timeout(il, 200);
1632 	mutex_unlock(&il->mutex);
1633 }
1634 
1635 static void
il_bg_scan_completed(struct work_struct * work)1636 il_bg_scan_completed(struct work_struct *work)
1637 {
1638 	struct il_priv *il = container_of(work, struct il_priv, scan_completed);
1639 	bool aborted;
1640 
1641 	D_SCAN("Completed scan.\n");
1642 
1643 	cancel_delayed_work(&il->scan_check);
1644 
1645 	mutex_lock(&il->mutex);
1646 
1647 	aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
1648 	if (aborted)
1649 		D_SCAN("Aborted scan completed.\n");
1650 
1651 	if (!test_and_clear_bit(S_SCANNING, &il->status)) {
1652 		D_SCAN("Scan already completed.\n");
1653 		goto out_settings;
1654 	}
1655 
1656 	il_complete_scan(il, aborted);
1657 
1658 out_settings:
1659 	/* Can we still talk to firmware ? */
1660 	if (!il_is_ready_rf(il))
1661 		goto out;
1662 
1663 	/*
1664 	 * We do not commit power settings while scan is pending,
1665 	 * do it now if the settings changed.
1666 	 */
1667 	il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
1668 	il_set_tx_power(il, il->tx_power_next, false);
1669 
1670 	il->ops->post_scan(il);
1671 
1672 out:
1673 	mutex_unlock(&il->mutex);
1674 }
1675 
1676 void
il_setup_scan_deferred_work(struct il_priv * il)1677 il_setup_scan_deferred_work(struct il_priv *il)
1678 {
1679 	INIT_WORK(&il->scan_completed, il_bg_scan_completed);
1680 	INIT_WORK(&il->abort_scan, il_bg_abort_scan);
1681 	INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
1682 }
1683 EXPORT_SYMBOL(il_setup_scan_deferred_work);
1684 
1685 void
il_cancel_scan_deferred_work(struct il_priv * il)1686 il_cancel_scan_deferred_work(struct il_priv *il)
1687 {
1688 	cancel_work_sync(&il->abort_scan);
1689 	cancel_work_sync(&il->scan_completed);
1690 
1691 	if (cancel_delayed_work_sync(&il->scan_check)) {
1692 		mutex_lock(&il->mutex);
1693 		il_force_scan_end(il);
1694 		mutex_unlock(&il->mutex);
1695 	}
1696 }
1697 EXPORT_SYMBOL(il_cancel_scan_deferred_work);
1698 
1699 /* il->sta_lock must be held */
1700 static void
il_sta_ucode_activate(struct il_priv * il,u8 sta_id)1701 il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
1702 {
1703 
1704 	if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
1705 		IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
1706 		       sta_id, il->stations[sta_id].sta.sta.addr);
1707 
1708 	if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
1709 		D_ASSOC("STA id %u addr %pM already present"
1710 			" in uCode (according to driver)\n", sta_id,
1711 			il->stations[sta_id].sta.sta.addr);
1712 	} else {
1713 		il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
1714 		D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
1715 			il->stations[sta_id].sta.sta.addr);
1716 	}
1717 }
1718 
1719 static int
il_process_add_sta_resp(struct il_priv * il,struct il_addsta_cmd * addsta,struct il_rx_pkt * pkt,bool sync)1720 il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
1721 			struct il_rx_pkt *pkt, bool sync)
1722 {
1723 	u8 sta_id = addsta->sta.sta_id;
1724 	unsigned long flags;
1725 	int ret = -EIO;
1726 
1727 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
1728 		IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
1729 		return ret;
1730 	}
1731 
1732 	D_INFO("Processing response for adding station %u\n", sta_id);
1733 
1734 	spin_lock_irqsave(&il->sta_lock, flags);
1735 
1736 	switch (pkt->u.add_sta.status) {
1737 	case ADD_STA_SUCCESS_MSK:
1738 		D_INFO("C_ADD_STA PASSED\n");
1739 		il_sta_ucode_activate(il, sta_id);
1740 		ret = 0;
1741 		break;
1742 	case ADD_STA_NO_ROOM_IN_TBL:
1743 		IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
1744 		break;
1745 	case ADD_STA_NO_BLOCK_ACK_RESOURCE:
1746 		IL_ERR("Adding station %d failed, no block ack resource.\n",
1747 		       sta_id);
1748 		break;
1749 	case ADD_STA_MODIFY_NON_EXIST_STA:
1750 		IL_ERR("Attempting to modify non-existing station %d\n",
1751 		       sta_id);
1752 		break;
1753 	default:
1754 		D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
1755 		break;
1756 	}
1757 
1758 	D_INFO("%s station id %u addr %pM\n",
1759 	       il->stations[sta_id].sta.mode ==
1760 	       STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
1761 	       il->stations[sta_id].sta.sta.addr);
1762 
1763 	/*
1764 	 * XXX: The MAC address in the command buffer is often changed from
1765 	 * the original sent to the device. That is, the MAC address
1766 	 * written to the command buffer often is not the same MAC address
1767 	 * read from the command buffer when the command returns. This
1768 	 * issue has not yet been resolved and this debugging is left to
1769 	 * observe the problem.
1770 	 */
1771 	D_INFO("%s station according to cmd buffer %pM\n",
1772 	       il->stations[sta_id].sta.mode ==
1773 	       STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
1774 	spin_unlock_irqrestore(&il->sta_lock, flags);
1775 
1776 	return ret;
1777 }
1778 
1779 static void
il_add_sta_callback(struct il_priv * il,struct il_device_cmd * cmd,struct il_rx_pkt * pkt)1780 il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
1781 		    struct il_rx_pkt *pkt)
1782 {
1783 	struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
1784 
1785 	il_process_add_sta_resp(il, addsta, pkt, false);
1786 
1787 }
1788 
1789 int
il_send_add_sta(struct il_priv * il,struct il_addsta_cmd * sta,u8 flags)1790 il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
1791 {
1792 	struct il_rx_pkt *pkt = NULL;
1793 	int ret = 0;
1794 	u8 data[sizeof(*sta)];
1795 	struct il_host_cmd cmd = {
1796 		.id = C_ADD_STA,
1797 		.flags = flags,
1798 		.data = data,
1799 	};
1800 	u8 sta_id __maybe_unused = sta->sta.sta_id;
1801 
1802 	D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
1803 	       flags & CMD_ASYNC ? "a" : "");
1804 
1805 	if (flags & CMD_ASYNC)
1806 		cmd.callback = il_add_sta_callback;
1807 	else {
1808 		cmd.flags |= CMD_WANT_SKB;
1809 		might_sleep();
1810 	}
1811 
1812 	cmd.len = il->ops->build_addsta_hcmd(sta, data);
1813 	ret = il_send_cmd(il, &cmd);
1814 
1815 	if (ret || (flags & CMD_ASYNC))
1816 		return ret;
1817 
1818 	if (ret == 0) {
1819 		pkt = (struct il_rx_pkt *)cmd.reply_page;
1820 		ret = il_process_add_sta_resp(il, sta, pkt, true);
1821 	}
1822 	il_free_pages(il, cmd.reply_page);
1823 
1824 	return ret;
1825 }
1826 EXPORT_SYMBOL(il_send_add_sta);
1827 
1828 static void
il_set_ht_add_station(struct il_priv * il,u8 idx,struct ieee80211_sta * sta)1829 il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
1830 {
1831 	struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
1832 	__le32 sta_flags;
1833 
1834 	if (!sta || !sta_ht_inf->ht_supported)
1835 		goto done;
1836 
1837 	D_ASSOC("spatial multiplexing power save mode: %s\n",
1838 		(sta->smps_mode == IEEE80211_SMPS_STATIC) ? "static" :
1839 		(sta->smps_mode == IEEE80211_SMPS_DYNAMIC) ? "dynamic" :
1840 		"disabled");
1841 
1842 	sta_flags = il->stations[idx].sta.station_flags;
1843 
1844 	sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
1845 
1846 	switch (sta->smps_mode) {
1847 	case IEEE80211_SMPS_STATIC:
1848 		sta_flags |= STA_FLG_MIMO_DIS_MSK;
1849 		break;
1850 	case IEEE80211_SMPS_DYNAMIC:
1851 		sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
1852 		break;
1853 	case IEEE80211_SMPS_OFF:
1854 		break;
1855 	default:
1856 		IL_WARN("Invalid MIMO PS mode %d\n", sta->smps_mode);
1857 		break;
1858 	}
1859 
1860 	sta_flags |=
1861 	    cpu_to_le32((u32) sta_ht_inf->
1862 			ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
1863 
1864 	sta_flags |=
1865 	    cpu_to_le32((u32) sta_ht_inf->
1866 			ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
1867 
1868 	if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
1869 		sta_flags |= STA_FLG_HT40_EN_MSK;
1870 	else
1871 		sta_flags &= ~STA_FLG_HT40_EN_MSK;
1872 
1873 	il->stations[idx].sta.station_flags = sta_flags;
1874 done:
1875 	return;
1876 }
1877 
1878 /**
1879  * il_prep_station - Prepare station information for addition
1880  *
1881  * should be called with sta_lock held
1882  */
1883 u8
il_prep_station(struct il_priv * il,const u8 * addr,bool is_ap,struct ieee80211_sta * sta)1884 il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
1885 		struct ieee80211_sta *sta)
1886 {
1887 	struct il_station_entry *station;
1888 	int i;
1889 	u8 sta_id = IL_INVALID_STATION;
1890 	u16 rate;
1891 
1892 	if (is_ap)
1893 		sta_id = IL_AP_ID;
1894 	else if (is_broadcast_ether_addr(addr))
1895 		sta_id = il->hw_params.bcast_id;
1896 	else
1897 		for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
1898 			if (ether_addr_equal(il->stations[i].sta.sta.addr,
1899 					     addr)) {
1900 				sta_id = i;
1901 				break;
1902 			}
1903 
1904 			if (!il->stations[i].used &&
1905 			    sta_id == IL_INVALID_STATION)
1906 				sta_id = i;
1907 		}
1908 
1909 	/*
1910 	 * These two conditions have the same outcome, but keep them
1911 	 * separate
1912 	 */
1913 	if (unlikely(sta_id == IL_INVALID_STATION))
1914 		return sta_id;
1915 
1916 	/*
1917 	 * uCode is not able to deal with multiple requests to add a
1918 	 * station. Keep track if one is in progress so that we do not send
1919 	 * another.
1920 	 */
1921 	if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1922 		D_INFO("STA %d already in process of being added.\n", sta_id);
1923 		return sta_id;
1924 	}
1925 
1926 	if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1927 	    (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
1928 	    ether_addr_equal(il->stations[sta_id].sta.sta.addr, addr)) {
1929 		D_ASSOC("STA %d (%pM) already added, not adding again.\n",
1930 			sta_id, addr);
1931 		return sta_id;
1932 	}
1933 
1934 	station = &il->stations[sta_id];
1935 	station->used = IL_STA_DRIVER_ACTIVE;
1936 	D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
1937 	il->num_stations++;
1938 
1939 	/* Set up the C_ADD_STA command to send to device */
1940 	memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
1941 	memcpy(station->sta.sta.addr, addr, ETH_ALEN);
1942 	station->sta.mode = 0;
1943 	station->sta.sta.sta_id = sta_id;
1944 	station->sta.station_flags = 0;
1945 
1946 	/*
1947 	 * OK to call unconditionally, since local stations (IBSS BSSID
1948 	 * STA and broadcast STA) pass in a NULL sta, and mac80211
1949 	 * doesn't allow HT IBSS.
1950 	 */
1951 	il_set_ht_add_station(il, sta_id, sta);
1952 
1953 	/* 3945 only */
1954 	rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
1955 	/* Turn on both antennas for the station... */
1956 	station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
1957 
1958 	return sta_id;
1959 
1960 }
1961 EXPORT_SYMBOL_GPL(il_prep_station);
1962 
1963 #define STA_WAIT_TIMEOUT (HZ/2)
1964 
1965 /**
1966  * il_add_station_common -
1967  */
1968 int
il_add_station_common(struct il_priv * il,const u8 * addr,bool is_ap,struct ieee80211_sta * sta,u8 * sta_id_r)1969 il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
1970 		      struct ieee80211_sta *sta, u8 *sta_id_r)
1971 {
1972 	unsigned long flags_spin;
1973 	int ret = 0;
1974 	u8 sta_id;
1975 	struct il_addsta_cmd sta_cmd;
1976 
1977 	*sta_id_r = 0;
1978 	spin_lock_irqsave(&il->sta_lock, flags_spin);
1979 	sta_id = il_prep_station(il, addr, is_ap, sta);
1980 	if (sta_id == IL_INVALID_STATION) {
1981 		IL_ERR("Unable to prepare station %pM for addition\n", addr);
1982 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1983 		return -EINVAL;
1984 	}
1985 
1986 	/*
1987 	 * uCode is not able to deal with multiple requests to add a
1988 	 * station. Keep track if one is in progress so that we do not send
1989 	 * another.
1990 	 */
1991 	if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
1992 		D_INFO("STA %d already in process of being added.\n", sta_id);
1993 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
1994 		return -EEXIST;
1995 	}
1996 
1997 	if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
1998 	    (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
1999 		D_ASSOC("STA %d (%pM) already added, not adding again.\n",
2000 			sta_id, addr);
2001 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2002 		return -EEXIST;
2003 	}
2004 
2005 	il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
2006 	memcpy(&sta_cmd, &il->stations[sta_id].sta,
2007 	       sizeof(struct il_addsta_cmd));
2008 	spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2009 
2010 	/* Add station to device's station table */
2011 	ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2012 	if (ret) {
2013 		spin_lock_irqsave(&il->sta_lock, flags_spin);
2014 		IL_ERR("Adding station %pM failed.\n",
2015 		       il->stations[sta_id].sta.sta.addr);
2016 		il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2017 		il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2018 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2019 	}
2020 	*sta_id_r = sta_id;
2021 	return ret;
2022 }
2023 EXPORT_SYMBOL(il_add_station_common);
2024 
2025 /**
2026  * il_sta_ucode_deactivate - deactivate ucode status for a station
2027  *
2028  * il->sta_lock must be held
2029  */
2030 static void
il_sta_ucode_deactivate(struct il_priv * il,u8 sta_id)2031 il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
2032 {
2033 	/* Ucode must be active and driver must be non active */
2034 	if ((il->stations[sta_id].
2035 	     used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
2036 	    IL_STA_UCODE_ACTIVE)
2037 		IL_ERR("removed non active STA %u\n", sta_id);
2038 
2039 	il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
2040 
2041 	memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
2042 	D_ASSOC("Removed STA %u\n", sta_id);
2043 }
2044 
2045 static int
il_send_remove_station(struct il_priv * il,const u8 * addr,int sta_id,bool temporary)2046 il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
2047 		       bool temporary)
2048 {
2049 	struct il_rx_pkt *pkt;
2050 	int ret;
2051 
2052 	unsigned long flags_spin;
2053 	struct il_rem_sta_cmd rm_sta_cmd;
2054 
2055 	struct il_host_cmd cmd = {
2056 		.id = C_REM_STA,
2057 		.len = sizeof(struct il_rem_sta_cmd),
2058 		.flags = CMD_SYNC,
2059 		.data = &rm_sta_cmd,
2060 	};
2061 
2062 	memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
2063 	rm_sta_cmd.num_sta = 1;
2064 	memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
2065 
2066 	cmd.flags |= CMD_WANT_SKB;
2067 
2068 	ret = il_send_cmd(il, &cmd);
2069 
2070 	if (ret)
2071 		return ret;
2072 
2073 	pkt = (struct il_rx_pkt *)cmd.reply_page;
2074 	if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
2075 		IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
2076 		ret = -EIO;
2077 	}
2078 
2079 	if (!ret) {
2080 		switch (pkt->u.rem_sta.status) {
2081 		case REM_STA_SUCCESS_MSK:
2082 			if (!temporary) {
2083 				spin_lock_irqsave(&il->sta_lock, flags_spin);
2084 				il_sta_ucode_deactivate(il, sta_id);
2085 				spin_unlock_irqrestore(&il->sta_lock,
2086 						       flags_spin);
2087 			}
2088 			D_ASSOC("C_REM_STA PASSED\n");
2089 			break;
2090 		default:
2091 			ret = -EIO;
2092 			IL_ERR("C_REM_STA failed\n");
2093 			break;
2094 		}
2095 	}
2096 	il_free_pages(il, cmd.reply_page);
2097 
2098 	return ret;
2099 }
2100 
2101 /**
2102  * il_remove_station - Remove driver's knowledge of station.
2103  */
2104 int
il_remove_station(struct il_priv * il,const u8 sta_id,const u8 * addr)2105 il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
2106 {
2107 	unsigned long flags;
2108 
2109 	if (!il_is_ready(il)) {
2110 		D_INFO("Unable to remove station %pM, device not ready.\n",
2111 		       addr);
2112 		/*
2113 		 * It is typical for stations to be removed when we are
2114 		 * going down. Return success since device will be down
2115 		 * soon anyway
2116 		 */
2117 		return 0;
2118 	}
2119 
2120 	D_ASSOC("Removing STA from driver:%d  %pM\n", sta_id, addr);
2121 
2122 	if (WARN_ON(sta_id == IL_INVALID_STATION))
2123 		return -EINVAL;
2124 
2125 	spin_lock_irqsave(&il->sta_lock, flags);
2126 
2127 	if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2128 		D_INFO("Removing %pM but non DRIVER active\n", addr);
2129 		goto out_err;
2130 	}
2131 
2132 	if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
2133 		D_INFO("Removing %pM but non UCODE active\n", addr);
2134 		goto out_err;
2135 	}
2136 
2137 	if (il->stations[sta_id].used & IL_STA_LOCAL) {
2138 		kfree(il->stations[sta_id].lq);
2139 		il->stations[sta_id].lq = NULL;
2140 	}
2141 
2142 	il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
2143 
2144 	il->num_stations--;
2145 
2146 	BUG_ON(il->num_stations < 0);
2147 
2148 	spin_unlock_irqrestore(&il->sta_lock, flags);
2149 
2150 	return il_send_remove_station(il, addr, sta_id, false);
2151 out_err:
2152 	spin_unlock_irqrestore(&il->sta_lock, flags);
2153 	return -EINVAL;
2154 }
2155 EXPORT_SYMBOL_GPL(il_remove_station);
2156 
2157 /**
2158  * il_clear_ucode_stations - clear ucode station table bits
2159  *
2160  * This function clears all the bits in the driver indicating
2161  * which stations are active in the ucode. Call when something
2162  * other than explicit station management would cause this in
2163  * the ucode, e.g. unassociated RXON.
2164  */
2165 void
il_clear_ucode_stations(struct il_priv * il)2166 il_clear_ucode_stations(struct il_priv *il)
2167 {
2168 	int i;
2169 	unsigned long flags_spin;
2170 	bool cleared = false;
2171 
2172 	D_INFO("Clearing ucode stations in driver\n");
2173 
2174 	spin_lock_irqsave(&il->sta_lock, flags_spin);
2175 	for (i = 0; i < il->hw_params.max_stations; i++) {
2176 		if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
2177 			D_INFO("Clearing ucode active for station %d\n", i);
2178 			il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2179 			cleared = true;
2180 		}
2181 	}
2182 	spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2183 
2184 	if (!cleared)
2185 		D_INFO("No active stations found to be cleared\n");
2186 }
2187 EXPORT_SYMBOL(il_clear_ucode_stations);
2188 
2189 /**
2190  * il_restore_stations() - Restore driver known stations to device
2191  *
2192  * All stations considered active by driver, but not present in ucode, is
2193  * restored.
2194  *
2195  * Function sleeps.
2196  */
2197 void
il_restore_stations(struct il_priv * il)2198 il_restore_stations(struct il_priv *il)
2199 {
2200 	struct il_addsta_cmd sta_cmd;
2201 	struct il_link_quality_cmd lq;
2202 	unsigned long flags_spin;
2203 	int i;
2204 	bool found = false;
2205 	int ret;
2206 	bool send_lq;
2207 
2208 	if (!il_is_ready(il)) {
2209 		D_INFO("Not ready yet, not restoring any stations.\n");
2210 		return;
2211 	}
2212 
2213 	D_ASSOC("Restoring all known stations ... start.\n");
2214 	spin_lock_irqsave(&il->sta_lock, flags_spin);
2215 	for (i = 0; i < il->hw_params.max_stations; i++) {
2216 		if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
2217 		    !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
2218 			D_ASSOC("Restoring sta %pM\n",
2219 				il->stations[i].sta.sta.addr);
2220 			il->stations[i].sta.mode = 0;
2221 			il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
2222 			found = true;
2223 		}
2224 	}
2225 
2226 	for (i = 0; i < il->hw_params.max_stations; i++) {
2227 		if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
2228 			memcpy(&sta_cmd, &il->stations[i].sta,
2229 			       sizeof(struct il_addsta_cmd));
2230 			send_lq = false;
2231 			if (il->stations[i].lq) {
2232 				memcpy(&lq, il->stations[i].lq,
2233 				       sizeof(struct il_link_quality_cmd));
2234 				send_lq = true;
2235 			}
2236 			spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2237 			ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
2238 			if (ret) {
2239 				spin_lock_irqsave(&il->sta_lock, flags_spin);
2240 				IL_ERR("Adding station %pM failed.\n",
2241 				       il->stations[i].sta.sta.addr);
2242 				il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
2243 				il->stations[i].used &=
2244 				    ~IL_STA_UCODE_INPROGRESS;
2245 				spin_unlock_irqrestore(&il->sta_lock,
2246 						       flags_spin);
2247 			}
2248 			/*
2249 			 * Rate scaling has already been initialized, send
2250 			 * current LQ command
2251 			 */
2252 			if (send_lq)
2253 				il_send_lq_cmd(il, &lq, CMD_SYNC, true);
2254 			spin_lock_irqsave(&il->sta_lock, flags_spin);
2255 			il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
2256 		}
2257 	}
2258 
2259 	spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2260 	if (!found)
2261 		D_INFO("Restoring all known stations"
2262 		       " .... no stations to be restored.\n");
2263 	else
2264 		D_INFO("Restoring all known stations" " .... complete.\n");
2265 }
2266 EXPORT_SYMBOL(il_restore_stations);
2267 
2268 int
il_get_free_ucode_key_idx(struct il_priv * il)2269 il_get_free_ucode_key_idx(struct il_priv *il)
2270 {
2271 	int i;
2272 
2273 	for (i = 0; i < il->sta_key_max_num; i++)
2274 		if (!test_and_set_bit(i, &il->ucode_key_table))
2275 			return i;
2276 
2277 	return WEP_INVALID_OFFSET;
2278 }
2279 EXPORT_SYMBOL(il_get_free_ucode_key_idx);
2280 
2281 void
il_dealloc_bcast_stations(struct il_priv * il)2282 il_dealloc_bcast_stations(struct il_priv *il)
2283 {
2284 	unsigned long flags;
2285 	int i;
2286 
2287 	spin_lock_irqsave(&il->sta_lock, flags);
2288 	for (i = 0; i < il->hw_params.max_stations; i++) {
2289 		if (!(il->stations[i].used & IL_STA_BCAST))
2290 			continue;
2291 
2292 		il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
2293 		il->num_stations--;
2294 		BUG_ON(il->num_stations < 0);
2295 		kfree(il->stations[i].lq);
2296 		il->stations[i].lq = NULL;
2297 	}
2298 	spin_unlock_irqrestore(&il->sta_lock, flags);
2299 }
2300 EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
2301 
2302 #ifdef CONFIG_IWLEGACY_DEBUG
2303 static void
il_dump_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq)2304 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2305 {
2306 	int i;
2307 	D_RATE("lq station id 0x%x\n", lq->sta_id);
2308 	D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
2309 	       lq->general_params.dual_stream_ant_msk);
2310 
2311 	for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
2312 		D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
2313 }
2314 #else
2315 static inline void
il_dump_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq)2316 il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
2317 {
2318 }
2319 #endif
2320 
2321 /**
2322  * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
2323  *
2324  * It sometimes happens when a HT rate has been in use and we
2325  * loose connectivity with AP then mac80211 will first tell us that the
2326  * current channel is not HT anymore before removing the station. In such a
2327  * scenario the RXON flags will be updated to indicate we are not
2328  * communicating HT anymore, but the LQ command may still contain HT rates.
2329  * Test for this to prevent driver from sending LQ command between the time
2330  * RXON flags are updated and when LQ command is updated.
2331  */
2332 static bool
il_is_lq_table_valid(struct il_priv * il,struct il_link_quality_cmd * lq)2333 il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
2334 {
2335 	int i;
2336 
2337 	if (il->ht.enabled)
2338 		return true;
2339 
2340 	D_INFO("Channel %u is not an HT channel\n", il->active.channel);
2341 	for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
2342 		if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
2343 			D_INFO("idx %d of LQ expects HT channel\n", i);
2344 			return false;
2345 		}
2346 	}
2347 	return true;
2348 }
2349 
2350 /**
2351  * il_send_lq_cmd() - Send link quality command
2352  * @init: This command is sent as part of station initialization right
2353  *        after station has been added.
2354  *
2355  * The link quality command is sent as the last step of station creation.
2356  * This is the special case in which init is set and we call a callback in
2357  * this case to clear the state indicating that station creation is in
2358  * progress.
2359  */
2360 int
il_send_lq_cmd(struct il_priv * il,struct il_link_quality_cmd * lq,u8 flags,bool init)2361 il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
2362 	       u8 flags, bool init)
2363 {
2364 	int ret = 0;
2365 	unsigned long flags_spin;
2366 
2367 	struct il_host_cmd cmd = {
2368 		.id = C_TX_LINK_QUALITY_CMD,
2369 		.len = sizeof(struct il_link_quality_cmd),
2370 		.flags = flags,
2371 		.data = lq,
2372 	};
2373 
2374 	if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
2375 		return -EINVAL;
2376 
2377 	spin_lock_irqsave(&il->sta_lock, flags_spin);
2378 	if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
2379 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2380 		return -EINVAL;
2381 	}
2382 	spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2383 
2384 	il_dump_lq_cmd(il, lq);
2385 	BUG_ON(init && (cmd.flags & CMD_ASYNC));
2386 
2387 	if (il_is_lq_table_valid(il, lq))
2388 		ret = il_send_cmd(il, &cmd);
2389 	else
2390 		ret = -EINVAL;
2391 
2392 	if (cmd.flags & CMD_ASYNC)
2393 		return ret;
2394 
2395 	if (init) {
2396 		D_INFO("init LQ command complete,"
2397 		       " clearing sta addition status for sta %d\n",
2398 		       lq->sta_id);
2399 		spin_lock_irqsave(&il->sta_lock, flags_spin);
2400 		il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
2401 		spin_unlock_irqrestore(&il->sta_lock, flags_spin);
2402 	}
2403 	return ret;
2404 }
2405 EXPORT_SYMBOL(il_send_lq_cmd);
2406 
2407 int
il_mac_sta_remove(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)2408 il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
2409 		  struct ieee80211_sta *sta)
2410 {
2411 	struct il_priv *il = hw->priv;
2412 	struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
2413 	int ret;
2414 
2415 	mutex_lock(&il->mutex);
2416 	D_MAC80211("enter station %pM\n", sta->addr);
2417 
2418 	ret = il_remove_station(il, sta_common->sta_id, sta->addr);
2419 	if (ret)
2420 		IL_ERR("Error removing station %pM\n", sta->addr);
2421 
2422 	D_MAC80211("leave ret %d\n", ret);
2423 	mutex_unlock(&il->mutex);
2424 
2425 	return ret;
2426 }
2427 EXPORT_SYMBOL(il_mac_sta_remove);
2428 
2429 /************************** RX-FUNCTIONS ****************************/
2430 /*
2431  * Rx theory of operation
2432  *
2433  * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
2434  * each of which point to Receive Buffers to be filled by the NIC.  These get
2435  * used not only for Rx frames, but for any command response or notification
2436  * from the NIC.  The driver and NIC manage the Rx buffers by means
2437  * of idxes into the circular buffer.
2438  *
2439  * Rx Queue Indexes
2440  * The host/firmware share two idx registers for managing the Rx buffers.
2441  *
2442  * The READ idx maps to the first position that the firmware may be writing
2443  * to -- the driver can read up to (but not including) this position and get
2444  * good data.
2445  * The READ idx is managed by the firmware once the card is enabled.
2446  *
2447  * The WRITE idx maps to the last position the driver has read from -- the
2448  * position preceding WRITE is the last slot the firmware can place a packet.
2449  *
2450  * The queue is empty (no good data) if WRITE = READ - 1, and is full if
2451  * WRITE = READ.
2452  *
2453  * During initialization, the host sets up the READ queue position to the first
2454  * IDX position, and WRITE to the last (READ - 1 wrapped)
2455  *
2456  * When the firmware places a packet in a buffer, it will advance the READ idx
2457  * and fire the RX interrupt.  The driver can then query the READ idx and
2458  * process as many packets as possible, moving the WRITE idx forward as it
2459  * resets the Rx queue buffers with new memory.
2460  *
2461  * The management in the driver is as follows:
2462  * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free.  When
2463  *   iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
2464  *   to replenish the iwl->rxq->rx_free.
2465  * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
2466  *   iwl->rxq is replenished and the READ IDX is updated (updating the
2467  *   'processed' and 'read' driver idxes as well)
2468  * + A received packet is processed and handed to the kernel network stack,
2469  *   detached from the iwl->rxq.  The driver 'processed' idx is updated.
2470  * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
2471  *   list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
2472  *   IDX is not incremented and iwl->status(RX_STALLED) is set.  If there
2473  *   were enough free buffers and RX_STALLED is set it is cleared.
2474  *
2475  *
2476  * Driver sequence:
2477  *
2478  * il_rx_queue_alloc()   Allocates rx_free
2479  * il_rx_replenish()     Replenishes rx_free list from rx_used, and calls
2480  *                            il_rx_queue_restock
2481  * il_rx_queue_restock() Moves available buffers from rx_free into Rx
2482  *                            queue, updates firmware pointers, and updates
2483  *                            the WRITE idx.  If insufficient rx_free buffers
2484  *                            are available, schedules il_rx_replenish
2485  *
2486  * -- enable interrupts --
2487  * ISR - il_rx()         Detach il_rx_bufs from pool up to the
2488  *                            READ IDX, detaching the SKB from the pool.
2489  *                            Moves the packet buffer from queue to rx_used.
2490  *                            Calls il_rx_queue_restock to refill any empty
2491  *                            slots.
2492  * ...
2493  *
2494  */
2495 
2496 /**
2497  * il_rx_queue_space - Return number of free slots available in queue.
2498  */
2499 int
il_rx_queue_space(const struct il_rx_queue * q)2500 il_rx_queue_space(const struct il_rx_queue *q)
2501 {
2502 	int s = q->read - q->write;
2503 	if (s <= 0)
2504 		s += RX_QUEUE_SIZE;
2505 	/* keep some buffer to not confuse full and empty queue */
2506 	s -= 2;
2507 	if (s < 0)
2508 		s = 0;
2509 	return s;
2510 }
2511 EXPORT_SYMBOL(il_rx_queue_space);
2512 
2513 /**
2514  * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
2515  */
2516 void
il_rx_queue_update_write_ptr(struct il_priv * il,struct il_rx_queue * q)2517 il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
2518 {
2519 	unsigned long flags;
2520 	u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
2521 	u32 reg;
2522 
2523 	spin_lock_irqsave(&q->lock, flags);
2524 
2525 	if (q->need_update == 0)
2526 		goto exit_unlock;
2527 
2528 	/* If power-saving is in use, make sure device is awake */
2529 	if (test_bit(S_POWER_PMI, &il->status)) {
2530 		reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2531 
2532 		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2533 			D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
2534 			       reg);
2535 			il_set_bit(il, CSR_GP_CNTRL,
2536 				   CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2537 			goto exit_unlock;
2538 		}
2539 
2540 		q->write_actual = (q->write & ~0x7);
2541 		il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2542 
2543 		/* Else device is assumed to be awake */
2544 	} else {
2545 		/* Device expects a multiple of 8 */
2546 		q->write_actual = (q->write & ~0x7);
2547 		il_wr(il, rx_wrt_ptr_reg, q->write_actual);
2548 	}
2549 
2550 	q->need_update = 0;
2551 
2552 exit_unlock:
2553 	spin_unlock_irqrestore(&q->lock, flags);
2554 }
2555 EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
2556 
2557 int
il_rx_queue_alloc(struct il_priv * il)2558 il_rx_queue_alloc(struct il_priv *il)
2559 {
2560 	struct il_rx_queue *rxq = &il->rxq;
2561 	struct device *dev = &il->pci_dev->dev;
2562 	int i;
2563 
2564 	spin_lock_init(&rxq->lock);
2565 	INIT_LIST_HEAD(&rxq->rx_free);
2566 	INIT_LIST_HEAD(&rxq->rx_used);
2567 
2568 	/* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
2569 	rxq->bd = dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
2570 				     GFP_KERNEL);
2571 	if (!rxq->bd)
2572 		goto err_bd;
2573 
2574 	rxq->rb_stts = dma_alloc_coherent(dev, sizeof(struct il_rb_status),
2575 					  &rxq->rb_stts_dma, GFP_KERNEL);
2576 	if (!rxq->rb_stts)
2577 		goto err_rb;
2578 
2579 	/* Fill the rx_used queue with _all_ of the Rx buffers */
2580 	for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
2581 		list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
2582 
2583 	/* Set us so that we have processed and used all buffers, but have
2584 	 * not restocked the Rx queue with fresh buffers */
2585 	rxq->read = rxq->write = 0;
2586 	rxq->write_actual = 0;
2587 	rxq->free_count = 0;
2588 	rxq->need_update = 0;
2589 	return 0;
2590 
2591 err_rb:
2592 	dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
2593 			  rxq->bd_dma);
2594 err_bd:
2595 	return -ENOMEM;
2596 }
2597 EXPORT_SYMBOL(il_rx_queue_alloc);
2598 
2599 void
il_hdl_spectrum_measurement(struct il_priv * il,struct il_rx_buf * rxb)2600 il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
2601 {
2602 	struct il_rx_pkt *pkt = rxb_addr(rxb);
2603 	struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
2604 
2605 	if (!report->state) {
2606 		D_11H("Spectrum Measure Notification: Start\n");
2607 		return;
2608 	}
2609 
2610 	memcpy(&il->measure_report, report, sizeof(*report));
2611 	il->measurement_status |= MEASUREMENT_READY;
2612 }
2613 EXPORT_SYMBOL(il_hdl_spectrum_measurement);
2614 
2615 /*
2616  * returns non-zero if packet should be dropped
2617  */
2618 int
il_set_decrypted_flag(struct il_priv * il,struct ieee80211_hdr * hdr,u32 decrypt_res,struct ieee80211_rx_status * stats)2619 il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
2620 		      u32 decrypt_res, struct ieee80211_rx_status *stats)
2621 {
2622 	u16 fc = le16_to_cpu(hdr->frame_control);
2623 
2624 	/*
2625 	 * All contexts have the same setting here due to it being
2626 	 * a module parameter, so OK to check any context.
2627 	 */
2628 	if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
2629 		return 0;
2630 
2631 	if (!(fc & IEEE80211_FCTL_PROTECTED))
2632 		return 0;
2633 
2634 	D_RX("decrypt_res:0x%x\n", decrypt_res);
2635 	switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
2636 	case RX_RES_STATUS_SEC_TYPE_TKIP:
2637 		/* The uCode has got a bad phase 1 Key, pushes the packet.
2638 		 * Decryption will be done in SW. */
2639 		if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2640 		    RX_RES_STATUS_BAD_KEY_TTAK)
2641 			break;
2642 
2643 	case RX_RES_STATUS_SEC_TYPE_WEP:
2644 		if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2645 		    RX_RES_STATUS_BAD_ICV_MIC) {
2646 			/* bad ICV, the packet is destroyed since the
2647 			 * decryption is inplace, drop it */
2648 			D_RX("Packet destroyed\n");
2649 			return -1;
2650 		}
2651 	case RX_RES_STATUS_SEC_TYPE_CCMP:
2652 		if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
2653 		    RX_RES_STATUS_DECRYPT_OK) {
2654 			D_RX("hw decrypt successfully!!!\n");
2655 			stats->flag |= RX_FLAG_DECRYPTED;
2656 		}
2657 		break;
2658 
2659 	default:
2660 		break;
2661 	}
2662 	return 0;
2663 }
2664 EXPORT_SYMBOL(il_set_decrypted_flag);
2665 
2666 /**
2667  * il_txq_update_write_ptr - Send new write idx to hardware
2668  */
2669 void
il_txq_update_write_ptr(struct il_priv * il,struct il_tx_queue * txq)2670 il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
2671 {
2672 	u32 reg = 0;
2673 	int txq_id = txq->q.id;
2674 
2675 	if (txq->need_update == 0)
2676 		return;
2677 
2678 	/* if we're trying to save power */
2679 	if (test_bit(S_POWER_PMI, &il->status)) {
2680 		/* wake up nic if it's powered down ...
2681 		 * uCode will wake up, and interrupt us again, so next
2682 		 * time we'll skip this part. */
2683 		reg = _il_rd(il, CSR_UCODE_DRV_GP1);
2684 
2685 		if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
2686 			D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
2687 			       txq_id, reg);
2688 			il_set_bit(il, CSR_GP_CNTRL,
2689 				   CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2690 			return;
2691 		}
2692 
2693 		il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2694 
2695 		/*
2696 		 * else not in power-save mode,
2697 		 * uCode will never sleep when we're
2698 		 * trying to tx (during RFKILL, we're not trying to tx).
2699 		 */
2700 	} else
2701 		_il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
2702 	txq->need_update = 0;
2703 }
2704 EXPORT_SYMBOL(il_txq_update_write_ptr);
2705 
2706 /**
2707  * il_tx_queue_unmap -  Unmap any remaining DMA mappings and free skb's
2708  */
2709 void
il_tx_queue_unmap(struct il_priv * il,int txq_id)2710 il_tx_queue_unmap(struct il_priv *il, int txq_id)
2711 {
2712 	struct il_tx_queue *txq = &il->txq[txq_id];
2713 	struct il_queue *q = &txq->q;
2714 
2715 	if (q->n_bd == 0)
2716 		return;
2717 
2718 	while (q->write_ptr != q->read_ptr) {
2719 		il->ops->txq_free_tfd(il, txq);
2720 		q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2721 	}
2722 }
2723 EXPORT_SYMBOL(il_tx_queue_unmap);
2724 
2725 /**
2726  * il_tx_queue_free - Deallocate DMA queue.
2727  * @txq: Transmit queue to deallocate.
2728  *
2729  * Empty queue by removing and destroying all BD's.
2730  * Free all buffers.
2731  * 0-fill, but do not free "txq" descriptor structure.
2732  */
2733 void
il_tx_queue_free(struct il_priv * il,int txq_id)2734 il_tx_queue_free(struct il_priv *il, int txq_id)
2735 {
2736 	struct il_tx_queue *txq = &il->txq[txq_id];
2737 	struct device *dev = &il->pci_dev->dev;
2738 	int i;
2739 
2740 	il_tx_queue_unmap(il, txq_id);
2741 
2742 	/* De-alloc array of command/tx buffers */
2743 	for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
2744 		kfree(txq->cmd[i]);
2745 
2746 	/* De-alloc circular buffer of TFDs */
2747 	if (txq->q.n_bd)
2748 		dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2749 				  txq->tfds, txq->q.dma_addr);
2750 
2751 	/* De-alloc array of per-TFD driver data */
2752 	kfree(txq->skbs);
2753 	txq->skbs = NULL;
2754 
2755 	/* deallocate arrays */
2756 	kfree(txq->cmd);
2757 	kfree(txq->meta);
2758 	txq->cmd = NULL;
2759 	txq->meta = NULL;
2760 
2761 	/* 0-fill queue descriptor structure */
2762 	memset(txq, 0, sizeof(*txq));
2763 }
2764 EXPORT_SYMBOL(il_tx_queue_free);
2765 
2766 /**
2767  * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
2768  */
2769 void
il_cmd_queue_unmap(struct il_priv * il)2770 il_cmd_queue_unmap(struct il_priv *il)
2771 {
2772 	struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2773 	struct il_queue *q = &txq->q;
2774 	int i;
2775 
2776 	if (q->n_bd == 0)
2777 		return;
2778 
2779 	while (q->read_ptr != q->write_ptr) {
2780 		i = il_get_cmd_idx(q, q->read_ptr, 0);
2781 
2782 		if (txq->meta[i].flags & CMD_MAPPED) {
2783 			pci_unmap_single(il->pci_dev,
2784 					 dma_unmap_addr(&txq->meta[i], mapping),
2785 					 dma_unmap_len(&txq->meta[i], len),
2786 					 PCI_DMA_BIDIRECTIONAL);
2787 			txq->meta[i].flags = 0;
2788 		}
2789 
2790 		q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
2791 	}
2792 
2793 	i = q->n_win;
2794 	if (txq->meta[i].flags & CMD_MAPPED) {
2795 		pci_unmap_single(il->pci_dev,
2796 				 dma_unmap_addr(&txq->meta[i], mapping),
2797 				 dma_unmap_len(&txq->meta[i], len),
2798 				 PCI_DMA_BIDIRECTIONAL);
2799 		txq->meta[i].flags = 0;
2800 	}
2801 }
2802 EXPORT_SYMBOL(il_cmd_queue_unmap);
2803 
2804 /**
2805  * il_cmd_queue_free - Deallocate DMA queue.
2806  * @txq: Transmit queue to deallocate.
2807  *
2808  * Empty queue by removing and destroying all BD's.
2809  * Free all buffers.
2810  * 0-fill, but do not free "txq" descriptor structure.
2811  */
2812 void
il_cmd_queue_free(struct il_priv * il)2813 il_cmd_queue_free(struct il_priv *il)
2814 {
2815 	struct il_tx_queue *txq = &il->txq[il->cmd_queue];
2816 	struct device *dev = &il->pci_dev->dev;
2817 	int i;
2818 
2819 	il_cmd_queue_unmap(il);
2820 
2821 	/* De-alloc array of command/tx buffers */
2822 	for (i = 0; i <= TFD_CMD_SLOTS; i++)
2823 		kfree(txq->cmd[i]);
2824 
2825 	/* De-alloc circular buffer of TFDs */
2826 	if (txq->q.n_bd)
2827 		dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
2828 				  txq->tfds, txq->q.dma_addr);
2829 
2830 	/* deallocate arrays */
2831 	kfree(txq->cmd);
2832 	kfree(txq->meta);
2833 	txq->cmd = NULL;
2834 	txq->meta = NULL;
2835 
2836 	/* 0-fill queue descriptor structure */
2837 	memset(txq, 0, sizeof(*txq));
2838 }
2839 EXPORT_SYMBOL(il_cmd_queue_free);
2840 
2841 /*************** DMA-QUEUE-GENERAL-FUNCTIONS  *****
2842  * DMA services
2843  *
2844  * Theory of operation
2845  *
2846  * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
2847  * of buffer descriptors, each of which points to one or more data buffers for
2848  * the device to read from or fill.  Driver and device exchange status of each
2849  * queue via "read" and "write" pointers.  Driver keeps minimum of 2 empty
2850  * entries in each circular buffer, to protect against confusing empty and full
2851  * queue states.
2852  *
2853  * The device reads or writes the data in the queues via the device's several
2854  * DMA/FIFO channels.  Each queue is mapped to a single DMA channel.
2855  *
2856  * For Tx queue, there are low mark and high mark limits. If, after queuing
2857  * the packet for Tx, free space become < low mark, Tx queue stopped. When
2858  * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
2859  * Tx queue resumed.
2860  *
2861  * See more detailed info in 4965.h.
2862  ***************************************************/
2863 
2864 int
il_queue_space(const struct il_queue * q)2865 il_queue_space(const struct il_queue *q)
2866 {
2867 	int s = q->read_ptr - q->write_ptr;
2868 
2869 	if (q->read_ptr > q->write_ptr)
2870 		s -= q->n_bd;
2871 
2872 	if (s <= 0)
2873 		s += q->n_win;
2874 	/* keep some reserve to not confuse empty and full situations */
2875 	s -= 2;
2876 	if (s < 0)
2877 		s = 0;
2878 	return s;
2879 }
2880 EXPORT_SYMBOL(il_queue_space);
2881 
2882 
2883 /**
2884  * il_queue_init - Initialize queue's high/low-water and read/write idxes
2885  */
2886 static int
il_queue_init(struct il_priv * il,struct il_queue * q,int slots,u32 id)2887 il_queue_init(struct il_priv *il, struct il_queue *q, int slots, u32 id)
2888 {
2889 	/*
2890 	 * TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
2891 	 * il_queue_inc_wrap and il_queue_dec_wrap are broken.
2892 	 */
2893 	BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
2894 	/* FIXME: remove q->n_bd */
2895 	q->n_bd = TFD_QUEUE_SIZE_MAX;
2896 
2897 	q->n_win = slots;
2898 	q->id = id;
2899 
2900 	/* slots_must be power-of-two size, otherwise
2901 	 * il_get_cmd_idx is broken. */
2902 	BUG_ON(!is_power_of_2(slots));
2903 
2904 	q->low_mark = q->n_win / 4;
2905 	if (q->low_mark < 4)
2906 		q->low_mark = 4;
2907 
2908 	q->high_mark = q->n_win / 8;
2909 	if (q->high_mark < 2)
2910 		q->high_mark = 2;
2911 
2912 	q->write_ptr = q->read_ptr = 0;
2913 
2914 	return 0;
2915 }
2916 
2917 /**
2918  * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
2919  */
2920 static int
il_tx_queue_alloc(struct il_priv * il,struct il_tx_queue * txq,u32 id)2921 il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
2922 {
2923 	struct device *dev = &il->pci_dev->dev;
2924 	size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
2925 
2926 	/* Driver ilate data, only for Tx (not command) queues,
2927 	 * not shared with device. */
2928 	if (id != il->cmd_queue) {
2929 		txq->skbs = kcalloc(TFD_QUEUE_SIZE_MAX, sizeof(struct skb *),
2930 				    GFP_KERNEL);
2931 		if (!txq->skbs) {
2932 			IL_ERR("Fail to alloc skbs\n");
2933 			goto error;
2934 		}
2935 	} else
2936 		txq->skbs = NULL;
2937 
2938 	/* Circular buffer of transmit frame descriptors (TFDs),
2939 	 * shared with device */
2940 	txq->tfds =
2941 	    dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
2942 	if (!txq->tfds)
2943 		goto error;
2944 
2945 	txq->q.id = id;
2946 
2947 	return 0;
2948 
2949 error:
2950 	kfree(txq->skbs);
2951 	txq->skbs = NULL;
2952 
2953 	return -ENOMEM;
2954 }
2955 
2956 /**
2957  * il_tx_queue_init - Allocate and initialize one tx/cmd queue
2958  */
2959 int
il_tx_queue_init(struct il_priv * il,u32 txq_id)2960 il_tx_queue_init(struct il_priv *il, u32 txq_id)
2961 {
2962 	int i, len, ret;
2963 	int slots, actual_slots;
2964 	struct il_tx_queue *txq = &il->txq[txq_id];
2965 
2966 	/*
2967 	 * Alloc buffer array for commands (Tx or other types of commands).
2968 	 * For the command queue (#4/#9), allocate command space + one big
2969 	 * command for scan, since scan command is very huge; the system will
2970 	 * not have two scans at the same time, so only one is needed.
2971 	 * For normal Tx queues (all other queues), no super-size command
2972 	 * space is needed.
2973 	 */
2974 	if (txq_id == il->cmd_queue) {
2975 		slots = TFD_CMD_SLOTS;
2976 		actual_slots = slots + 1;
2977 	} else {
2978 		slots = TFD_TX_CMD_SLOTS;
2979 		actual_slots = slots;
2980 	}
2981 
2982 	txq->meta =
2983 	    kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
2984 	txq->cmd =
2985 	    kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
2986 
2987 	if (!txq->meta || !txq->cmd)
2988 		goto out_free_arrays;
2989 
2990 	len = sizeof(struct il_device_cmd);
2991 	for (i = 0; i < actual_slots; i++) {
2992 		/* only happens for cmd queue */
2993 		if (i == slots)
2994 			len = IL_MAX_CMD_SIZE;
2995 
2996 		txq->cmd[i] = kmalloc(len, GFP_KERNEL);
2997 		if (!txq->cmd[i])
2998 			goto err;
2999 	}
3000 
3001 	/* Alloc driver data array and TFD circular buffer */
3002 	ret = il_tx_queue_alloc(il, txq, txq_id);
3003 	if (ret)
3004 		goto err;
3005 
3006 	txq->need_update = 0;
3007 
3008 	/*
3009 	 * For the default queues 0-3, set up the swq_id
3010 	 * already -- all others need to get one later
3011 	 * (if they need one at all).
3012 	 */
3013 	if (txq_id < 4)
3014 		il_set_swq_id(txq, txq_id, txq_id);
3015 
3016 	/* Initialize queue's high/low-water marks, and head/tail idxes */
3017 	il_queue_init(il, &txq->q, slots, txq_id);
3018 
3019 	/* Tell device where to find queue */
3020 	il->ops->txq_init(il, txq);
3021 
3022 	return 0;
3023 err:
3024 	for (i = 0; i < actual_slots; i++)
3025 		kfree(txq->cmd[i]);
3026 out_free_arrays:
3027 	kfree(txq->meta);
3028 	kfree(txq->cmd);
3029 
3030 	return -ENOMEM;
3031 }
3032 EXPORT_SYMBOL(il_tx_queue_init);
3033 
3034 void
il_tx_queue_reset(struct il_priv * il,u32 txq_id)3035 il_tx_queue_reset(struct il_priv *il, u32 txq_id)
3036 {
3037 	int slots, actual_slots;
3038 	struct il_tx_queue *txq = &il->txq[txq_id];
3039 
3040 	if (txq_id == il->cmd_queue) {
3041 		slots = TFD_CMD_SLOTS;
3042 		actual_slots = TFD_CMD_SLOTS + 1;
3043 	} else {
3044 		slots = TFD_TX_CMD_SLOTS;
3045 		actual_slots = TFD_TX_CMD_SLOTS;
3046 	}
3047 
3048 	memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
3049 	txq->need_update = 0;
3050 
3051 	/* Initialize queue's high/low-water marks, and head/tail idxes */
3052 	il_queue_init(il, &txq->q, slots, txq_id);
3053 
3054 	/* Tell device where to find queue */
3055 	il->ops->txq_init(il, txq);
3056 }
3057 EXPORT_SYMBOL(il_tx_queue_reset);
3058 
3059 /*************** HOST COMMAND QUEUE FUNCTIONS   *****/
3060 
3061 /**
3062  * il_enqueue_hcmd - enqueue a uCode command
3063  * @il: device ilate data point
3064  * @cmd: a point to the ucode command structure
3065  *
3066  * The function returns < 0 values to indicate the operation is
3067  * failed. On success, it turns the idx (> 0) of command in the
3068  * command queue.
3069  */
3070 int
il_enqueue_hcmd(struct il_priv * il,struct il_host_cmd * cmd)3071 il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
3072 {
3073 	struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3074 	struct il_queue *q = &txq->q;
3075 	struct il_device_cmd *out_cmd;
3076 	struct il_cmd_meta *out_meta;
3077 	dma_addr_t phys_addr;
3078 	unsigned long flags;
3079 	int len;
3080 	u32 idx;
3081 	u16 fix_size;
3082 
3083 	cmd->len = il->ops->get_hcmd_size(cmd->id, cmd->len);
3084 	fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
3085 
3086 	/* If any of the command structures end up being larger than
3087 	 * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
3088 	 * we will need to increase the size of the TFD entries
3089 	 * Also, check to see if command buffer should not exceed the size
3090 	 * of device_cmd and max_cmd_size. */
3091 	BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
3092 	       !(cmd->flags & CMD_SIZE_HUGE));
3093 	BUG_ON(fix_size > IL_MAX_CMD_SIZE);
3094 
3095 	if (il_is_rfkill(il) || il_is_ctkill(il)) {
3096 		IL_WARN("Not sending command - %s KILL\n",
3097 			il_is_rfkill(il) ? "RF" : "CT");
3098 		return -EIO;
3099 	}
3100 
3101 	spin_lock_irqsave(&il->hcmd_lock, flags);
3102 
3103 	if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
3104 		spin_unlock_irqrestore(&il->hcmd_lock, flags);
3105 
3106 		IL_ERR("Restarting adapter due to command queue full\n");
3107 		queue_work(il->workqueue, &il->restart);
3108 		return -ENOSPC;
3109 	}
3110 
3111 	idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
3112 	out_cmd = txq->cmd[idx];
3113 	out_meta = &txq->meta[idx];
3114 
3115 	if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
3116 		spin_unlock_irqrestore(&il->hcmd_lock, flags);
3117 		return -ENOSPC;
3118 	}
3119 
3120 	memset(out_meta, 0, sizeof(*out_meta));	/* re-initialize to NULL */
3121 	out_meta->flags = cmd->flags | CMD_MAPPED;
3122 	if (cmd->flags & CMD_WANT_SKB)
3123 		out_meta->source = cmd;
3124 	if (cmd->flags & CMD_ASYNC)
3125 		out_meta->callback = cmd->callback;
3126 
3127 	out_cmd->hdr.cmd = cmd->id;
3128 	memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
3129 
3130 	/* At this point, the out_cmd now has all of the incoming cmd
3131 	 * information */
3132 
3133 	out_cmd->hdr.flags = 0;
3134 	out_cmd->hdr.sequence =
3135 	    cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
3136 	if (cmd->flags & CMD_SIZE_HUGE)
3137 		out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
3138 	len = sizeof(struct il_device_cmd);
3139 	if (idx == TFD_CMD_SLOTS)
3140 		len = IL_MAX_CMD_SIZE;
3141 
3142 #ifdef CONFIG_IWLEGACY_DEBUG
3143 	switch (out_cmd->hdr.cmd) {
3144 	case C_TX_LINK_QUALITY_CMD:
3145 	case C_SENSITIVITY:
3146 		D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
3147 			  "%d bytes at %d[%d]:%d\n",
3148 			  il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3149 			  le16_to_cpu(out_cmd->hdr.sequence), fix_size,
3150 			  q->write_ptr, idx, il->cmd_queue);
3151 		break;
3152 	default:
3153 		D_HC("Sending command %s (#%x), seq: 0x%04X, "
3154 		     "%d bytes at %d[%d]:%d\n",
3155 		     il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
3156 		     le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
3157 		     idx, il->cmd_queue);
3158 	}
3159 #endif
3160 
3161 	phys_addr =
3162 	    pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
3163 			   PCI_DMA_BIDIRECTIONAL);
3164 	if (unlikely(pci_dma_mapping_error(il->pci_dev, phys_addr))) {
3165 		idx = -ENOMEM;
3166 		goto out;
3167 	}
3168 	dma_unmap_addr_set(out_meta, mapping, phys_addr);
3169 	dma_unmap_len_set(out_meta, len, fix_size);
3170 
3171 	txq->need_update = 1;
3172 
3173 	if (il->ops->txq_update_byte_cnt_tbl)
3174 		/* Set up entry in queue's byte count circular buffer */
3175 		il->ops->txq_update_byte_cnt_tbl(il, txq, 0);
3176 
3177 	il->ops->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size, 1,
3178 					    U32_PAD(cmd->len));
3179 
3180 	/* Increment and update queue's write idx */
3181 	q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
3182 	il_txq_update_write_ptr(il, txq);
3183 
3184 out:
3185 	spin_unlock_irqrestore(&il->hcmd_lock, flags);
3186 	return idx;
3187 }
3188 
3189 /**
3190  * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
3191  *
3192  * When FW advances 'R' idx, all entries between old and new 'R' idx
3193  * need to be reclaimed. As result, some free space forms.  If there is
3194  * enough free space (> low mark), wake the stack that feeds us.
3195  */
3196 static void
il_hcmd_queue_reclaim(struct il_priv * il,int txq_id,int idx,int cmd_idx)3197 il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
3198 {
3199 	struct il_tx_queue *txq = &il->txq[txq_id];
3200 	struct il_queue *q = &txq->q;
3201 	int nfreed = 0;
3202 
3203 	if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
3204 		IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
3205 		       "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
3206 		       q->write_ptr, q->read_ptr);
3207 		return;
3208 	}
3209 
3210 	for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
3211 	     q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
3212 
3213 		if (nfreed++ > 0) {
3214 			IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
3215 			       q->write_ptr, q->read_ptr);
3216 			queue_work(il->workqueue, &il->restart);
3217 		}
3218 
3219 	}
3220 }
3221 
3222 /**
3223  * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
3224  * @rxb: Rx buffer to reclaim
3225  *
3226  * If an Rx buffer has an async callback associated with it the callback
3227  * will be executed.  The attached skb (if present) will only be freed
3228  * if the callback returns 1
3229  */
3230 void
il_tx_cmd_complete(struct il_priv * il,struct il_rx_buf * rxb)3231 il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
3232 {
3233 	struct il_rx_pkt *pkt = rxb_addr(rxb);
3234 	u16 sequence = le16_to_cpu(pkt->hdr.sequence);
3235 	int txq_id = SEQ_TO_QUEUE(sequence);
3236 	int idx = SEQ_TO_IDX(sequence);
3237 	int cmd_idx;
3238 	bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
3239 	struct il_device_cmd *cmd;
3240 	struct il_cmd_meta *meta;
3241 	struct il_tx_queue *txq = &il->txq[il->cmd_queue];
3242 	unsigned long flags;
3243 
3244 	/* If a Tx command is being handled and it isn't in the actual
3245 	 * command queue then there a command routing bug has been introduced
3246 	 * in the queue management code. */
3247 	if (WARN
3248 	    (txq_id != il->cmd_queue,
3249 	     "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
3250 	     txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
3251 	     il->txq[il->cmd_queue].q.write_ptr)) {
3252 		il_print_hex_error(il, pkt, 32);
3253 		return;
3254 	}
3255 
3256 	cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
3257 	cmd = txq->cmd[cmd_idx];
3258 	meta = &txq->meta[cmd_idx];
3259 
3260 	txq->time_stamp = jiffies;
3261 
3262 	pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
3263 			 dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
3264 
3265 	/* Input error checking is done when commands are added to queue. */
3266 	if (meta->flags & CMD_WANT_SKB) {
3267 		meta->source->reply_page = (unsigned long)rxb_addr(rxb);
3268 		rxb->page = NULL;
3269 	} else if (meta->callback)
3270 		meta->callback(il, cmd, pkt);
3271 
3272 	spin_lock_irqsave(&il->hcmd_lock, flags);
3273 
3274 	il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
3275 
3276 	if (!(meta->flags & CMD_ASYNC)) {
3277 		clear_bit(S_HCMD_ACTIVE, &il->status);
3278 		D_INFO("Clearing HCMD_ACTIVE for command %s\n",
3279 		       il_get_cmd_string(cmd->hdr.cmd));
3280 		wake_up(&il->wait_command_queue);
3281 	}
3282 
3283 	/* Mark as unmapped */
3284 	meta->flags = 0;
3285 
3286 	spin_unlock_irqrestore(&il->hcmd_lock, flags);
3287 }
3288 EXPORT_SYMBOL(il_tx_cmd_complete);
3289 
3290 MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
3291 MODULE_VERSION(IWLWIFI_VERSION);
3292 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
3293 MODULE_LICENSE("GPL");
3294 
3295 /*
3296  * set bt_coex_active to true, uCode will do kill/defer
3297  * every time the priority line is asserted (BT is sending signals on the
3298  * priority line in the PCIx).
3299  * set bt_coex_active to false, uCode will ignore the BT activity and
3300  * perform the normal operation
3301  *
3302  * User might experience transmit issue on some platform due to WiFi/BT
3303  * co-exist problem. The possible behaviors are:
3304  *   Able to scan and finding all the available AP
3305  *   Not able to associate with any AP
3306  * On those platforms, WiFi communication can be restored by set
3307  * "bt_coex_active" module parameter to "false"
3308  *
3309  * default: bt_coex_active = true (BT_COEX_ENABLE)
3310  */
3311 static bool bt_coex_active = true;
3312 module_param(bt_coex_active, bool, S_IRUGO);
3313 MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
3314 
3315 u32 il_debug_level;
3316 EXPORT_SYMBOL(il_debug_level);
3317 
3318 const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
3319 EXPORT_SYMBOL(il_bcast_addr);
3320 
3321 #define MAX_BIT_RATE_40_MHZ 150	/* Mbps */
3322 #define MAX_BIT_RATE_20_MHZ 72	/* Mbps */
3323 static void
il_init_ht_hw_capab(const struct il_priv * il,struct ieee80211_sta_ht_cap * ht_info,enum ieee80211_band band)3324 il_init_ht_hw_capab(const struct il_priv *il,
3325 		    struct ieee80211_sta_ht_cap *ht_info,
3326 		    enum ieee80211_band band)
3327 {
3328 	u16 max_bit_rate = 0;
3329 	u8 rx_chains_num = il->hw_params.rx_chains_num;
3330 	u8 tx_chains_num = il->hw_params.tx_chains_num;
3331 
3332 	ht_info->cap = 0;
3333 	memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
3334 
3335 	ht_info->ht_supported = true;
3336 
3337 	ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
3338 	max_bit_rate = MAX_BIT_RATE_20_MHZ;
3339 	if (il->hw_params.ht40_channel & BIT(band)) {
3340 		ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
3341 		ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
3342 		ht_info->mcs.rx_mask[4] = 0x01;
3343 		max_bit_rate = MAX_BIT_RATE_40_MHZ;
3344 	}
3345 
3346 	if (il->cfg->mod_params->amsdu_size_8K)
3347 		ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
3348 
3349 	ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
3350 	ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
3351 
3352 	ht_info->mcs.rx_mask[0] = 0xFF;
3353 	if (rx_chains_num >= 2)
3354 		ht_info->mcs.rx_mask[1] = 0xFF;
3355 	if (rx_chains_num >= 3)
3356 		ht_info->mcs.rx_mask[2] = 0xFF;
3357 
3358 	/* Highest supported Rx data rate */
3359 	max_bit_rate *= rx_chains_num;
3360 	WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
3361 	ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
3362 
3363 	/* Tx MCS capabilities */
3364 	ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
3365 	if (tx_chains_num != rx_chains_num) {
3366 		ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
3367 		ht_info->mcs.tx_params |=
3368 		    ((tx_chains_num -
3369 		      1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
3370 	}
3371 }
3372 
3373 /**
3374  * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
3375  */
3376 int
il_init_geos(struct il_priv * il)3377 il_init_geos(struct il_priv *il)
3378 {
3379 	struct il_channel_info *ch;
3380 	struct ieee80211_supported_band *sband;
3381 	struct ieee80211_channel *channels;
3382 	struct ieee80211_channel *geo_ch;
3383 	struct ieee80211_rate *rates;
3384 	int i = 0;
3385 	s8 max_tx_power = 0;
3386 
3387 	if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
3388 	    il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
3389 		D_INFO("Geography modes already initialized.\n");
3390 		set_bit(S_GEO_CONFIGURED, &il->status);
3391 		return 0;
3392 	}
3393 
3394 	channels =
3395 	    kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
3396 		    GFP_KERNEL);
3397 	if (!channels)
3398 		return -ENOMEM;
3399 
3400 	rates =
3401 	    kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
3402 		    GFP_KERNEL);
3403 	if (!rates) {
3404 		kfree(channels);
3405 		return -ENOMEM;
3406 	}
3407 
3408 	/* 5.2GHz channels start after the 2.4GHz channels */
3409 	sband = &il->bands[IEEE80211_BAND_5GHZ];
3410 	sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
3411 	/* just OFDM */
3412 	sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
3413 	sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
3414 
3415 	if (il->cfg->sku & IL_SKU_N)
3416 		il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ);
3417 
3418 	sband = &il->bands[IEEE80211_BAND_2GHZ];
3419 	sband->channels = channels;
3420 	/* OFDM & CCK */
3421 	sband->bitrates = rates;
3422 	sband->n_bitrates = RATE_COUNT_LEGACY;
3423 
3424 	if (il->cfg->sku & IL_SKU_N)
3425 		il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ);
3426 
3427 	il->ieee_channels = channels;
3428 	il->ieee_rates = rates;
3429 
3430 	for (i = 0; i < il->channel_count; i++) {
3431 		ch = &il->channel_info[i];
3432 
3433 		if (!il_is_channel_valid(ch))
3434 			continue;
3435 
3436 		sband = &il->bands[ch->band];
3437 
3438 		geo_ch = &sband->channels[sband->n_channels++];
3439 
3440 		geo_ch->center_freq =
3441 		    ieee80211_channel_to_frequency(ch->channel, ch->band);
3442 		geo_ch->max_power = ch->max_power_avg;
3443 		geo_ch->max_antenna_gain = 0xff;
3444 		geo_ch->hw_value = ch->channel;
3445 
3446 		if (il_is_channel_valid(ch)) {
3447 			if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3448 				geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
3449 
3450 			if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3451 				geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3452 
3453 			if (ch->flags & EEPROM_CHANNEL_RADAR)
3454 				geo_ch->flags |= IEEE80211_CHAN_RADAR;
3455 
3456 			geo_ch->flags |= ch->ht40_extension_channel;
3457 
3458 			if (ch->max_power_avg > max_tx_power)
3459 				max_tx_power = ch->max_power_avg;
3460 		} else {
3461 			geo_ch->flags |= IEEE80211_CHAN_DISABLED;
3462 		}
3463 
3464 		D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
3465 		       geo_ch->center_freq,
3466 		       il_is_channel_a_band(ch) ? "5.2" : "2.4",
3467 		       geo_ch->
3468 		       flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
3469 		       geo_ch->flags);
3470 	}
3471 
3472 	il->tx_power_device_lmt = max_tx_power;
3473 	il->tx_power_user_lmt = max_tx_power;
3474 	il->tx_power_next = max_tx_power;
3475 
3476 	if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
3477 	    (il->cfg->sku & IL_SKU_A)) {
3478 		IL_INFO("Incorrectly detected BG card as ABG. "
3479 			"Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
3480 			il->pci_dev->device, il->pci_dev->subsystem_device);
3481 		il->cfg->sku &= ~IL_SKU_A;
3482 	}
3483 
3484 	IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
3485 		il->bands[IEEE80211_BAND_2GHZ].n_channels,
3486 		il->bands[IEEE80211_BAND_5GHZ].n_channels);
3487 
3488 	set_bit(S_GEO_CONFIGURED, &il->status);
3489 
3490 	return 0;
3491 }
3492 EXPORT_SYMBOL(il_init_geos);
3493 
3494 /*
3495  * il_free_geos - undo allocations in il_init_geos
3496  */
3497 void
il_free_geos(struct il_priv * il)3498 il_free_geos(struct il_priv *il)
3499 {
3500 	kfree(il->ieee_channels);
3501 	kfree(il->ieee_rates);
3502 	clear_bit(S_GEO_CONFIGURED, &il->status);
3503 }
3504 EXPORT_SYMBOL(il_free_geos);
3505 
3506 static bool
il_is_channel_extension(struct il_priv * il,enum ieee80211_band band,u16 channel,u8 extension_chan_offset)3507 il_is_channel_extension(struct il_priv *il, enum ieee80211_band band,
3508 			u16 channel, u8 extension_chan_offset)
3509 {
3510 	const struct il_channel_info *ch_info;
3511 
3512 	ch_info = il_get_channel_info(il, band, channel);
3513 	if (!il_is_channel_valid(ch_info))
3514 		return false;
3515 
3516 	if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
3517 		return !(ch_info->
3518 			 ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
3519 	else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
3520 		return !(ch_info->
3521 			 ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
3522 
3523 	return false;
3524 }
3525 
3526 bool
il_is_ht40_tx_allowed(struct il_priv * il,struct ieee80211_sta_ht_cap * ht_cap)3527 il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
3528 {
3529 	if (!il->ht.enabled || !il->ht.is_40mhz)
3530 		return false;
3531 
3532 	/*
3533 	 * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
3534 	 * the bit will not set if it is pure 40MHz case
3535 	 */
3536 	if (ht_cap && !ht_cap->ht_supported)
3537 		return false;
3538 
3539 #ifdef CONFIG_IWLEGACY_DEBUGFS
3540 	if (il->disable_ht40)
3541 		return false;
3542 #endif
3543 
3544 	return il_is_channel_extension(il, il->band,
3545 				       le16_to_cpu(il->staging.channel),
3546 				       il->ht.extension_chan_offset);
3547 }
3548 EXPORT_SYMBOL(il_is_ht40_tx_allowed);
3549 
3550 static u16
il_adjust_beacon_interval(u16 beacon_val,u16 max_beacon_val)3551 il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
3552 {
3553 	u16 new_val;
3554 	u16 beacon_factor;
3555 
3556 	/*
3557 	 * If mac80211 hasn't given us a beacon interval, program
3558 	 * the default into the device.
3559 	 */
3560 	if (!beacon_val)
3561 		return DEFAULT_BEACON_INTERVAL;
3562 
3563 	/*
3564 	 * If the beacon interval we obtained from the peer
3565 	 * is too large, we'll have to wake up more often
3566 	 * (and in IBSS case, we'll beacon too much)
3567 	 *
3568 	 * For example, if max_beacon_val is 4096, and the
3569 	 * requested beacon interval is 7000, we'll have to
3570 	 * use 3500 to be able to wake up on the beacons.
3571 	 *
3572 	 * This could badly influence beacon detection stats.
3573 	 */
3574 
3575 	beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
3576 	new_val = beacon_val / beacon_factor;
3577 
3578 	if (!new_val)
3579 		new_val = max_beacon_val;
3580 
3581 	return new_val;
3582 }
3583 
3584 int
il_send_rxon_timing(struct il_priv * il)3585 il_send_rxon_timing(struct il_priv *il)
3586 {
3587 	u64 tsf;
3588 	s32 interval_tm, rem;
3589 	struct ieee80211_conf *conf = NULL;
3590 	u16 beacon_int;
3591 	struct ieee80211_vif *vif = il->vif;
3592 
3593 	conf = &il->hw->conf;
3594 
3595 	lockdep_assert_held(&il->mutex);
3596 
3597 	memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
3598 
3599 	il->timing.timestamp = cpu_to_le64(il->timestamp);
3600 	il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
3601 
3602 	beacon_int = vif ? vif->bss_conf.beacon_int : 0;
3603 
3604 	/*
3605 	 * TODO: For IBSS we need to get atim_win from mac80211,
3606 	 *       for now just always use 0
3607 	 */
3608 	il->timing.atim_win = 0;
3609 
3610 	beacon_int =
3611 	    il_adjust_beacon_interval(beacon_int,
3612 				      il->hw_params.max_beacon_itrvl *
3613 				      TIME_UNIT);
3614 	il->timing.beacon_interval = cpu_to_le16(beacon_int);
3615 
3616 	tsf = il->timestamp;	/* tsf is modifed by do_div: copy it */
3617 	interval_tm = beacon_int * TIME_UNIT;
3618 	rem = do_div(tsf, interval_tm);
3619 	il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
3620 
3621 	il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
3622 
3623 	D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
3624 		le16_to_cpu(il->timing.beacon_interval),
3625 		le32_to_cpu(il->timing.beacon_init_val),
3626 		le16_to_cpu(il->timing.atim_win));
3627 
3628 	return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
3629 			       &il->timing);
3630 }
3631 EXPORT_SYMBOL(il_send_rxon_timing);
3632 
3633 void
il_set_rxon_hwcrypto(struct il_priv * il,int hw_decrypt)3634 il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
3635 {
3636 	struct il_rxon_cmd *rxon = &il->staging;
3637 
3638 	if (hw_decrypt)
3639 		rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
3640 	else
3641 		rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
3642 
3643 }
3644 EXPORT_SYMBOL(il_set_rxon_hwcrypto);
3645 
3646 /* validate RXON structure is valid */
3647 int
il_check_rxon_cmd(struct il_priv * il)3648 il_check_rxon_cmd(struct il_priv *il)
3649 {
3650 	struct il_rxon_cmd *rxon = &il->staging;
3651 	bool error = false;
3652 
3653 	if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
3654 		if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
3655 			IL_WARN("check 2.4G: wrong narrow\n");
3656 			error = true;
3657 		}
3658 		if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
3659 			IL_WARN("check 2.4G: wrong radar\n");
3660 			error = true;
3661 		}
3662 	} else {
3663 		if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
3664 			IL_WARN("check 5.2G: not short slot!\n");
3665 			error = true;
3666 		}
3667 		if (rxon->flags & RXON_FLG_CCK_MSK) {
3668 			IL_WARN("check 5.2G: CCK!\n");
3669 			error = true;
3670 		}
3671 	}
3672 	if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
3673 		IL_WARN("mac/bssid mcast!\n");
3674 		error = true;
3675 	}
3676 
3677 	/* make sure basic rates 6Mbps and 1Mbps are supported */
3678 	if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
3679 	    (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
3680 		IL_WARN("neither 1 nor 6 are basic\n");
3681 		error = true;
3682 	}
3683 
3684 	if (le16_to_cpu(rxon->assoc_id) > 2007) {
3685 		IL_WARN("aid > 2007\n");
3686 		error = true;
3687 	}
3688 
3689 	if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
3690 	    (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
3691 		IL_WARN("CCK and short slot\n");
3692 		error = true;
3693 	}
3694 
3695 	if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
3696 	    (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
3697 		IL_WARN("CCK and auto detect");
3698 		error = true;
3699 	}
3700 
3701 	if ((rxon->
3702 	     flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
3703 	    RXON_FLG_TGG_PROTECT_MSK) {
3704 		IL_WARN("TGg but no auto-detect\n");
3705 		error = true;
3706 	}
3707 
3708 	if (error)
3709 		IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
3710 
3711 	if (error) {
3712 		IL_ERR("Invalid RXON\n");
3713 		return -EINVAL;
3714 	}
3715 	return 0;
3716 }
3717 EXPORT_SYMBOL(il_check_rxon_cmd);
3718 
3719 /**
3720  * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
3721  * @il: staging_rxon is compared to active_rxon
3722  *
3723  * If the RXON structure is changing enough to require a new tune,
3724  * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
3725  * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
3726  */
3727 int
il_full_rxon_required(struct il_priv * il)3728 il_full_rxon_required(struct il_priv *il)
3729 {
3730 	const struct il_rxon_cmd *staging = &il->staging;
3731 	const struct il_rxon_cmd *active = &il->active;
3732 
3733 #define CHK(cond)							\
3734 	if ((cond)) {							\
3735 		D_INFO("need full RXON - " #cond "\n");	\
3736 		return 1;						\
3737 	}
3738 
3739 #define CHK_NEQ(c1, c2)						\
3740 	if ((c1) != (c2)) {					\
3741 		D_INFO("need full RXON - "	\
3742 			       #c1 " != " #c2 " - %d != %d\n",	\
3743 			       (c1), (c2));			\
3744 		return 1;					\
3745 	}
3746 
3747 	/* These items are only settable from the full RXON command */
3748 	CHK(!il_is_associated(il));
3749 	CHK(!ether_addr_equal(staging->bssid_addr, active->bssid_addr));
3750 	CHK(!ether_addr_equal(staging->node_addr, active->node_addr));
3751 	CHK(!ether_addr_equal(staging->wlap_bssid_addr,
3752 			      active->wlap_bssid_addr));
3753 	CHK_NEQ(staging->dev_type, active->dev_type);
3754 	CHK_NEQ(staging->channel, active->channel);
3755 	CHK_NEQ(staging->air_propagation, active->air_propagation);
3756 	CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
3757 		active->ofdm_ht_single_stream_basic_rates);
3758 	CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
3759 		active->ofdm_ht_dual_stream_basic_rates);
3760 	CHK_NEQ(staging->assoc_id, active->assoc_id);
3761 
3762 	/* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
3763 	 * be updated with the RXON_ASSOC command -- however only some
3764 	 * flag transitions are allowed using RXON_ASSOC */
3765 
3766 	/* Check if we are not switching bands */
3767 	CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
3768 		active->flags & RXON_FLG_BAND_24G_MSK);
3769 
3770 	/* Check if we are switching association toggle */
3771 	CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
3772 		active->filter_flags & RXON_FILTER_ASSOC_MSK);
3773 
3774 #undef CHK
3775 #undef CHK_NEQ
3776 
3777 	return 0;
3778 }
3779 EXPORT_SYMBOL(il_full_rxon_required);
3780 
3781 u8
il_get_lowest_plcp(struct il_priv * il)3782 il_get_lowest_plcp(struct il_priv *il)
3783 {
3784 	/*
3785 	 * Assign the lowest rate -- should really get this from
3786 	 * the beacon skb from mac80211.
3787 	 */
3788 	if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
3789 		return RATE_1M_PLCP;
3790 	else
3791 		return RATE_6M_PLCP;
3792 }
3793 EXPORT_SYMBOL(il_get_lowest_plcp);
3794 
3795 static void
_il_set_rxon_ht(struct il_priv * il,struct il_ht_config * ht_conf)3796 _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3797 {
3798 	struct il_rxon_cmd *rxon = &il->staging;
3799 
3800 	if (!il->ht.enabled) {
3801 		rxon->flags &=
3802 		    ~(RXON_FLG_CHANNEL_MODE_MSK |
3803 		      RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
3804 		      | RXON_FLG_HT_PROT_MSK);
3805 		return;
3806 	}
3807 
3808 	rxon->flags |=
3809 	    cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
3810 
3811 	/* Set up channel bandwidth:
3812 	 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
3813 	/* clear the HT channel mode before set the mode */
3814 	rxon->flags &=
3815 	    ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3816 	if (il_is_ht40_tx_allowed(il, NULL)) {
3817 		/* pure ht40 */
3818 		if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
3819 			rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
3820 			/* Note: control channel is opposite of extension channel */
3821 			switch (il->ht.extension_chan_offset) {
3822 			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3823 				rxon->flags &=
3824 				    ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3825 				break;
3826 			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3827 				rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3828 				break;
3829 			}
3830 		} else {
3831 			/* Note: control channel is opposite of extension channel */
3832 			switch (il->ht.extension_chan_offset) {
3833 			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
3834 				rxon->flags &=
3835 				    ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
3836 				rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3837 				break;
3838 			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
3839 				rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
3840 				rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
3841 				break;
3842 			case IEEE80211_HT_PARAM_CHA_SEC_NONE:
3843 			default:
3844 				/* channel location only valid if in Mixed mode */
3845 				IL_ERR("invalid extension channel offset\n");
3846 				break;
3847 			}
3848 		}
3849 	} else {
3850 		rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
3851 	}
3852 
3853 	if (il->ops->set_rxon_chain)
3854 		il->ops->set_rxon_chain(il);
3855 
3856 	D_ASSOC("rxon flags 0x%X operation mode :0x%X "
3857 		"extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
3858 		il->ht.protection, il->ht.extension_chan_offset);
3859 }
3860 
3861 void
il_set_rxon_ht(struct il_priv * il,struct il_ht_config * ht_conf)3862 il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
3863 {
3864 	_il_set_rxon_ht(il, ht_conf);
3865 }
3866 EXPORT_SYMBOL(il_set_rxon_ht);
3867 
3868 /* Return valid, unused, channel for a passive scan to reset the RF */
3869 u8
il_get_single_channel_number(struct il_priv * il,enum ieee80211_band band)3870 il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band)
3871 {
3872 	const struct il_channel_info *ch_info;
3873 	int i;
3874 	u8 channel = 0;
3875 	u8 min, max;
3876 
3877 	if (band == IEEE80211_BAND_5GHZ) {
3878 		min = 14;
3879 		max = il->channel_count;
3880 	} else {
3881 		min = 0;
3882 		max = 14;
3883 	}
3884 
3885 	for (i = min; i < max; i++) {
3886 		channel = il->channel_info[i].channel;
3887 		if (channel == le16_to_cpu(il->staging.channel))
3888 			continue;
3889 
3890 		ch_info = il_get_channel_info(il, band, channel);
3891 		if (il_is_channel_valid(ch_info))
3892 			break;
3893 	}
3894 
3895 	return channel;
3896 }
3897 EXPORT_SYMBOL(il_get_single_channel_number);
3898 
3899 /**
3900  * il_set_rxon_channel - Set the band and channel values in staging RXON
3901  * @ch: requested channel as a pointer to struct ieee80211_channel
3902 
3903  * NOTE:  Does not commit to the hardware; it sets appropriate bit fields
3904  * in the staging RXON flag structure based on the ch->band
3905  */
3906 int
il_set_rxon_channel(struct il_priv * il,struct ieee80211_channel * ch)3907 il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
3908 {
3909 	enum ieee80211_band band = ch->band;
3910 	u16 channel = ch->hw_value;
3911 
3912 	if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
3913 		return 0;
3914 
3915 	il->staging.channel = cpu_to_le16(channel);
3916 	if (band == IEEE80211_BAND_5GHZ)
3917 		il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
3918 	else
3919 		il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3920 
3921 	il->band = band;
3922 
3923 	D_INFO("Staging channel set to %d [%d]\n", channel, band);
3924 
3925 	return 0;
3926 }
3927 EXPORT_SYMBOL(il_set_rxon_channel);
3928 
3929 void
il_set_flags_for_band(struct il_priv * il,enum ieee80211_band band,struct ieee80211_vif * vif)3930 il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
3931 		      struct ieee80211_vif *vif)
3932 {
3933 	if (band == IEEE80211_BAND_5GHZ) {
3934 		il->staging.flags &=
3935 		    ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
3936 		      RXON_FLG_CCK_MSK);
3937 		il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3938 	} else {
3939 		/* Copied from il_post_associate() */
3940 		if (vif && vif->bss_conf.use_short_slot)
3941 			il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
3942 		else
3943 			il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3944 
3945 		il->staging.flags |= RXON_FLG_BAND_24G_MSK;
3946 		il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
3947 		il->staging.flags &= ~RXON_FLG_CCK_MSK;
3948 	}
3949 }
3950 EXPORT_SYMBOL(il_set_flags_for_band);
3951 
3952 /*
3953  * initialize rxon structure with default values from eeprom
3954  */
3955 void
il_connection_init_rx_config(struct il_priv * il)3956 il_connection_init_rx_config(struct il_priv *il)
3957 {
3958 	const struct il_channel_info *ch_info;
3959 
3960 	memset(&il->staging, 0, sizeof(il->staging));
3961 
3962 	switch (il->iw_mode) {
3963 	case NL80211_IFTYPE_UNSPECIFIED:
3964 		il->staging.dev_type = RXON_DEV_TYPE_ESS;
3965 		break;
3966 	case NL80211_IFTYPE_STATION:
3967 		il->staging.dev_type = RXON_DEV_TYPE_ESS;
3968 		il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
3969 		break;
3970 	case NL80211_IFTYPE_ADHOC:
3971 		il->staging.dev_type = RXON_DEV_TYPE_IBSS;
3972 		il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
3973 		il->staging.filter_flags =
3974 		    RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
3975 		break;
3976 	default:
3977 		IL_ERR("Unsupported interface type %d\n", il->vif->type);
3978 		return;
3979 	}
3980 
3981 #if 0
3982 	/* TODO:  Figure out when short_preamble would be set and cache from
3983 	 * that */
3984 	if (!hw_to_local(il->hw)->short_preamble)
3985 		il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
3986 	else
3987 		il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
3988 #endif
3989 
3990 	ch_info =
3991 	    il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
3992 
3993 	if (!ch_info)
3994 		ch_info = &il->channel_info[0];
3995 
3996 	il->staging.channel = cpu_to_le16(ch_info->channel);
3997 	il->band = ch_info->band;
3998 
3999 	il_set_flags_for_band(il, il->band, il->vif);
4000 
4001 	il->staging.ofdm_basic_rates =
4002 	    (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4003 	il->staging.cck_basic_rates =
4004 	    (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4005 
4006 	/* clear both MIX and PURE40 mode flag */
4007 	il->staging.flags &=
4008 	    ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
4009 	if (il->vif)
4010 		memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
4011 
4012 	il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
4013 	il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
4014 }
4015 EXPORT_SYMBOL(il_connection_init_rx_config);
4016 
4017 void
il_set_rate(struct il_priv * il)4018 il_set_rate(struct il_priv *il)
4019 {
4020 	const struct ieee80211_supported_band *hw = NULL;
4021 	struct ieee80211_rate *rate;
4022 	int i;
4023 
4024 	hw = il_get_hw_mode(il, il->band);
4025 	if (!hw) {
4026 		IL_ERR("Failed to set rate: unable to get hw mode\n");
4027 		return;
4028 	}
4029 
4030 	il->active_rate = 0;
4031 
4032 	for (i = 0; i < hw->n_bitrates; i++) {
4033 		rate = &(hw->bitrates[i]);
4034 		if (rate->hw_value < RATE_COUNT_LEGACY)
4035 			il->active_rate |= (1 << rate->hw_value);
4036 	}
4037 
4038 	D_RATE("Set active_rate = %0x\n", il->active_rate);
4039 
4040 	il->staging.cck_basic_rates =
4041 	    (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
4042 
4043 	il->staging.ofdm_basic_rates =
4044 	    (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
4045 }
4046 EXPORT_SYMBOL(il_set_rate);
4047 
4048 void
il_chswitch_done(struct il_priv * il,bool is_success)4049 il_chswitch_done(struct il_priv *il, bool is_success)
4050 {
4051 	if (test_bit(S_EXIT_PENDING, &il->status))
4052 		return;
4053 
4054 	if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4055 		ieee80211_chswitch_done(il->vif, is_success);
4056 }
4057 EXPORT_SYMBOL(il_chswitch_done);
4058 
4059 void
il_hdl_csa(struct il_priv * il,struct il_rx_buf * rxb)4060 il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
4061 {
4062 	struct il_rx_pkt *pkt = rxb_addr(rxb);
4063 	struct il_csa_notification *csa = &(pkt->u.csa_notif);
4064 	struct il_rxon_cmd *rxon = (void *)&il->active;
4065 
4066 	if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
4067 		return;
4068 
4069 	if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
4070 		rxon->channel = csa->channel;
4071 		il->staging.channel = csa->channel;
4072 		D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
4073 		il_chswitch_done(il, true);
4074 	} else {
4075 		IL_ERR("CSA notif (fail) : channel %d\n",
4076 		       le16_to_cpu(csa->channel));
4077 		il_chswitch_done(il, false);
4078 	}
4079 }
4080 EXPORT_SYMBOL(il_hdl_csa);
4081 
4082 #ifdef CONFIG_IWLEGACY_DEBUG
4083 void
il_print_rx_config_cmd(struct il_priv * il)4084 il_print_rx_config_cmd(struct il_priv *il)
4085 {
4086 	struct il_rxon_cmd *rxon = &il->staging;
4087 
4088 	D_RADIO("RX CONFIG:\n");
4089 	il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
4090 	D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
4091 	D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
4092 	D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
4093 	D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
4094 	D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
4095 	D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
4096 	D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
4097 	D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
4098 	D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
4099 }
4100 EXPORT_SYMBOL(il_print_rx_config_cmd);
4101 #endif
4102 /**
4103  * il_irq_handle_error - called for HW or SW error interrupt from card
4104  */
4105 void
il_irq_handle_error(struct il_priv * il)4106 il_irq_handle_error(struct il_priv *il)
4107 {
4108 	/* Set the FW error flag -- cleared on il_down */
4109 	set_bit(S_FW_ERROR, &il->status);
4110 
4111 	/* Cancel currently queued command. */
4112 	clear_bit(S_HCMD_ACTIVE, &il->status);
4113 
4114 	IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
4115 
4116 	il->ops->dump_nic_error_log(il);
4117 	if (il->ops->dump_fh)
4118 		il->ops->dump_fh(il, NULL, false);
4119 #ifdef CONFIG_IWLEGACY_DEBUG
4120 	if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
4121 		il_print_rx_config_cmd(il);
4122 #endif
4123 
4124 	wake_up(&il->wait_command_queue);
4125 
4126 	/* Keep the restart process from trying to send host
4127 	 * commands by clearing the INIT status bit */
4128 	clear_bit(S_READY, &il->status);
4129 
4130 	if (!test_bit(S_EXIT_PENDING, &il->status)) {
4131 		IL_DBG(IL_DL_FW_ERRORS,
4132 		       "Restarting adapter due to uCode error.\n");
4133 
4134 		if (il->cfg->mod_params->restart_fw)
4135 			queue_work(il->workqueue, &il->restart);
4136 	}
4137 }
4138 EXPORT_SYMBOL(il_irq_handle_error);
4139 
4140 static int
_il_apm_stop_master(struct il_priv * il)4141 _il_apm_stop_master(struct il_priv *il)
4142 {
4143 	int ret = 0;
4144 
4145 	/* stop device's busmaster DMA activity */
4146 	_il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
4147 
4148 	ret =
4149 	    _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
4150 			 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
4151 	if (ret < 0)
4152 		IL_WARN("Master Disable Timed Out, 100 usec\n");
4153 
4154 	D_INFO("stop master\n");
4155 
4156 	return ret;
4157 }
4158 
4159 void
_il_apm_stop(struct il_priv * il)4160 _il_apm_stop(struct il_priv *il)
4161 {
4162 	lockdep_assert_held(&il->reg_lock);
4163 
4164 	D_INFO("Stop card, put in low power state\n");
4165 
4166 	/* Stop device's DMA activity */
4167 	_il_apm_stop_master(il);
4168 
4169 	/* Reset the entire device */
4170 	_il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
4171 
4172 	udelay(10);
4173 
4174 	/*
4175 	 * Clear "initialization complete" bit to move adapter from
4176 	 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
4177 	 */
4178 	_il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4179 }
4180 EXPORT_SYMBOL(_il_apm_stop);
4181 
4182 void
il_apm_stop(struct il_priv * il)4183 il_apm_stop(struct il_priv *il)
4184 {
4185 	unsigned long flags;
4186 
4187 	spin_lock_irqsave(&il->reg_lock, flags);
4188 	_il_apm_stop(il);
4189 	spin_unlock_irqrestore(&il->reg_lock, flags);
4190 }
4191 EXPORT_SYMBOL(il_apm_stop);
4192 
4193 /*
4194  * Start up NIC's basic functionality after it has been reset
4195  * (e.g. after platform boot, or shutdown via il_apm_stop())
4196  * NOTE:  This does not load uCode nor start the embedded processor
4197  */
4198 int
il_apm_init(struct il_priv * il)4199 il_apm_init(struct il_priv *il)
4200 {
4201 	int ret = 0;
4202 	u16 lctl;
4203 
4204 	D_INFO("Init card's basic functions\n");
4205 
4206 	/*
4207 	 * Use "set_bit" below rather than "write", to preserve any hardware
4208 	 * bits already set by default after reset.
4209 	 */
4210 
4211 	/* Disable L0S exit timer (platform NMI Work/Around) */
4212 	il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4213 		   CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
4214 
4215 	/*
4216 	 * Disable L0s without affecting L1;
4217 	 *  don't wait for ICH L0s (ICH bug W/A)
4218 	 */
4219 	il_set_bit(il, CSR_GIO_CHICKEN_BITS,
4220 		   CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
4221 
4222 	/* Set FH wait threshold to maximum (HW error during stress W/A) */
4223 	il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
4224 
4225 	/*
4226 	 * Enable HAP INTA (interrupt from management bus) to
4227 	 * wake device's PCI Express link L1a -> L0s
4228 	 * NOTE:  This is no-op for 3945 (non-existent bit)
4229 	 */
4230 	il_set_bit(il, CSR_HW_IF_CONFIG_REG,
4231 		   CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
4232 
4233 	/*
4234 	 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
4235 	 * Check if BIOS (or OS) enabled L1-ASPM on this device.
4236 	 * If so (likely), disable L0S, so device moves directly L0->L1;
4237 	 *    costs negligible amount of power savings.
4238 	 * If not (unlikely), enable L0S, so there is at least some
4239 	 *    power savings, even without L1.
4240 	 */
4241 	if (il->cfg->set_l0s) {
4242 		pcie_capability_read_word(il->pci_dev, PCI_EXP_LNKCTL, &lctl);
4243 		if (lctl & PCI_EXP_LNKCTL_ASPM_L1) {
4244 			/* L1-ASPM enabled; disable(!) L0S  */
4245 			il_set_bit(il, CSR_GIO_REG,
4246 				   CSR_GIO_REG_VAL_L0S_ENABLED);
4247 			D_POWER("L1 Enabled; Disabling L0S\n");
4248 		} else {
4249 			/* L1-ASPM disabled; enable(!) L0S */
4250 			il_clear_bit(il, CSR_GIO_REG,
4251 				     CSR_GIO_REG_VAL_L0S_ENABLED);
4252 			D_POWER("L1 Disabled; Enabling L0S\n");
4253 		}
4254 	}
4255 
4256 	/* Configure analog phase-lock-loop before activating to D0A */
4257 	if (il->cfg->pll_cfg_val)
4258 		il_set_bit(il, CSR_ANA_PLL_CFG,
4259 			   il->cfg->pll_cfg_val);
4260 
4261 	/*
4262 	 * Set "initialization complete" bit to move adapter from
4263 	 * D0U* --> D0A* (powered-up active) state.
4264 	 */
4265 	il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
4266 
4267 	/*
4268 	 * Wait for clock stabilization; once stabilized, access to
4269 	 * device-internal resources is supported, e.g. il_wr_prph()
4270 	 * and accesses to uCode SRAM.
4271 	 */
4272 	ret =
4273 	    _il_poll_bit(il, CSR_GP_CNTRL,
4274 			 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
4275 			 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
4276 	if (ret < 0) {
4277 		D_INFO("Failed to init the card\n");
4278 		goto out;
4279 	}
4280 
4281 	/*
4282 	 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
4283 	 * BSM (Boostrap State Machine) is only in 3945 and 4965.
4284 	 *
4285 	 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
4286 	 * do not disable clocks.  This preserves any hardware bits already
4287 	 * set by default in "CLK_CTRL_REG" after reset.
4288 	 */
4289 	if (il->cfg->use_bsm)
4290 		il_wr_prph(il, APMG_CLK_EN_REG,
4291 			   APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
4292 	else
4293 		il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
4294 	udelay(20);
4295 
4296 	/* Disable L1-Active */
4297 	il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
4298 			 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
4299 
4300 out:
4301 	return ret;
4302 }
4303 EXPORT_SYMBOL(il_apm_init);
4304 
4305 int
il_set_tx_power(struct il_priv * il,s8 tx_power,bool force)4306 il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
4307 {
4308 	int ret;
4309 	s8 prev_tx_power;
4310 	bool defer;
4311 
4312 	lockdep_assert_held(&il->mutex);
4313 
4314 	if (il->tx_power_user_lmt == tx_power && !force)
4315 		return 0;
4316 
4317 	if (!il->ops->send_tx_power)
4318 		return -EOPNOTSUPP;
4319 
4320 	/* 0 dBm mean 1 milliwatt */
4321 	if (tx_power < 0) {
4322 		IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
4323 		return -EINVAL;
4324 	}
4325 
4326 	if (tx_power > il->tx_power_device_lmt) {
4327 		IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
4328 			tx_power, il->tx_power_device_lmt);
4329 		return -EINVAL;
4330 	}
4331 
4332 	if (!il_is_ready_rf(il))
4333 		return -EIO;
4334 
4335 	/* scan complete and commit_rxon use tx_power_next value,
4336 	 * it always need to be updated for newest request */
4337 	il->tx_power_next = tx_power;
4338 
4339 	/* do not set tx power when scanning or channel changing */
4340 	defer = test_bit(S_SCANNING, &il->status) ||
4341 	    memcmp(&il->active, &il->staging, sizeof(il->staging));
4342 	if (defer && !force) {
4343 		D_INFO("Deferring tx power set\n");
4344 		return 0;
4345 	}
4346 
4347 	prev_tx_power = il->tx_power_user_lmt;
4348 	il->tx_power_user_lmt = tx_power;
4349 
4350 	ret = il->ops->send_tx_power(il);
4351 
4352 	/* if fail to set tx_power, restore the orig. tx power */
4353 	if (ret) {
4354 		il->tx_power_user_lmt = prev_tx_power;
4355 		il->tx_power_next = prev_tx_power;
4356 	}
4357 	return ret;
4358 }
4359 EXPORT_SYMBOL(il_set_tx_power);
4360 
4361 void
il_send_bt_config(struct il_priv * il)4362 il_send_bt_config(struct il_priv *il)
4363 {
4364 	struct il_bt_cmd bt_cmd = {
4365 		.lead_time = BT_LEAD_TIME_DEF,
4366 		.max_kill = BT_MAX_KILL_DEF,
4367 		.kill_ack_mask = 0,
4368 		.kill_cts_mask = 0,
4369 	};
4370 
4371 	if (!bt_coex_active)
4372 		bt_cmd.flags = BT_COEX_DISABLE;
4373 	else
4374 		bt_cmd.flags = BT_COEX_ENABLE;
4375 
4376 	D_INFO("BT coex %s\n",
4377 	       (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
4378 
4379 	if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
4380 		IL_ERR("failed to send BT Coex Config\n");
4381 }
4382 EXPORT_SYMBOL(il_send_bt_config);
4383 
4384 int
il_send_stats_request(struct il_priv * il,u8 flags,bool clear)4385 il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
4386 {
4387 	struct il_stats_cmd stats_cmd = {
4388 		.configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
4389 	};
4390 
4391 	if (flags & CMD_ASYNC)
4392 		return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
4393 					     &stats_cmd, NULL);
4394 	else
4395 		return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
4396 				       &stats_cmd);
4397 }
4398 EXPORT_SYMBOL(il_send_stats_request);
4399 
4400 void
il_hdl_pm_sleep(struct il_priv * il,struct il_rx_buf * rxb)4401 il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
4402 {
4403 #ifdef CONFIG_IWLEGACY_DEBUG
4404 	struct il_rx_pkt *pkt = rxb_addr(rxb);
4405 	struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
4406 	D_RX("sleep mode: %d, src: %d\n",
4407 	     sleep->pm_sleep_mode, sleep->pm_wakeup_src);
4408 #endif
4409 }
4410 EXPORT_SYMBOL(il_hdl_pm_sleep);
4411 
4412 void
il_hdl_pm_debug_stats(struct il_priv * il,struct il_rx_buf * rxb)4413 il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
4414 {
4415 	struct il_rx_pkt *pkt = rxb_addr(rxb);
4416 	u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
4417 	D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
4418 		il_get_cmd_string(pkt->hdr.cmd));
4419 	il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
4420 }
4421 EXPORT_SYMBOL(il_hdl_pm_debug_stats);
4422 
4423 void
il_hdl_error(struct il_priv * il,struct il_rx_buf * rxb)4424 il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
4425 {
4426 	struct il_rx_pkt *pkt = rxb_addr(rxb);
4427 
4428 	IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
4429 	       "seq 0x%04X ser 0x%08X\n",
4430 	       le32_to_cpu(pkt->u.err_resp.error_type),
4431 	       il_get_cmd_string(pkt->u.err_resp.cmd_id),
4432 	       pkt->u.err_resp.cmd_id,
4433 	       le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
4434 	       le32_to_cpu(pkt->u.err_resp.error_info));
4435 }
4436 EXPORT_SYMBOL(il_hdl_error);
4437 
4438 void
il_clear_isr_stats(struct il_priv * il)4439 il_clear_isr_stats(struct il_priv *il)
4440 {
4441 	memset(&il->isr_stats, 0, sizeof(il->isr_stats));
4442 }
4443 
4444 int
il_mac_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)4445 il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
4446 	       const struct ieee80211_tx_queue_params *params)
4447 {
4448 	struct il_priv *il = hw->priv;
4449 	unsigned long flags;
4450 	int q;
4451 
4452 	D_MAC80211("enter\n");
4453 
4454 	if (!il_is_ready_rf(il)) {
4455 		D_MAC80211("leave - RF not ready\n");
4456 		return -EIO;
4457 	}
4458 
4459 	if (queue >= AC_NUM) {
4460 		D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
4461 		return 0;
4462 	}
4463 
4464 	q = AC_NUM - 1 - queue;
4465 
4466 	spin_lock_irqsave(&il->lock, flags);
4467 
4468 	il->qos_data.def_qos_parm.ac[q].cw_min =
4469 	    cpu_to_le16(params->cw_min);
4470 	il->qos_data.def_qos_parm.ac[q].cw_max =
4471 	    cpu_to_le16(params->cw_max);
4472 	il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
4473 	il->qos_data.def_qos_parm.ac[q].edca_txop =
4474 	    cpu_to_le16((params->txop * 32));
4475 
4476 	il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
4477 
4478 	spin_unlock_irqrestore(&il->lock, flags);
4479 
4480 	D_MAC80211("leave\n");
4481 	return 0;
4482 }
4483 EXPORT_SYMBOL(il_mac_conf_tx);
4484 
4485 int
il_mac_tx_last_beacon(struct ieee80211_hw * hw)4486 il_mac_tx_last_beacon(struct ieee80211_hw *hw)
4487 {
4488 	struct il_priv *il = hw->priv;
4489 	int ret;
4490 
4491 	D_MAC80211("enter\n");
4492 
4493 	ret = (il->ibss_manager == IL_IBSS_MANAGER);
4494 
4495 	D_MAC80211("leave ret %d\n", ret);
4496 	return ret;
4497 }
4498 EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
4499 
4500 static int
il_set_mode(struct il_priv * il)4501 il_set_mode(struct il_priv *il)
4502 {
4503 	il_connection_init_rx_config(il);
4504 
4505 	if (il->ops->set_rxon_chain)
4506 		il->ops->set_rxon_chain(il);
4507 
4508 	return il_commit_rxon(il);
4509 }
4510 
4511 int
il_mac_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)4512 il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4513 {
4514 	struct il_priv *il = hw->priv;
4515 	int err;
4516 	bool reset;
4517 
4518 	mutex_lock(&il->mutex);
4519 	D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4520 
4521 	if (!il_is_ready_rf(il)) {
4522 		IL_WARN("Try to add interface when device not ready\n");
4523 		err = -EINVAL;
4524 		goto out;
4525 	}
4526 
4527 	/*
4528 	 * We do not support multiple virtual interfaces, but on hardware reset
4529 	 * we have to add the same interface again.
4530 	 */
4531 	reset = (il->vif == vif);
4532 	if (il->vif && !reset) {
4533 		err = -EOPNOTSUPP;
4534 		goto out;
4535 	}
4536 
4537 	il->vif = vif;
4538 	il->iw_mode = vif->type;
4539 
4540 	err = il_set_mode(il);
4541 	if (err) {
4542 		IL_WARN("Fail to set mode %d\n", vif->type);
4543 		if (!reset) {
4544 			il->vif = NULL;
4545 			il->iw_mode = NL80211_IFTYPE_STATION;
4546 		}
4547 	}
4548 
4549 out:
4550 	D_MAC80211("leave err %d\n", err);
4551 	mutex_unlock(&il->mutex);
4552 
4553 	return err;
4554 }
4555 EXPORT_SYMBOL(il_mac_add_interface);
4556 
4557 static void
il_teardown_interface(struct il_priv * il,struct ieee80211_vif * vif)4558 il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif)
4559 {
4560 	lockdep_assert_held(&il->mutex);
4561 
4562 	if (il->scan_vif == vif) {
4563 		il_scan_cancel_timeout(il, 200);
4564 		il_force_scan_end(il);
4565 	}
4566 
4567 	il_set_mode(il);
4568 }
4569 
4570 void
il_mac_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)4571 il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
4572 {
4573 	struct il_priv *il = hw->priv;
4574 
4575 	mutex_lock(&il->mutex);
4576 	D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
4577 
4578 	WARN_ON(il->vif != vif);
4579 	il->vif = NULL;
4580 	il->iw_mode = NL80211_IFTYPE_UNSPECIFIED;
4581 	il_teardown_interface(il, vif);
4582 	memset(il->bssid, 0, ETH_ALEN);
4583 
4584 	D_MAC80211("leave\n");
4585 	mutex_unlock(&il->mutex);
4586 }
4587 EXPORT_SYMBOL(il_mac_remove_interface);
4588 
4589 int
il_alloc_txq_mem(struct il_priv * il)4590 il_alloc_txq_mem(struct il_priv *il)
4591 {
4592 	if (!il->txq)
4593 		il->txq =
4594 		    kzalloc(sizeof(struct il_tx_queue) *
4595 			    il->cfg->num_of_queues, GFP_KERNEL);
4596 	if (!il->txq) {
4597 		IL_ERR("Not enough memory for txq\n");
4598 		return -ENOMEM;
4599 	}
4600 	return 0;
4601 }
4602 EXPORT_SYMBOL(il_alloc_txq_mem);
4603 
4604 void
il_free_txq_mem(struct il_priv * il)4605 il_free_txq_mem(struct il_priv *il)
4606 {
4607 	kfree(il->txq);
4608 	il->txq = NULL;
4609 }
4610 EXPORT_SYMBOL(il_free_txq_mem);
4611 
4612 int
il_force_reset(struct il_priv * il,bool external)4613 il_force_reset(struct il_priv *il, bool external)
4614 {
4615 	struct il_force_reset *force_reset;
4616 
4617 	if (test_bit(S_EXIT_PENDING, &il->status))
4618 		return -EINVAL;
4619 
4620 	force_reset = &il->force_reset;
4621 	force_reset->reset_request_count++;
4622 	if (!external) {
4623 		if (force_reset->last_force_reset_jiffies &&
4624 		    time_after(force_reset->last_force_reset_jiffies +
4625 			       force_reset->reset_duration, jiffies)) {
4626 			D_INFO("force reset rejected\n");
4627 			force_reset->reset_reject_count++;
4628 			return -EAGAIN;
4629 		}
4630 	}
4631 	force_reset->reset_success_count++;
4632 	force_reset->last_force_reset_jiffies = jiffies;
4633 
4634 	/*
4635 	 * if the request is from external(ex: debugfs),
4636 	 * then always perform the request in regardless the module
4637 	 * parameter setting
4638 	 * if the request is from internal (uCode error or driver
4639 	 * detect failure), then fw_restart module parameter
4640 	 * need to be check before performing firmware reload
4641 	 */
4642 
4643 	if (!external && !il->cfg->mod_params->restart_fw) {
4644 		D_INFO("Cancel firmware reload based on "
4645 		       "module parameter setting\n");
4646 		return 0;
4647 	}
4648 
4649 	IL_ERR("On demand firmware reload\n");
4650 
4651 	/* Set the FW error flag -- cleared on il_down */
4652 	set_bit(S_FW_ERROR, &il->status);
4653 	wake_up(&il->wait_command_queue);
4654 	/*
4655 	 * Keep the restart process from trying to send host
4656 	 * commands by clearing the INIT status bit
4657 	 */
4658 	clear_bit(S_READY, &il->status);
4659 	queue_work(il->workqueue, &il->restart);
4660 
4661 	return 0;
4662 }
4663 
4664 int
il_mac_change_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif,enum nl80211_iftype newtype,bool newp2p)4665 il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
4666 			enum nl80211_iftype newtype, bool newp2p)
4667 {
4668 	struct il_priv *il = hw->priv;
4669 	int err;
4670 
4671 	mutex_lock(&il->mutex);
4672 	D_MAC80211("enter: type %d, addr %pM newtype %d newp2p %d\n",
4673 		    vif->type, vif->addr, newtype, newp2p);
4674 
4675 	if (newp2p) {
4676 		err = -EOPNOTSUPP;
4677 		goto out;
4678 	}
4679 
4680 	if (!il->vif || !il_is_ready_rf(il)) {
4681 		/*
4682 		 * Huh? But wait ... this can maybe happen when
4683 		 * we're in the middle of a firmware restart!
4684 		 */
4685 		err = -EBUSY;
4686 		goto out;
4687 	}
4688 
4689 	/* success */
4690 	vif->type = newtype;
4691 	vif->p2p = false;
4692 	il->iw_mode = newtype;
4693 	il_teardown_interface(il, vif);
4694 	err = 0;
4695 
4696 out:
4697 	D_MAC80211("leave err %d\n", err);
4698 	mutex_unlock(&il->mutex);
4699 
4700 	return err;
4701 }
4702 EXPORT_SYMBOL(il_mac_change_interface);
4703 
il_mac_flush(struct ieee80211_hw * hw,u32 queues,bool drop)4704 void il_mac_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
4705 {
4706 	struct il_priv *il = hw->priv;
4707 	unsigned long timeout = jiffies + msecs_to_jiffies(500);
4708 	int i;
4709 
4710 	mutex_lock(&il->mutex);
4711 	D_MAC80211("enter\n");
4712 
4713 	if (il->txq == NULL)
4714 		goto out;
4715 
4716 	for (i = 0; i < il->hw_params.max_txq_num; i++) {
4717 		struct il_queue *q;
4718 
4719 		if (i == il->cmd_queue)
4720 			continue;
4721 
4722 		q = &il->txq[i].q;
4723 		if (q->read_ptr == q->write_ptr)
4724 			continue;
4725 
4726 		if (time_after(jiffies, timeout)) {
4727 			IL_ERR("Failed to flush queue %d\n", q->id);
4728 			break;
4729 		}
4730 
4731 		msleep(20);
4732 	}
4733 out:
4734 	D_MAC80211("leave\n");
4735 	mutex_unlock(&il->mutex);
4736 }
4737 EXPORT_SYMBOL(il_mac_flush);
4738 
4739 /*
4740  * On every watchdog tick we check (latest) time stamp. If it does not
4741  * change during timeout period and queue is not empty we reset firmware.
4742  */
4743 static int
il_check_stuck_queue(struct il_priv * il,int cnt)4744 il_check_stuck_queue(struct il_priv *il, int cnt)
4745 {
4746 	struct il_tx_queue *txq = &il->txq[cnt];
4747 	struct il_queue *q = &txq->q;
4748 	unsigned long timeout;
4749 	unsigned long now = jiffies;
4750 	int ret;
4751 
4752 	if (q->read_ptr == q->write_ptr) {
4753 		txq->time_stamp = now;
4754 		return 0;
4755 	}
4756 
4757 	timeout =
4758 	    txq->time_stamp +
4759 	    msecs_to_jiffies(il->cfg->wd_timeout);
4760 
4761 	if (time_after(now, timeout)) {
4762 		IL_ERR("Queue %d stuck for %u ms.\n", q->id,
4763 		       jiffies_to_msecs(now - txq->time_stamp));
4764 		ret = il_force_reset(il, false);
4765 		return (ret == -EAGAIN) ? 0 : 1;
4766 	}
4767 
4768 	return 0;
4769 }
4770 
4771 /*
4772  * Making watchdog tick be a quarter of timeout assure we will
4773  * discover the queue hung between timeout and 1.25*timeout
4774  */
4775 #define IL_WD_TICK(timeout) ((timeout) / 4)
4776 
4777 /*
4778  * Watchdog timer callback, we check each tx queue for stuck, if if hung
4779  * we reset the firmware. If everything is fine just rearm the timer.
4780  */
4781 void
il_bg_watchdog(unsigned long data)4782 il_bg_watchdog(unsigned long data)
4783 {
4784 	struct il_priv *il = (struct il_priv *)data;
4785 	int cnt;
4786 	unsigned long timeout;
4787 
4788 	if (test_bit(S_EXIT_PENDING, &il->status))
4789 		return;
4790 
4791 	timeout = il->cfg->wd_timeout;
4792 	if (timeout == 0)
4793 		return;
4794 
4795 	/* monitor and check for stuck cmd queue */
4796 	if (il_check_stuck_queue(il, il->cmd_queue))
4797 		return;
4798 
4799 	/* monitor and check for other stuck queues */
4800 	for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
4801 		/* skip as we already checked the command queue */
4802 		if (cnt == il->cmd_queue)
4803 			continue;
4804 		if (il_check_stuck_queue(il, cnt))
4805 			return;
4806 	}
4807 
4808 	mod_timer(&il->watchdog,
4809 		  jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4810 }
4811 EXPORT_SYMBOL(il_bg_watchdog);
4812 
4813 void
il_setup_watchdog(struct il_priv * il)4814 il_setup_watchdog(struct il_priv *il)
4815 {
4816 	unsigned int timeout = il->cfg->wd_timeout;
4817 
4818 	if (timeout)
4819 		mod_timer(&il->watchdog,
4820 			  jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
4821 	else
4822 		del_timer(&il->watchdog);
4823 }
4824 EXPORT_SYMBOL(il_setup_watchdog);
4825 
4826 /*
4827  * extended beacon time format
4828  * time in usec will be changed into a 32-bit value in extended:internal format
4829  * the extended part is the beacon counts
4830  * the internal part is the time in usec within one beacon interval
4831  */
4832 u32
il_usecs_to_beacons(struct il_priv * il,u32 usec,u32 beacon_interval)4833 il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
4834 {
4835 	u32 quot;
4836 	u32 rem;
4837 	u32 interval = beacon_interval * TIME_UNIT;
4838 
4839 	if (!interval || !usec)
4840 		return 0;
4841 
4842 	quot =
4843 	    (usec /
4844 	     interval) & (il_beacon_time_mask_high(il,
4845 						   il->hw_params.
4846 						   beacon_time_tsf_bits) >> il->
4847 			  hw_params.beacon_time_tsf_bits);
4848 	rem =
4849 	    (usec % interval) & il_beacon_time_mask_low(il,
4850 							il->hw_params.
4851 							beacon_time_tsf_bits);
4852 
4853 	return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
4854 }
4855 EXPORT_SYMBOL(il_usecs_to_beacons);
4856 
4857 /* base is usually what we get from ucode with each received frame,
4858  * the same as HW timer counter counting down
4859  */
4860 __le32
il_add_beacon_time(struct il_priv * il,u32 base,u32 addon,u32 beacon_interval)4861 il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
4862 		   u32 beacon_interval)
4863 {
4864 	u32 base_low = base & il_beacon_time_mask_low(il,
4865 						      il->hw_params.
4866 						      beacon_time_tsf_bits);
4867 	u32 addon_low = addon & il_beacon_time_mask_low(il,
4868 							il->hw_params.
4869 							beacon_time_tsf_bits);
4870 	u32 interval = beacon_interval * TIME_UNIT;
4871 	u32 res = (base & il_beacon_time_mask_high(il,
4872 						   il->hw_params.
4873 						   beacon_time_tsf_bits)) +
4874 	    (addon & il_beacon_time_mask_high(il,
4875 					      il->hw_params.
4876 					      beacon_time_tsf_bits));
4877 
4878 	if (base_low > addon_low)
4879 		res += base_low - addon_low;
4880 	else if (base_low < addon_low) {
4881 		res += interval + base_low - addon_low;
4882 		res += (1 << il->hw_params.beacon_time_tsf_bits);
4883 	} else
4884 		res += (1 << il->hw_params.beacon_time_tsf_bits);
4885 
4886 	return cpu_to_le32(res);
4887 }
4888 EXPORT_SYMBOL(il_add_beacon_time);
4889 
4890 #ifdef CONFIG_PM_SLEEP
4891 
4892 static int
il_pci_suspend(struct device * device)4893 il_pci_suspend(struct device *device)
4894 {
4895 	struct pci_dev *pdev = to_pci_dev(device);
4896 	struct il_priv *il = pci_get_drvdata(pdev);
4897 
4898 	/*
4899 	 * This function is called when system goes into suspend state
4900 	 * mac80211 will call il_mac_stop() from the mac80211 suspend function
4901 	 * first but since il_mac_stop() has no knowledge of who the caller is,
4902 	 * it will not call apm_ops.stop() to stop the DMA operation.
4903 	 * Calling apm_ops.stop here to make sure we stop the DMA.
4904 	 */
4905 	il_apm_stop(il);
4906 
4907 	return 0;
4908 }
4909 
4910 static int
il_pci_resume(struct device * device)4911 il_pci_resume(struct device *device)
4912 {
4913 	struct pci_dev *pdev = to_pci_dev(device);
4914 	struct il_priv *il = pci_get_drvdata(pdev);
4915 	bool hw_rfkill = false;
4916 
4917 	/*
4918 	 * We disable the RETRY_TIMEOUT register (0x41) to keep
4919 	 * PCI Tx retries from interfering with C3 CPU state.
4920 	 */
4921 	pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4922 
4923 	il_enable_interrupts(il);
4924 
4925 	if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
4926 		hw_rfkill = true;
4927 
4928 	if (hw_rfkill)
4929 		set_bit(S_RFKILL, &il->status);
4930 	else
4931 		clear_bit(S_RFKILL, &il->status);
4932 
4933 	wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
4934 
4935 	return 0;
4936 }
4937 
4938 SIMPLE_DEV_PM_OPS(il_pm_ops, il_pci_suspend, il_pci_resume);
4939 EXPORT_SYMBOL(il_pm_ops);
4940 
4941 #endif /* CONFIG_PM_SLEEP */
4942 
4943 static void
il_update_qos(struct il_priv * il)4944 il_update_qos(struct il_priv *il)
4945 {
4946 	if (test_bit(S_EXIT_PENDING, &il->status))
4947 		return;
4948 
4949 	il->qos_data.def_qos_parm.qos_flags = 0;
4950 
4951 	if (il->qos_data.qos_active)
4952 		il->qos_data.def_qos_parm.qos_flags |=
4953 		    QOS_PARAM_FLG_UPDATE_EDCA_MSK;
4954 
4955 	if (il->ht.enabled)
4956 		il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
4957 
4958 	D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
4959 	      il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
4960 
4961 	il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
4962 			      &il->qos_data.def_qos_parm, NULL);
4963 }
4964 
4965 /**
4966  * il_mac_config - mac80211 config callback
4967  */
4968 int
il_mac_config(struct ieee80211_hw * hw,u32 changed)4969 il_mac_config(struct ieee80211_hw *hw, u32 changed)
4970 {
4971 	struct il_priv *il = hw->priv;
4972 	const struct il_channel_info *ch_info;
4973 	struct ieee80211_conf *conf = &hw->conf;
4974 	struct ieee80211_channel *channel = conf->chandef.chan;
4975 	struct il_ht_config *ht_conf = &il->current_ht_config;
4976 	unsigned long flags = 0;
4977 	int ret = 0;
4978 	u16 ch;
4979 	int scan_active = 0;
4980 	bool ht_changed = false;
4981 
4982 	mutex_lock(&il->mutex);
4983 	D_MAC80211("enter: channel %d changed 0x%X\n", channel->hw_value,
4984 		   changed);
4985 
4986 	if (unlikely(test_bit(S_SCANNING, &il->status))) {
4987 		scan_active = 1;
4988 		D_MAC80211("scan active\n");
4989 	}
4990 
4991 	if (changed &
4992 	    (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
4993 		/* mac80211 uses static for non-HT which is what we want */
4994 		il->current_ht_config.smps = conf->smps_mode;
4995 
4996 		/*
4997 		 * Recalculate chain counts.
4998 		 *
4999 		 * If monitor mode is enabled then mac80211 will
5000 		 * set up the SM PS mode to OFF if an HT channel is
5001 		 * configured.
5002 		 */
5003 		if (il->ops->set_rxon_chain)
5004 			il->ops->set_rxon_chain(il);
5005 	}
5006 
5007 	/* during scanning mac80211 will delay channel setting until
5008 	 * scan finish with changed = 0
5009 	 */
5010 	if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
5011 
5012 		if (scan_active)
5013 			goto set_ch_out;
5014 
5015 		ch = channel->hw_value;
5016 		ch_info = il_get_channel_info(il, channel->band, ch);
5017 		if (!il_is_channel_valid(ch_info)) {
5018 			D_MAC80211("leave - invalid channel\n");
5019 			ret = -EINVAL;
5020 			goto set_ch_out;
5021 		}
5022 
5023 		if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
5024 		    !il_is_channel_ibss(ch_info)) {
5025 			D_MAC80211("leave - not IBSS channel\n");
5026 			ret = -EINVAL;
5027 			goto set_ch_out;
5028 		}
5029 
5030 		spin_lock_irqsave(&il->lock, flags);
5031 
5032 		/* Configure HT40 channels */
5033 		if (il->ht.enabled != conf_is_ht(conf)) {
5034 			il->ht.enabled = conf_is_ht(conf);
5035 			ht_changed = true;
5036 		}
5037 		if (il->ht.enabled) {
5038 			if (conf_is_ht40_minus(conf)) {
5039 				il->ht.extension_chan_offset =
5040 				    IEEE80211_HT_PARAM_CHA_SEC_BELOW;
5041 				il->ht.is_40mhz = true;
5042 			} else if (conf_is_ht40_plus(conf)) {
5043 				il->ht.extension_chan_offset =
5044 				    IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
5045 				il->ht.is_40mhz = true;
5046 			} else {
5047 				il->ht.extension_chan_offset =
5048 				    IEEE80211_HT_PARAM_CHA_SEC_NONE;
5049 				il->ht.is_40mhz = false;
5050 			}
5051 		} else
5052 			il->ht.is_40mhz = false;
5053 
5054 		/*
5055 		 * Default to no protection. Protection mode will
5056 		 * later be set from BSS config in il_ht_conf
5057 		 */
5058 		il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
5059 
5060 		/* if we are switching from ht to 2.4 clear flags
5061 		 * from any ht related info since 2.4 does not
5062 		 * support ht */
5063 		if ((le16_to_cpu(il->staging.channel) != ch))
5064 			il->staging.flags = 0;
5065 
5066 		il_set_rxon_channel(il, channel);
5067 		il_set_rxon_ht(il, ht_conf);
5068 
5069 		il_set_flags_for_band(il, channel->band, il->vif);
5070 
5071 		spin_unlock_irqrestore(&il->lock, flags);
5072 
5073 		if (il->ops->update_bcast_stations)
5074 			ret = il->ops->update_bcast_stations(il);
5075 
5076 set_ch_out:
5077 		/* The list of supported rates and rate mask can be different
5078 		 * for each band; since the band may have changed, reset
5079 		 * the rate mask to what mac80211 lists */
5080 		il_set_rate(il);
5081 	}
5082 
5083 	if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
5084 		ret = il_power_update_mode(il, false);
5085 		if (ret)
5086 			D_MAC80211("Error setting sleep level\n");
5087 	}
5088 
5089 	if (changed & IEEE80211_CONF_CHANGE_POWER) {
5090 		D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
5091 			   conf->power_level);
5092 
5093 		il_set_tx_power(il, conf->power_level, false);
5094 	}
5095 
5096 	if (!il_is_ready(il)) {
5097 		D_MAC80211("leave - not ready\n");
5098 		goto out;
5099 	}
5100 
5101 	if (scan_active)
5102 		goto out;
5103 
5104 	if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
5105 		il_commit_rxon(il);
5106 	else
5107 		D_INFO("Not re-sending same RXON configuration.\n");
5108 	if (ht_changed)
5109 		il_update_qos(il);
5110 
5111 out:
5112 	D_MAC80211("leave ret %d\n", ret);
5113 	mutex_unlock(&il->mutex);
5114 
5115 	return ret;
5116 }
5117 EXPORT_SYMBOL(il_mac_config);
5118 
5119 void
il_mac_reset_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)5120 il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5121 {
5122 	struct il_priv *il = hw->priv;
5123 	unsigned long flags;
5124 
5125 	mutex_lock(&il->mutex);
5126 	D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
5127 
5128 	spin_lock_irqsave(&il->lock, flags);
5129 
5130 	memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
5131 
5132 	/* new association get rid of ibss beacon skb */
5133 	if (il->beacon_skb)
5134 		dev_kfree_skb(il->beacon_skb);
5135 	il->beacon_skb = NULL;
5136 	il->timestamp = 0;
5137 
5138 	spin_unlock_irqrestore(&il->lock, flags);
5139 
5140 	il_scan_cancel_timeout(il, 100);
5141 	if (!il_is_ready_rf(il)) {
5142 		D_MAC80211("leave - not ready\n");
5143 		mutex_unlock(&il->mutex);
5144 		return;
5145 	}
5146 
5147 	/* we are restarting association process */
5148 	il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5149 	il_commit_rxon(il);
5150 
5151 	il_set_rate(il);
5152 
5153 	D_MAC80211("leave\n");
5154 	mutex_unlock(&il->mutex);
5155 }
5156 EXPORT_SYMBOL(il_mac_reset_tsf);
5157 
5158 static void
il_ht_conf(struct il_priv * il,struct ieee80211_vif * vif)5159 il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
5160 {
5161 	struct il_ht_config *ht_conf = &il->current_ht_config;
5162 	struct ieee80211_sta *sta;
5163 	struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5164 
5165 	D_ASSOC("enter:\n");
5166 
5167 	if (!il->ht.enabled)
5168 		return;
5169 
5170 	il->ht.protection =
5171 	    bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
5172 	il->ht.non_gf_sta_present =
5173 	    !!(bss_conf->
5174 	       ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5175 
5176 	ht_conf->single_chain_sufficient = false;
5177 
5178 	switch (vif->type) {
5179 	case NL80211_IFTYPE_STATION:
5180 		rcu_read_lock();
5181 		sta = ieee80211_find_sta(vif, bss_conf->bssid);
5182 		if (sta) {
5183 			struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
5184 			int maxstreams;
5185 
5186 			maxstreams =
5187 			    (ht_cap->mcs.
5188 			     tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
5189 			    >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
5190 			maxstreams += 1;
5191 
5192 			if (ht_cap->mcs.rx_mask[1] == 0 &&
5193 			    ht_cap->mcs.rx_mask[2] == 0)
5194 				ht_conf->single_chain_sufficient = true;
5195 			if (maxstreams <= 1)
5196 				ht_conf->single_chain_sufficient = true;
5197 		} else {
5198 			/*
5199 			 * If at all, this can only happen through a race
5200 			 * when the AP disconnects us while we're still
5201 			 * setting up the connection, in that case mac80211
5202 			 * will soon tell us about that.
5203 			 */
5204 			ht_conf->single_chain_sufficient = true;
5205 		}
5206 		rcu_read_unlock();
5207 		break;
5208 	case NL80211_IFTYPE_ADHOC:
5209 		ht_conf->single_chain_sufficient = true;
5210 		break;
5211 	default:
5212 		break;
5213 	}
5214 
5215 	D_ASSOC("leave\n");
5216 }
5217 
5218 static inline void
il_set_no_assoc(struct il_priv * il,struct ieee80211_vif * vif)5219 il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
5220 {
5221 	/*
5222 	 * inform the ucode that there is no longer an
5223 	 * association and that no more packets should be
5224 	 * sent
5225 	 */
5226 	il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
5227 	il->staging.assoc_id = 0;
5228 	il_commit_rxon(il);
5229 }
5230 
5231 static void
il_beacon_update(struct ieee80211_hw * hw,struct ieee80211_vif * vif)5232 il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
5233 {
5234 	struct il_priv *il = hw->priv;
5235 	unsigned long flags;
5236 	__le64 timestamp;
5237 	struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
5238 
5239 	if (!skb)
5240 		return;
5241 
5242 	D_MAC80211("enter\n");
5243 
5244 	lockdep_assert_held(&il->mutex);
5245 
5246 	if (!il->beacon_enabled) {
5247 		IL_ERR("update beacon with no beaconing enabled\n");
5248 		dev_kfree_skb(skb);
5249 		return;
5250 	}
5251 
5252 	spin_lock_irqsave(&il->lock, flags);
5253 
5254 	if (il->beacon_skb)
5255 		dev_kfree_skb(il->beacon_skb);
5256 
5257 	il->beacon_skb = skb;
5258 
5259 	timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
5260 	il->timestamp = le64_to_cpu(timestamp);
5261 
5262 	D_MAC80211("leave\n");
5263 	spin_unlock_irqrestore(&il->lock, flags);
5264 
5265 	if (!il_is_ready_rf(il)) {
5266 		D_MAC80211("leave - RF not ready\n");
5267 		return;
5268 	}
5269 
5270 	il->ops->post_associate(il);
5271 }
5272 
5273 void
il_mac_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss_conf,u32 changes)5274 il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
5275 			struct ieee80211_bss_conf *bss_conf, u32 changes)
5276 {
5277 	struct il_priv *il = hw->priv;
5278 	int ret;
5279 
5280 	mutex_lock(&il->mutex);
5281 	D_MAC80211("enter: changes 0x%x\n", changes);
5282 
5283 	if (!il_is_alive(il)) {
5284 		D_MAC80211("leave - not alive\n");
5285 		mutex_unlock(&il->mutex);
5286 		return;
5287 	}
5288 
5289 	if (changes & BSS_CHANGED_QOS) {
5290 		unsigned long flags;
5291 
5292 		spin_lock_irqsave(&il->lock, flags);
5293 		il->qos_data.qos_active = bss_conf->qos;
5294 		il_update_qos(il);
5295 		spin_unlock_irqrestore(&il->lock, flags);
5296 	}
5297 
5298 	if (changes & BSS_CHANGED_BEACON_ENABLED) {
5299 		/* FIXME: can we remove beacon_enabled ? */
5300 		if (vif->bss_conf.enable_beacon)
5301 			il->beacon_enabled = true;
5302 		else
5303 			il->beacon_enabled = false;
5304 	}
5305 
5306 	if (changes & BSS_CHANGED_BSSID) {
5307 		D_MAC80211("BSSID %pM\n", bss_conf->bssid);
5308 
5309 		/*
5310 		 * If there is currently a HW scan going on in the background,
5311 		 * then we need to cancel it, otherwise sometimes we are not
5312 		 * able to authenticate (FIXME: why ?)
5313 		 */
5314 		if (il_scan_cancel_timeout(il, 100)) {
5315 			D_MAC80211("leave - scan abort failed\n");
5316 			mutex_unlock(&il->mutex);
5317 			return;
5318 		}
5319 
5320 		/* mac80211 only sets assoc when in STATION mode */
5321 		memcpy(il->staging.bssid_addr, bss_conf->bssid, ETH_ALEN);
5322 
5323 		/* FIXME: currently needed in a few places */
5324 		memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5325 	}
5326 
5327 	/*
5328 	 * This needs to be after setting the BSSID in case
5329 	 * mac80211 decides to do both changes at once because
5330 	 * it will invoke post_associate.
5331 	 */
5332 	if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
5333 		il_beacon_update(hw, vif);
5334 
5335 	if (changes & BSS_CHANGED_ERP_PREAMBLE) {
5336 		D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
5337 		if (bss_conf->use_short_preamble)
5338 			il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
5339 		else
5340 			il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
5341 	}
5342 
5343 	if (changes & BSS_CHANGED_ERP_CTS_PROT) {
5344 		D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
5345 		if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
5346 			il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
5347 		else
5348 			il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
5349 		if (bss_conf->use_cts_prot)
5350 			il->staging.flags |= RXON_FLG_SELF_CTS_EN;
5351 		else
5352 			il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
5353 	}
5354 
5355 	if (changes & BSS_CHANGED_BASIC_RATES) {
5356 		/* XXX use this information
5357 		 *
5358 		 * To do that, remove code from il_set_rate() and put something
5359 		 * like this here:
5360 		 *
5361 		 if (A-band)
5362 		 il->staging.ofdm_basic_rates =
5363 		 bss_conf->basic_rates;
5364 		 else
5365 		 il->staging.ofdm_basic_rates =
5366 		 bss_conf->basic_rates >> 4;
5367 		 il->staging.cck_basic_rates =
5368 		 bss_conf->basic_rates & 0xF;
5369 		 */
5370 	}
5371 
5372 	if (changes & BSS_CHANGED_HT) {
5373 		il_ht_conf(il, vif);
5374 
5375 		if (il->ops->set_rxon_chain)
5376 			il->ops->set_rxon_chain(il);
5377 	}
5378 
5379 	if (changes & BSS_CHANGED_ASSOC) {
5380 		D_MAC80211("ASSOC %d\n", bss_conf->assoc);
5381 		if (bss_conf->assoc) {
5382 			il->timestamp = bss_conf->sync_tsf;
5383 
5384 			if (!il_is_rfkill(il))
5385 				il->ops->post_associate(il);
5386 		} else
5387 			il_set_no_assoc(il, vif);
5388 	}
5389 
5390 	if (changes && il_is_associated(il) && bss_conf->aid) {
5391 		D_MAC80211("Changes (%#x) while associated\n", changes);
5392 		ret = il_send_rxon_assoc(il);
5393 		if (!ret) {
5394 			/* Sync active_rxon with latest change. */
5395 			memcpy((void *)&il->active, &il->staging,
5396 			       sizeof(struct il_rxon_cmd));
5397 		}
5398 	}
5399 
5400 	if (changes & BSS_CHANGED_BEACON_ENABLED) {
5401 		if (vif->bss_conf.enable_beacon) {
5402 			memcpy(il->staging.bssid_addr, bss_conf->bssid,
5403 			       ETH_ALEN);
5404 			memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
5405 			il->ops->config_ap(il);
5406 		} else
5407 			il_set_no_assoc(il, vif);
5408 	}
5409 
5410 	if (changes & BSS_CHANGED_IBSS) {
5411 		ret = il->ops->manage_ibss_station(il, vif,
5412 						   bss_conf->ibss_joined);
5413 		if (ret)
5414 			IL_ERR("failed to %s IBSS station %pM\n",
5415 			       bss_conf->ibss_joined ? "add" : "remove",
5416 			       bss_conf->bssid);
5417 	}
5418 
5419 	D_MAC80211("leave\n");
5420 	mutex_unlock(&il->mutex);
5421 }
5422 EXPORT_SYMBOL(il_mac_bss_info_changed);
5423 
5424 irqreturn_t
il_isr(int irq,void * data)5425 il_isr(int irq, void *data)
5426 {
5427 	struct il_priv *il = data;
5428 	u32 inta, inta_mask;
5429 	u32 inta_fh;
5430 	unsigned long flags;
5431 	if (!il)
5432 		return IRQ_NONE;
5433 
5434 	spin_lock_irqsave(&il->lock, flags);
5435 
5436 	/* Disable (but don't clear!) interrupts here to avoid
5437 	 *    back-to-back ISRs and sporadic interrupts from our NIC.
5438 	 * If we have something to service, the tasklet will re-enable ints.
5439 	 * If we *don't* have something, we'll re-enable before leaving here. */
5440 	inta_mask = _il_rd(il, CSR_INT_MASK);	/* just for debug */
5441 	_il_wr(il, CSR_INT_MASK, 0x00000000);
5442 
5443 	/* Discover which interrupts are active/pending */
5444 	inta = _il_rd(il, CSR_INT);
5445 	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
5446 
5447 	/* Ignore interrupt if there's nothing in NIC to service.
5448 	 * This may be due to IRQ shared with another device,
5449 	 * or due to sporadic interrupts thrown from our NIC. */
5450 	if (!inta && !inta_fh) {
5451 		D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
5452 		goto none;
5453 	}
5454 
5455 	if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
5456 		/* Hardware disappeared. It might have already raised
5457 		 * an interrupt */
5458 		IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
5459 		goto unplugged;
5460 	}
5461 
5462 	D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
5463 	      inta_fh);
5464 
5465 	inta &= ~CSR_INT_BIT_SCD;
5466 
5467 	/* il_irq_tasklet() will service interrupts and re-enable them */
5468 	if (likely(inta || inta_fh))
5469 		tasklet_schedule(&il->irq_tasklet);
5470 
5471 unplugged:
5472 	spin_unlock_irqrestore(&il->lock, flags);
5473 	return IRQ_HANDLED;
5474 
5475 none:
5476 	/* re-enable interrupts here since we don't have anything to service. */
5477 	/* only Re-enable if disabled by irq */
5478 	if (test_bit(S_INT_ENABLED, &il->status))
5479 		il_enable_interrupts(il);
5480 	spin_unlock_irqrestore(&il->lock, flags);
5481 	return IRQ_NONE;
5482 }
5483 EXPORT_SYMBOL(il_isr);
5484 
5485 /*
5486  *  il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
5487  *  function.
5488  */
5489 void
il_tx_cmd_protection(struct il_priv * il,struct ieee80211_tx_info * info,__le16 fc,__le32 * tx_flags)5490 il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
5491 		     __le16 fc, __le32 *tx_flags)
5492 {
5493 	if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
5494 		*tx_flags |= TX_CMD_FLG_RTS_MSK;
5495 		*tx_flags &= ~TX_CMD_FLG_CTS_MSK;
5496 		*tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5497 
5498 		if (!ieee80211_is_mgmt(fc))
5499 			return;
5500 
5501 		switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
5502 		case cpu_to_le16(IEEE80211_STYPE_AUTH):
5503 		case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
5504 		case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
5505 		case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
5506 			*tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5507 			*tx_flags |= TX_CMD_FLG_CTS_MSK;
5508 			break;
5509 		}
5510 	} else if (info->control.rates[0].
5511 		   flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
5512 		*tx_flags &= ~TX_CMD_FLG_RTS_MSK;
5513 		*tx_flags |= TX_CMD_FLG_CTS_MSK;
5514 		*tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
5515 	}
5516 }
5517 EXPORT_SYMBOL(il_tx_cmd_protection);
5518