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1 /******************************************************************************
2  *
3  * Copyright(c) 2009-2012  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program; if not, write to the Free Software Foundation, Inc.,
16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17  *
18  * The full GNU General Public License is included in this distribution in the
19  * file called LICENSE.
20  *
21  * Contact Information:
22  * wlanfae <wlanfae@realtek.com>
23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24  * Hsinchu 300, Taiwan.
25  *
26  * Larry Finger <Larry.Finger@lwfinger.net>
27  *
28  *****************************************************************************/
29 
30 #include "../wifi.h"
31 #include "../base.h"
32 #include "reg.h"
33 #include "def.h"
34 #include "phy.h"
35 #include "dm.h"
36 #include "fw.h"
37 
38 #define UNDEC_SM_PWDB	entry_min_undec_sm_pwdb
39 
40 static const u32 ofdmswing_table[OFDM_TABLE_SIZE_92D] = {
41 	0x7f8001fe,		/* 0, +6.0dB */
42 	0x788001e2,		/* 1, +5.5dB */
43 	0x71c001c7,		/* 2, +5.0dB */
44 	0x6b8001ae,		/* 3, +4.5dB */
45 	0x65400195,		/* 4, +4.0dB */
46 	0x5fc0017f,		/* 5, +3.5dB */
47 	0x5a400169,		/* 6, +3.0dB */
48 	0x55400155,		/* 7, +2.5dB */
49 	0x50800142,		/* 8, +2.0dB */
50 	0x4c000130,		/* 9, +1.5dB */
51 	0x47c0011f,		/* 10, +1.0dB */
52 	0x43c0010f,		/* 11, +0.5dB */
53 	0x40000100,		/* 12, +0dB */
54 	0x3c8000f2,		/* 13, -0.5dB */
55 	0x390000e4,		/* 14, -1.0dB */
56 	0x35c000d7,		/* 15, -1.5dB */
57 	0x32c000cb,		/* 16, -2.0dB */
58 	0x300000c0,		/* 17, -2.5dB */
59 	0x2d4000b5,		/* 18, -3.0dB */
60 	0x2ac000ab,		/* 19, -3.5dB */
61 	0x288000a2,		/* 20, -4.0dB */
62 	0x26000098,		/* 21, -4.5dB */
63 	0x24000090,		/* 22, -5.0dB */
64 	0x22000088,		/* 23, -5.5dB */
65 	0x20000080,		/* 24, -6.0dB */
66 	0x1e400079,		/* 25, -6.5dB */
67 	0x1c800072,		/* 26, -7.0dB */
68 	0x1b00006c,		/* 27. -7.5dB */
69 	0x19800066,		/* 28, -8.0dB */
70 	0x18000060,		/* 29, -8.5dB */
71 	0x16c0005b,		/* 30, -9.0dB */
72 	0x15800056,		/* 31, -9.5dB */
73 	0x14400051,		/* 32, -10.0dB */
74 	0x1300004c,		/* 33, -10.5dB */
75 	0x12000048,		/* 34, -11.0dB */
76 	0x11000044,		/* 35, -11.5dB */
77 	0x10000040,		/* 36, -12.0dB */
78 	0x0f00003c,		/* 37, -12.5dB */
79 	0x0e400039,		/* 38, -13.0dB */
80 	0x0d800036,		/* 39, -13.5dB */
81 	0x0cc00033,		/* 40, -14.0dB */
82 	0x0c000030,		/* 41, -14.5dB */
83 	0x0b40002d,		/* 42, -15.0dB */
84 };
85 
86 static const u8 cckswing_table_ch1ch13[CCK_TABLE_SIZE][8] = {
87 	{0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04},    /* 0, +0dB */
88 	{0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04},    /* 1, -0.5dB */
89 	{0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03},    /* 2, -1.0dB */
90 	{0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03},    /* 3, -1.5dB */
91 	{0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03},    /* 4, -2.0dB */
92 	{0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03},    /* 5, -2.5dB */
93 	{0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03},    /* 6, -3.0dB */
94 	{0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03},    /* 7, -3.5dB */
95 	{0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02},    /* 8, -4.0dB */
96 	{0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02},    /* 9, -4.5dB */
97 	{0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02},    /* 10, -5.0dB */
98 	{0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02},    /* 11, -5.5dB */
99 	{0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02},    /* 12, -6.0dB */
100 	{0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02},    /* 13, -6.5dB */
101 	{0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02},    /* 14, -7.0dB */
102 	{0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02},    /* 15, -7.5dB */
103 	{0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01},    /* 16, -8.0dB */
104 	{0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02},    /* 17, -8.5dB */
105 	{0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01},    /* 18, -9.0dB */
106 	{0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},    /* 19, -9.5dB */
107 	{0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01},    /* 20, -10.0dB */
108 	{0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01},    /* 21, -10.5dB */
109 	{0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01},    /* 22, -11.0dB */
110 	{0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01},    /* 23, -11.5dB */
111 	{0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01},    /* 24, -12.0dB */
112 	{0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01},    /* 25, -12.5dB */
113 	{0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01},    /* 26, -13.0dB */
114 	{0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01},    /* 27, -13.5dB */
115 	{0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01},    /* 28, -14.0dB */
116 	{0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01},    /* 29, -14.5dB */
117 	{0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01},    /* 30, -15.0dB */
118 	{0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01},    /* 31, -15.5dB */
119 	{0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01}     /* 32, -16.0dB */
120 };
121 
122 static const u8 cckswing_table_ch14[CCK_TABLE_SIZE][8] = {
123 	{0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00},    /* 0, +0dB */
124 	{0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00},    /* 1, -0.5dB */
125 	{0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00},    /* 2, -1.0dB */
126 	{0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00},    /* 3, -1.5dB */
127 	{0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00},    /* 4, -2.0dB */
128 	{0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00},    /* 5, -2.5dB */
129 	{0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00},    /* 6, -3.0dB */
130 	{0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00},    /* 7, -3.5dB */
131 	{0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00},    /* 8, -4.0dB */
132 	{0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00},    /* 9, -4.5dB */
133 	{0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00},    /* 10, -5.0dB */
134 	{0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00},    /* 11, -5.5dB */
135 	{0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00},    /* 12, -6.0dB */
136 	{0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00},    /* 13, -6.5dB */
137 	{0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00},    /* 14, -7.0dB */
138 	{0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00},    /* 15, -7.5dB */
139 	{0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00},    /* 16, -8.0dB */
140 	{0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00},    /* 17, -8.5dB */
141 	{0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00},    /* 18, -9.0dB */
142 	{0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},    /* 19, -9.5dB */
143 	{0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00},    /* 20, -10.0dB */
144 	{0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00},    /* 21, -10.5dB */
145 	{0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00},    /* 22, -11.0dB */
146 	{0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},    /* 23, -11.5dB */
147 	{0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00},    /* 24, -12.0dB */
148 	{0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00},    /* 25, -12.5dB */
149 	{0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},    /* 26, -13.0dB */
150 	{0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00},    /* 27, -13.5dB */
151 	{0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},    /* 28, -14.0dB */
152 	{0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00},    /* 29, -14.5dB */
153 	{0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},    /* 30, -15.0dB */
154 	{0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00},    /* 31, -15.5dB */
155 	{0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00}     /* 32, -16.0dB */
156 };
157 
rtl92d_dm_diginit(struct ieee80211_hw * hw)158 static void rtl92d_dm_diginit(struct ieee80211_hw *hw)
159 {
160 	struct rtl_priv *rtlpriv = rtl_priv(hw);
161 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
162 
163 	de_digtable->dig_enable_flag = true;
164 	de_digtable->dig_ext_port_stage = DIG_EXT_PORT_STAGE_MAX;
165 	de_digtable->cur_igvalue = 0x20;
166 	de_digtable->pre_igvalue = 0x0;
167 	de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
168 	de_digtable->presta_cstate = DIG_STA_DISCONNECT;
169 	de_digtable->curmultista_cstate = DIG_MULTISTA_DISCONNECT;
170 	de_digtable->rssi_lowthresh = DM_DIG_THRESH_LOW;
171 	de_digtable->rssi_highthresh = DM_DIG_THRESH_HIGH;
172 	de_digtable->fa_lowthresh = DM_FALSEALARM_THRESH_LOW;
173 	de_digtable->fa_highthresh = DM_FALSEALARM_THRESH_HIGH;
174 	de_digtable->rx_gain_max = DM_DIG_FA_UPPER;
175 	de_digtable->rx_gain_min = DM_DIG_FA_LOWER;
176 	de_digtable->back_val = DM_DIG_BACKOFF_DEFAULT;
177 	de_digtable->back_range_max = DM_DIG_BACKOFF_MAX;
178 	de_digtable->back_range_min = DM_DIG_BACKOFF_MIN;
179 	de_digtable->pre_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
180 	de_digtable->cur_cck_pd_state = CCK_PD_STAGE_MAX;
181 	de_digtable->large_fa_hit = 0;
182 	de_digtable->recover_cnt = 0;
183 	de_digtable->forbidden_igi = DM_DIG_FA_LOWER;
184 }
185 
rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw * hw)186 static void rtl92d_dm_false_alarm_counter_statistics(struct ieee80211_hw *hw)
187 {
188 	u32 ret_value;
189 	struct rtl_priv *rtlpriv = rtl_priv(hw);
190 	struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
191 	unsigned long flag = 0;
192 
193 	/* hold ofdm counter */
194 	rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 1); /* hold page C counter */
195 	rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 1); /*hold page D counter */
196 
197 	ret_value = rtl_get_bbreg(hw, ROFDM0_FRAMESYNC, BMASKDWORD);
198 	falsealm_cnt->cnt_fast_fsync_fail = (ret_value & 0xffff);
199 	falsealm_cnt->cnt_sb_search_fail = ((ret_value & 0xffff0000) >> 16);
200 	ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER1, BMASKDWORD);
201 	falsealm_cnt->cnt_parity_fail = ((ret_value & 0xffff0000) >> 16);
202 	ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER2, BMASKDWORD);
203 	falsealm_cnt->cnt_rate_illegal = (ret_value & 0xffff);
204 	falsealm_cnt->cnt_crc8_fail = ((ret_value & 0xffff0000) >> 16);
205 	ret_value = rtl_get_bbreg(hw, ROFDM_PHYCOUNTER3, BMASKDWORD);
206 	falsealm_cnt->cnt_mcs_fail = (ret_value & 0xffff);
207 	falsealm_cnt->cnt_ofdm_fail = falsealm_cnt->cnt_parity_fail +
208 				      falsealm_cnt->cnt_rate_illegal +
209 				      falsealm_cnt->cnt_crc8_fail +
210 				      falsealm_cnt->cnt_mcs_fail +
211 				      falsealm_cnt->cnt_fast_fsync_fail +
212 				      falsealm_cnt->cnt_sb_search_fail;
213 
214 	if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
215 		/* hold cck counter */
216 		rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
217 		ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERLOWER, BMASKBYTE0);
218 		falsealm_cnt->cnt_cck_fail = ret_value;
219 		ret_value = rtl_get_bbreg(hw, RCCK0_FACOUNTERUPPER, BMASKBYTE3);
220 		falsealm_cnt->cnt_cck_fail += (ret_value & 0xff) << 8;
221 		rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
222 	} else {
223 		falsealm_cnt->cnt_cck_fail = 0;
224 	}
225 
226 	/* reset false alarm counter registers */
227 	falsealm_cnt->cnt_all = falsealm_cnt->cnt_fast_fsync_fail +
228 				falsealm_cnt->cnt_sb_search_fail +
229 				falsealm_cnt->cnt_parity_fail +
230 				falsealm_cnt->cnt_rate_illegal +
231 				falsealm_cnt->cnt_crc8_fail +
232 				falsealm_cnt->cnt_mcs_fail +
233 				falsealm_cnt->cnt_cck_fail;
234 
235 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 1);
236 	/* update ofdm counter */
237 	rtl_set_bbreg(hw, ROFDM1_LSTF, 0x08000000, 0);
238 	/* update page C counter */
239 	rtl_set_bbreg(hw, ROFDM0_LSTF, BIT(31), 0);
240 	/* update page D counter */
241 	rtl_set_bbreg(hw, ROFDM1_LSTF, BIT(31), 0);
242 	if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G) {
243 		/* reset cck counter */
244 		rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
245 		rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 0);
246 		/* enable cck counter */
247 		rtl_set_bbreg(hw, RCCK0_FALSEALARMREPORT, 0x0000c000, 2);
248 		rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
249 	}
250 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
251 		 "Cnt_Fast_Fsync_fail = %x, Cnt_SB_Search_fail = %x\n",
252 		 falsealm_cnt->cnt_fast_fsync_fail,
253 		 falsealm_cnt->cnt_sb_search_fail);
254 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
255 		 "Cnt_Parity_Fail = %x, Cnt_Rate_Illegal = %x, Cnt_Crc8_fail = %x, Cnt_Mcs_fail = %x\n",
256 		 falsealm_cnt->cnt_parity_fail,
257 		 falsealm_cnt->cnt_rate_illegal,
258 		 falsealm_cnt->cnt_crc8_fail,
259 		 falsealm_cnt->cnt_mcs_fail);
260 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
261 		 "Cnt_Ofdm_fail = %x, Cnt_Cck_fail = %x, Cnt_all = %x\n",
262 		 falsealm_cnt->cnt_ofdm_fail,
263 		 falsealm_cnt->cnt_cck_fail,
264 		 falsealm_cnt->cnt_all);
265 }
266 
rtl92d_dm_find_minimum_rssi(struct ieee80211_hw * hw)267 static void rtl92d_dm_find_minimum_rssi(struct ieee80211_hw *hw)
268 {
269 	struct rtl_priv *rtlpriv = rtl_priv(hw);
270 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
271 	struct rtl_mac *mac = rtl_mac(rtlpriv);
272 
273 	/* Determine the minimum RSSI  */
274 	if ((mac->link_state < MAC80211_LINKED) &&
275 	    (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
276 		de_digtable->min_undec_pwdb_for_dm = 0;
277 		RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
278 			 "Not connected to any\n");
279 	}
280 	if (mac->link_state >= MAC80211_LINKED) {
281 		if (mac->opmode == NL80211_IFTYPE_AP ||
282 		    mac->opmode == NL80211_IFTYPE_ADHOC) {
283 			de_digtable->min_undec_pwdb_for_dm =
284 			    rtlpriv->dm.UNDEC_SM_PWDB;
285 			RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
286 				 "AP Client PWDB = 0x%lx\n",
287 				 rtlpriv->dm.UNDEC_SM_PWDB);
288 		} else {
289 			de_digtable->min_undec_pwdb_for_dm =
290 			    rtlpriv->dm.undec_sm_pwdb;
291 			RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
292 				 "STA Default Port PWDB = 0x%x\n",
293 				 de_digtable->min_undec_pwdb_for_dm);
294 		}
295 	} else {
296 		de_digtable->min_undec_pwdb_for_dm = rtlpriv->dm.UNDEC_SM_PWDB;
297 		RT_TRACE(rtlpriv, COMP_BB_POWERSAVING, DBG_LOUD,
298 			 "AP Ext Port or disconnect PWDB = 0x%x\n",
299 			 de_digtable->min_undec_pwdb_for_dm);
300 	}
301 
302 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "MinUndecoratedPWDBForDM =%d\n",
303 		 de_digtable->min_undec_pwdb_for_dm);
304 }
305 
rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw * hw)306 static void rtl92d_dm_cck_packet_detection_thresh(struct ieee80211_hw *hw)
307 {
308 	struct rtl_priv *rtlpriv = rtl_priv(hw);
309 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
310 	unsigned long flag = 0;
311 
312 	if (de_digtable->cursta_cstate == DIG_STA_CONNECT) {
313 		if (de_digtable->pre_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
314 			if (de_digtable->min_undec_pwdb_for_dm <= 25)
315 				de_digtable->cur_cck_pd_state =
316 							 CCK_PD_STAGE_LOWRSSI;
317 			else
318 				de_digtable->cur_cck_pd_state =
319 							 CCK_PD_STAGE_HIGHRSSI;
320 		} else {
321 			if (de_digtable->min_undec_pwdb_for_dm <= 20)
322 				de_digtable->cur_cck_pd_state =
323 							 CCK_PD_STAGE_LOWRSSI;
324 			else
325 				de_digtable->cur_cck_pd_state =
326 							 CCK_PD_STAGE_HIGHRSSI;
327 		}
328 	} else {
329 		de_digtable->cur_cck_pd_state = CCK_PD_STAGE_LOWRSSI;
330 	}
331 	if (de_digtable->pre_cck_pd_state != de_digtable->cur_cck_pd_state) {
332 		if (de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI) {
333 			rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
334 			rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0x83);
335 			rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
336 		} else {
337 			rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
338 			rtl_set_bbreg(hw, RCCK0_CCA, BMASKBYTE2, 0xcd);
339 			rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
340 		}
341 		de_digtable->pre_cck_pd_state = de_digtable->cur_cck_pd_state;
342 	}
343 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CurSTAConnectState=%s\n",
344 		 de_digtable->cursta_cstate == DIG_STA_CONNECT ?
345 		 "DIG_STA_CONNECT " : "DIG_STA_DISCONNECT");
346 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "CCKPDStage=%s\n",
347 		 de_digtable->cur_cck_pd_state == CCK_PD_STAGE_LOWRSSI ?
348 		 "Low RSSI " : "High RSSI ");
349 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "is92d single phy =%x\n",
350 		 IS_92D_SINGLEPHY(rtlpriv->rtlhal.version));
351 
352 }
353 
rtl92d_dm_write_dig(struct ieee80211_hw * hw)354 void rtl92d_dm_write_dig(struct ieee80211_hw *hw)
355 {
356 	struct rtl_priv *rtlpriv = rtl_priv(hw);
357 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
358 
359 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
360 		 "cur_igvalue = 0x%x, pre_igvalue = 0x%x, back_val = %d\n",
361 		 de_digtable->cur_igvalue, de_digtable->pre_igvalue,
362 		 de_digtable->back_val);
363 	if (de_digtable->dig_enable_flag == false) {
364 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "DIG is disabled\n");
365 		de_digtable->pre_igvalue = 0x17;
366 		return;
367 	}
368 	if (de_digtable->pre_igvalue != de_digtable->cur_igvalue) {
369 		rtl_set_bbreg(hw, ROFDM0_XAAGCCORE1, 0x7f,
370 			      de_digtable->cur_igvalue);
371 		rtl_set_bbreg(hw, ROFDM0_XBAGCCORE1, 0x7f,
372 			      de_digtable->cur_igvalue);
373 		de_digtable->pre_igvalue = de_digtable->cur_igvalue;
374 	}
375 }
376 
rtl92d_early_mode_enabled(struct rtl_priv * rtlpriv)377 static void rtl92d_early_mode_enabled(struct rtl_priv *rtlpriv)
378 {
379 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
380 
381 	if ((rtlpriv->mac80211.link_state >= MAC80211_LINKED) &&
382 	    (rtlpriv->mac80211.vendor == PEER_CISCO)) {
383 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "IOT_PEER = CISCO\n");
384 		if (de_digtable->last_min_undec_pwdb_for_dm >= 50
385 		    && de_digtable->min_undec_pwdb_for_dm < 50) {
386 			rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x00);
387 			RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
388 				 "Early Mode Off\n");
389 		} else if (de_digtable->last_min_undec_pwdb_for_dm <= 55 &&
390 			   de_digtable->min_undec_pwdb_for_dm > 55) {
391 			rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
392 			RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
393 				 "Early Mode On\n");
394 		}
395 	} else if (!(rtl_read_byte(rtlpriv, REG_EARLY_MODE_CONTROL) & 0xf)) {
396 		rtl_write_byte(rtlpriv, REG_EARLY_MODE_CONTROL, 0x0f);
397 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "Early Mode On\n");
398 	}
399 }
400 
rtl92d_dm_dig(struct ieee80211_hw * hw)401 static void rtl92d_dm_dig(struct ieee80211_hw *hw)
402 {
403 	struct rtl_priv *rtlpriv = rtl_priv(hw);
404 	struct dig_t *de_digtable = &rtlpriv->dm_digtable;
405 	u8 value_igi = de_digtable->cur_igvalue;
406 	struct false_alarm_statistics *falsealm_cnt = &(rtlpriv->falsealm_cnt);
407 
408 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "==>\n");
409 	if (rtlpriv->rtlhal.earlymode_enable) {
410 		rtl92d_early_mode_enabled(rtlpriv);
411 		de_digtable->last_min_undec_pwdb_for_dm =
412 				 de_digtable->min_undec_pwdb_for_dm;
413 	}
414 	if (!rtlpriv->dm.dm_initialgain_enable)
415 		return;
416 
417 	/* because we will send data pkt when scanning
418 	 * this will cause some ap like gear-3700 wep TP
419 	 * lower if we retrun here, this is the diff of
420 	 * mac80211 driver vs ieee80211 driver */
421 	/* if (rtlpriv->mac80211.act_scanning)
422 	 *      return; */
423 
424 	/* Not STA mode return tmp */
425 	if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
426 		return;
427 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "progress\n");
428 	/* Decide the current status and if modify initial gain or not */
429 	if (rtlpriv->mac80211.link_state >= MAC80211_LINKED)
430 		de_digtable->cursta_cstate = DIG_STA_CONNECT;
431 	else
432 		de_digtable->cursta_cstate = DIG_STA_DISCONNECT;
433 
434 	/* adjust initial gain according to false alarm counter */
435 	if (falsealm_cnt->cnt_all < DM_DIG_FA_TH0)
436 		value_igi--;
437 	else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH1)
438 		value_igi += 0;
439 	else if (falsealm_cnt->cnt_all < DM_DIG_FA_TH2)
440 		value_igi++;
441 	else if (falsealm_cnt->cnt_all >= DM_DIG_FA_TH2)
442 		value_igi += 2;
443 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
444 		 "dm_DIG() Before: large_fa_hit=%d, forbidden_igi=%x\n",
445 		 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
446 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
447 		 "dm_DIG() Before: Recover_cnt=%d, rx_gain_min=%x\n",
448 		 de_digtable->recover_cnt, de_digtable->rx_gain_min);
449 
450 	/* deal with abnorally large false alarm */
451 	if (falsealm_cnt->cnt_all > 10000) {
452 		RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
453 			 "dm_DIG(): Abnormally false alarm case\n");
454 
455 		de_digtable->large_fa_hit++;
456 		if (de_digtable->forbidden_igi < de_digtable->cur_igvalue) {
457 			de_digtable->forbidden_igi = de_digtable->cur_igvalue;
458 			de_digtable->large_fa_hit = 1;
459 		}
460 		if (de_digtable->large_fa_hit >= 3) {
461 			if ((de_digtable->forbidden_igi + 1) > DM_DIG_MAX)
462 				de_digtable->rx_gain_min = DM_DIG_MAX;
463 			else
464 				de_digtable->rx_gain_min =
465 				    (de_digtable->forbidden_igi + 1);
466 			de_digtable->recover_cnt = 3600;	/* 3600=2hr */
467 		}
468 	} else {
469 		/* Recovery mechanism for IGI lower bound */
470 		if (de_digtable->recover_cnt != 0) {
471 			de_digtable->recover_cnt--;
472 		} else {
473 			if (de_digtable->large_fa_hit == 0) {
474 				if ((de_digtable->forbidden_igi - 1) <
475 				    DM_DIG_FA_LOWER) {
476 					de_digtable->forbidden_igi =
477 							 DM_DIG_FA_LOWER;
478 					de_digtable->rx_gain_min =
479 							 DM_DIG_FA_LOWER;
480 
481 				} else {
482 					de_digtable->forbidden_igi--;
483 					de_digtable->rx_gain_min =
484 					    (de_digtable->forbidden_igi + 1);
485 				}
486 			} else if (de_digtable->large_fa_hit == 3) {
487 				de_digtable->large_fa_hit = 0;
488 			}
489 		}
490 	}
491 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
492 		 "dm_DIG() After: large_fa_hit=%d, forbidden_igi=%x\n",
493 		 de_digtable->large_fa_hit, de_digtable->forbidden_igi);
494 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD,
495 		 "dm_DIG() After: recover_cnt=%d, rx_gain_min=%x\n",
496 		 de_digtable->recover_cnt, de_digtable->rx_gain_min);
497 
498 	if (value_igi > DM_DIG_MAX)
499 		value_igi = DM_DIG_MAX;
500 	else if (value_igi < de_digtable->rx_gain_min)
501 		value_igi = de_digtable->rx_gain_min;
502 	de_digtable->cur_igvalue = value_igi;
503 	rtl92d_dm_write_dig(hw);
504 	if (rtlpriv->rtlhal.current_bandtype != BAND_ON_5G)
505 		rtl92d_dm_cck_packet_detection_thresh(hw);
506 	RT_TRACE(rtlpriv, COMP_DIG, DBG_LOUD, "<<==\n");
507 }
508 
rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw * hw)509 static void rtl92d_dm_init_dynamic_txpower(struct ieee80211_hw *hw)
510 {
511 	struct rtl_priv *rtlpriv = rtl_priv(hw);
512 
513 	rtlpriv->dm.dynamic_txpower_enable = true;
514 	rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
515 	rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
516 }
517 
rtl92d_dm_dynamic_txpower(struct ieee80211_hw * hw)518 static void rtl92d_dm_dynamic_txpower(struct ieee80211_hw *hw)
519 {
520 	struct rtl_priv *rtlpriv = rtl_priv(hw);
521 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
522 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
523 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
524 	long undec_sm_pwdb;
525 
526 	if ((!rtlpriv->dm.dynamic_txpower_enable)
527 	    || rtlpriv->dm.dm_flag & HAL_DM_HIPWR_DISABLE) {
528 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
529 		return;
530 	}
531 	if ((mac->link_state < MAC80211_LINKED) &&
532 	    (rtlpriv->dm.UNDEC_SM_PWDB == 0)) {
533 		RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
534 			 "Not connected to any\n");
535 		rtlpriv->dm.dynamic_txhighpower_lvl = TXHIGHPWRLEVEL_NORMAL;
536 		rtlpriv->dm.last_dtp_lvl = TXHIGHPWRLEVEL_NORMAL;
537 		return;
538 	}
539 	if (mac->link_state >= MAC80211_LINKED) {
540 		if (mac->opmode == NL80211_IFTYPE_ADHOC) {
541 			undec_sm_pwdb =
542 			    rtlpriv->dm.UNDEC_SM_PWDB;
543 			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
544 				 "IBSS Client PWDB = 0x%lx\n",
545 				 undec_sm_pwdb);
546 		} else {
547 			undec_sm_pwdb =
548 			    rtlpriv->dm.undec_sm_pwdb;
549 			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
550 				 "STA Default Port PWDB = 0x%lx\n",
551 				 undec_sm_pwdb);
552 		}
553 	} else {
554 		undec_sm_pwdb =
555 		    rtlpriv->dm.UNDEC_SM_PWDB;
556 
557 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
558 			 "AP Ext Port PWDB = 0x%lx\n",
559 			 undec_sm_pwdb);
560 	}
561 	if (rtlhal->current_bandtype == BAND_ON_5G) {
562 		if (undec_sm_pwdb >= 0x33) {
563 			rtlpriv->dm.dynamic_txhighpower_lvl =
564 						 TXHIGHPWRLEVEL_LEVEL2;
565 			RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
566 				 "5G:TxHighPwrLevel_Level2 (TxPwr=0x0)\n");
567 		} else if ((undec_sm_pwdb < 0x33)
568 			   && (undec_sm_pwdb >= 0x2b)) {
569 			rtlpriv->dm.dynamic_txhighpower_lvl =
570 						 TXHIGHPWRLEVEL_LEVEL1;
571 			RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
572 				 "5G:TxHighPwrLevel_Level1 (TxPwr=0x10)\n");
573 		} else if (undec_sm_pwdb < 0x2b) {
574 			rtlpriv->dm.dynamic_txhighpower_lvl =
575 						 TXHIGHPWRLEVEL_NORMAL;
576 			RT_TRACE(rtlpriv, COMP_HIPWR, DBG_LOUD,
577 				 "5G:TxHighPwrLevel_Normal\n");
578 		}
579 	} else {
580 		if (undec_sm_pwdb >=
581 		    TX_POWER_NEAR_FIELD_THRESH_LVL2) {
582 			rtlpriv->dm.dynamic_txhighpower_lvl =
583 						 TXHIGHPWRLEVEL_LEVEL2;
584 			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
585 				 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x0)\n");
586 		} else
587 		    if ((undec_sm_pwdb <
588 			 (TX_POWER_NEAR_FIELD_THRESH_LVL2 - 3))
589 			&& (undec_sm_pwdb >=
590 			    TX_POWER_NEAR_FIELD_THRESH_LVL1)) {
591 
592 			rtlpriv->dm.dynamic_txhighpower_lvl =
593 						 TXHIGHPWRLEVEL_LEVEL1;
594 			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
595 				 "TXHIGHPWRLEVEL_LEVEL1 (TxPwr=0x10)\n");
596 		} else if (undec_sm_pwdb <
597 			   (TX_POWER_NEAR_FIELD_THRESH_LVL1 - 5)) {
598 			rtlpriv->dm.dynamic_txhighpower_lvl =
599 						 TXHIGHPWRLEVEL_NORMAL;
600 			RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
601 				 "TXHIGHPWRLEVEL_NORMAL\n");
602 		}
603 	}
604 	if ((rtlpriv->dm.dynamic_txhighpower_lvl != rtlpriv->dm.last_dtp_lvl)) {
605 		RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
606 			 "PHY_SetTxPowerLevel8192S() Channel = %d\n",
607 			 rtlphy->current_channel);
608 		rtl92d_phy_set_txpower_level(hw, rtlphy->current_channel);
609 	}
610 	rtlpriv->dm.last_dtp_lvl = rtlpriv->dm.dynamic_txhighpower_lvl;
611 }
612 
rtl92d_dm_pwdb_monitor(struct ieee80211_hw * hw)613 static void rtl92d_dm_pwdb_monitor(struct ieee80211_hw *hw)
614 {
615 	struct rtl_priv *rtlpriv = rtl_priv(hw);
616 
617 	/* AP & ADHOC & MESH will return tmp */
618 	if (rtlpriv->mac80211.opmode != NL80211_IFTYPE_STATION)
619 		return;
620 	/* Indicate Rx signal strength to FW. */
621 	if (rtlpriv->dm.useramask) {
622 		u32 temp = rtlpriv->dm.undec_sm_pwdb;
623 
624 		temp <<= 16;
625 		temp |= 0x100;
626 		/* fw v12 cmdid 5:use max macid ,for nic ,
627 		 * default macid is 0 ,max macid is 1 */
628 		rtl92d_fill_h2c_cmd(hw, H2C_RSSI_REPORT, 3, (u8 *) (&temp));
629 	} else {
630 		rtl_write_byte(rtlpriv, 0x4fe,
631 			       (u8) rtlpriv->dm.undec_sm_pwdb);
632 	}
633 }
634 
rtl92d_dm_init_edca_turbo(struct ieee80211_hw * hw)635 void rtl92d_dm_init_edca_turbo(struct ieee80211_hw *hw)
636 {
637 	struct rtl_priv *rtlpriv = rtl_priv(hw);
638 
639 	rtlpriv->dm.current_turbo_edca = false;
640 	rtlpriv->dm.is_any_nonbepkts = false;
641 	rtlpriv->dm.is_cur_rdlstate = false;
642 }
643 
rtl92d_dm_check_edca_turbo(struct ieee80211_hw * hw)644 static void rtl92d_dm_check_edca_turbo(struct ieee80211_hw *hw)
645 {
646 	struct rtl_priv *rtlpriv = rtl_priv(hw);
647 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
648 	static u64 last_txok_cnt;
649 	static u64 last_rxok_cnt;
650 	u64 cur_txok_cnt;
651 	u64 cur_rxok_cnt;
652 	u32 edca_be_ul = 0x5ea42b;
653 	u32 edca_be_dl = 0x5ea42b;
654 
655 	if (mac->link_state != MAC80211_LINKED) {
656 		rtlpriv->dm.current_turbo_edca = false;
657 		goto exit;
658 	}
659 
660 	/* Enable BEQ TxOP limit configuration in wireless G-mode. */
661 	/* To check whether we shall force turn on TXOP configuration. */
662 	if ((!rtlpriv->dm.disable_framebursting) &&
663 	    (rtlpriv->sec.pairwise_enc_algorithm == WEP40_ENCRYPTION ||
664 	    rtlpriv->sec.pairwise_enc_algorithm == WEP104_ENCRYPTION ||
665 	    rtlpriv->sec.pairwise_enc_algorithm == TKIP_ENCRYPTION)) {
666 		/* Force TxOP limit to 0x005e for UL. */
667 		if (!(edca_be_ul & 0xffff0000))
668 			edca_be_ul |= 0x005e0000;
669 		/* Force TxOP limit to 0x005e for DL. */
670 		if (!(edca_be_dl & 0xffff0000))
671 			edca_be_dl |= 0x005e0000;
672 	}
673 
674 	if ((!rtlpriv->dm.is_any_nonbepkts) &&
675 	    (!rtlpriv->dm.disable_framebursting)) {
676 		cur_txok_cnt = rtlpriv->stats.txbytesunicast - last_txok_cnt;
677 		cur_rxok_cnt = rtlpriv->stats.rxbytesunicast - last_rxok_cnt;
678 		if (cur_rxok_cnt > 4 * cur_txok_cnt) {
679 			if (!rtlpriv->dm.is_cur_rdlstate ||
680 			    !rtlpriv->dm.current_turbo_edca) {
681 				rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
682 						edca_be_dl);
683 				rtlpriv->dm.is_cur_rdlstate = true;
684 			}
685 		} else {
686 			if (rtlpriv->dm.is_cur_rdlstate ||
687 			    !rtlpriv->dm.current_turbo_edca) {
688 				rtl_write_dword(rtlpriv, REG_EDCA_BE_PARAM,
689 						edca_be_ul);
690 				rtlpriv->dm.is_cur_rdlstate = false;
691 			}
692 		}
693 		rtlpriv->dm.current_turbo_edca = true;
694 	} else {
695 		if (rtlpriv->dm.current_turbo_edca) {
696 			u8 tmp = AC0_BE;
697 			rtlpriv->cfg->ops->set_hw_reg(hw, HW_VAR_AC_PARAM,
698 						      &tmp);
699 			rtlpriv->dm.current_turbo_edca = false;
700 		}
701 	}
702 
703 exit:
704 	rtlpriv->dm.is_any_nonbepkts = false;
705 	last_txok_cnt = rtlpriv->stats.txbytesunicast;
706 	last_rxok_cnt = rtlpriv->stats.rxbytesunicast;
707 }
708 
rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw * hw)709 static void rtl92d_dm_rxgain_tracking_thermalmeter(struct ieee80211_hw *hw)
710 {
711 	struct rtl_priv *rtlpriv = rtl_priv(hw);
712 	u8 index_mapping[RX_INDEX_MAPPING_NUM] = {
713 		0x0f, 0x0f, 0x0d, 0x0c, 0x0b,
714 		0x0a, 0x09, 0x08, 0x07, 0x06,
715 		0x05, 0x04, 0x04, 0x03, 0x02
716 	};
717 	int i;
718 	u32 u4tmp;
719 
720 	u4tmp = (index_mapping[(rtlpriv->efuse.eeprom_thermalmeter -
721 				rtlpriv->dm.thermalvalue_rxgain)]) << 12;
722 	RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
723 		 "===> Rx Gain %x\n", u4tmp);
724 	for (i = RF90_PATH_A; i < rtlpriv->phy.num_total_rfpath; i++)
725 		rtl_set_rfreg(hw, i, 0x3C, BRFREGOFFSETMASK,
726 			      (rtlpriv->phy.reg_rf3c[i] & (~(0xF000))) | u4tmp);
727 }
728 
rtl92d_bandtype_2_4G(struct ieee80211_hw * hw,long * temp_cckg,u8 * cck_index_old)729 static void rtl92d_bandtype_2_4G(struct ieee80211_hw *hw, long *temp_cckg,
730 				 u8 *cck_index_old)
731 {
732 	struct rtl_priv *rtlpriv = rtl_priv(hw);
733 	int i;
734 	unsigned long flag = 0;
735 	long temp_cck;
736 
737 	/* Query CCK default setting From 0xa24 */
738 	rtl92d_acquire_cckandrw_pagea_ctl(hw, &flag);
739 	temp_cck = rtl_get_bbreg(hw, RCCK0_TXFILTER2,
740 				 BMASKDWORD) & BMASKCCK;
741 	rtl92d_release_cckandrw_pagea_ctl(hw, &flag);
742 	for (i = 0; i < CCK_TABLE_LENGTH; i++) {
743 		if (rtlpriv->dm.cck_inch14) {
744 			if (!memcmp((void *)&temp_cck,
745 			    (void *)&cckswing_table_ch14[i][2], 4)) {
746 				*cck_index_old = (u8) i;
747 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
748 					 "Initial reg0x%x = 0x%lx, cck_index=0x%x, ch 14 %d\n",
749 					 RCCK0_TXFILTER2, temp_cck,
750 					 *cck_index_old,
751 					 rtlpriv->dm.cck_inch14);
752 				break;
753 			}
754 		} else {
755 			if (!memcmp((void *) &temp_cck,
756 			    &cckswing_table_ch1ch13[i][2], 4)) {
757 				*cck_index_old = (u8) i;
758 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
759 					 "Initial reg0x%x = 0x%lx, cck_index = 0x%x, ch14 %d\n",
760 					 RCCK0_TXFILTER2, temp_cck,
761 					 *cck_index_old,
762 					 rtlpriv->dm.cck_inch14);
763 				break;
764 			}
765 		}
766 	}
767 	*temp_cckg = temp_cck;
768 }
769 
rtl92d_bandtype_5G(struct rtl_hal * rtlhal,u8 * ofdm_index,bool * internal_pa,u8 thermalvalue,u8 delta,u8 rf,struct rtl_efuse * rtlefuse,struct rtl_priv * rtlpriv,struct rtl_phy * rtlphy,u8 index_mapping[5][INDEX_MAPPING_NUM],u8 index_mapping_pa[8][INDEX_MAPPING_NUM])770 static void rtl92d_bandtype_5G(struct rtl_hal *rtlhal, u8 *ofdm_index,
771 			       bool *internal_pa, u8 thermalvalue, u8 delta,
772 			       u8 rf, struct rtl_efuse *rtlefuse,
773 			       struct rtl_priv *rtlpriv, struct rtl_phy *rtlphy,
774 			       u8 index_mapping[5][INDEX_MAPPING_NUM],
775 			       u8 index_mapping_pa[8][INDEX_MAPPING_NUM])
776 {
777 	int i;
778 	u8 index;
779 	u8 offset = 0;
780 
781 	for (i = 0; i < rf; i++) {
782 		if (rtlhal->macphymode == DUALMAC_DUALPHY &&
783 		    rtlhal->interfaceindex == 1)	/* MAC 1 5G */
784 			*internal_pa = rtlefuse->internal_pa_5g[1];
785 		else
786 			*internal_pa = rtlefuse->internal_pa_5g[i];
787 		if (*internal_pa) {
788 			if (rtlhal->interfaceindex == 1 || i == rf)
789 				offset = 4;
790 			else
791 				offset = 0;
792 			if (rtlphy->current_channel >= 100 &&
793 				rtlphy->current_channel <= 165)
794 				offset += 2;
795 		} else {
796 			if (rtlhal->interfaceindex == 1 || i == rf)
797 				offset = 2;
798 			else
799 				offset = 0;
800 		}
801 		if (thermalvalue > rtlefuse->eeprom_thermalmeter)
802 			offset++;
803 		if (*internal_pa) {
804 			if (delta > INDEX_MAPPING_NUM - 1)
805 				index = index_mapping_pa[offset]
806 						    [INDEX_MAPPING_NUM - 1];
807 			else
808 				index =
809 				     index_mapping_pa[offset][delta];
810 		} else {
811 			if (delta > INDEX_MAPPING_NUM - 1)
812 				index =
813 				   index_mapping[offset][INDEX_MAPPING_NUM - 1];
814 			else
815 				index = index_mapping[offset][delta];
816 		}
817 		if (thermalvalue > rtlefuse->eeprom_thermalmeter) {
818 			if (*internal_pa && thermalvalue > 0x12) {
819 				ofdm_index[i] = rtlpriv->dm.ofdm_index[i] -
820 						((delta / 2) * 3 + (delta % 2));
821 			} else {
822 				ofdm_index[i] -= index;
823 			}
824 		} else {
825 			ofdm_index[i] += index;
826 		}
827 	}
828 }
829 
rtl92d_dm_txpower_tracking_callback_thermalmeter(struct ieee80211_hw * hw)830 static void rtl92d_dm_txpower_tracking_callback_thermalmeter(
831 			struct ieee80211_hw *hw)
832 {
833 	struct rtl_priv *rtlpriv = rtl_priv(hw);
834 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
835 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
836 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
837 	u8 thermalvalue, delta, delta_lck, delta_iqk, delta_rxgain;
838 	u8 offset, thermalvalue_avg_count = 0;
839 	u32 thermalvalue_avg = 0;
840 	bool internal_pa = false;
841 	long ele_a = 0, ele_d, temp_cck, val_x, value32;
842 	long val_y, ele_c = 0;
843 	u8 ofdm_index[2];
844 	s8 cck_index = 0;
845 	u8 ofdm_index_old[2];
846 	s8 cck_index_old = 0;
847 	u8 index;
848 	int i;
849 	bool is2t = IS_92D_SINGLEPHY(rtlhal->version);
850 	u8 ofdm_min_index = 6, ofdm_min_index_internal_pa = 3, rf;
851 	u8 indexforchannel =
852 	    rtl92d_get_rightchnlplace_for_iqk(rtlphy->current_channel);
853 	u8 index_mapping[5][INDEX_MAPPING_NUM] = {
854 		/* 5G, path A/MAC 0, decrease power  */
855 		{0, 1, 3, 6, 8, 9,	11, 13, 14, 16, 17, 18, 18},
856 		/* 5G, path A/MAC 0, increase power  */
857 		{0, 2, 4, 5, 7, 10,	12, 14, 16, 18, 18, 18, 18},
858 		/* 5G, path B/MAC 1, decrease power */
859 		{0, 2, 3, 6, 8, 9,	11, 13, 14, 16, 17, 18, 18},
860 		/* 5G, path B/MAC 1, increase power */
861 		{0, 2, 4, 5, 7, 10,	13, 16, 16, 18, 18, 18, 18},
862 		/* 2.4G, for decreas power */
863 		{0, 1, 2, 3, 4, 5,	6, 7, 7, 8, 9, 10, 10},
864 	};
865 	u8 index_mapping_internal_pa[8][INDEX_MAPPING_NUM] = {
866 		/* 5G, path A/MAC 0, ch36-64, decrease power  */
867 		{0, 1, 2, 4, 6, 7,	9, 11, 12, 14, 15, 16, 16},
868 		/* 5G, path A/MAC 0, ch36-64, increase power  */
869 		{0, 2, 4, 5, 7, 10,	12, 14, 16, 18, 18, 18, 18},
870 		/* 5G, path A/MAC 0, ch100-165, decrease power  */
871 		{0, 1, 2, 3, 5, 6,	8, 10, 11, 13, 14, 15, 15},
872 		/* 5G, path A/MAC 0, ch100-165, increase power  */
873 		{0, 2, 4, 5, 7, 10,	12, 14, 16, 18, 18, 18, 18},
874 		/* 5G, path B/MAC 1, ch36-64, decrease power */
875 		{0, 1, 2, 4, 6, 7,	9, 11, 12, 14, 15, 16, 16},
876 		/* 5G, path B/MAC 1, ch36-64, increase power */
877 		{0, 2, 4, 5, 7, 10,	13, 16, 16, 18, 18, 18, 18},
878 		/* 5G, path B/MAC 1, ch100-165, decrease power */
879 		{0, 1, 2, 3, 5, 6,	8, 9, 10, 12, 13, 14, 14},
880 		/* 5G, path B/MAC 1, ch100-165, increase power */
881 		{0, 2, 4, 5, 7, 10,	13, 16, 16, 18, 18, 18, 18},
882 	};
883 
884 	rtlpriv->dm.txpower_trackinginit = true;
885 	RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "\n");
886 	thermalvalue = (u8) rtl_get_rfreg(hw, RF90_PATH_A, RF_T_METER, 0xf800);
887 	RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
888 		 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x\n",
889 		 thermalvalue,
890 		 rtlpriv->dm.thermalvalue, rtlefuse->eeprom_thermalmeter);
891 	rtl92d_phy_ap_calibrate(hw, (thermalvalue -
892 				     rtlefuse->eeprom_thermalmeter));
893 	if (is2t)
894 		rf = 2;
895 	else
896 		rf = 1;
897 	if (thermalvalue) {
898 		ele_d = rtl_get_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
899 				      BMASKDWORD) & BMASKOFDM_D;
900 		for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
901 			if (ele_d == (ofdmswing_table[i] & BMASKOFDM_D)) {
902 				ofdm_index_old[0] = (u8) i;
903 
904 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
905 					 "Initial pathA ele_d reg0x%x = 0x%lx, ofdm_index=0x%x\n",
906 					 ROFDM0_XATxIQIMBALANCE,
907 					 ele_d, ofdm_index_old[0]);
908 				break;
909 			}
910 		}
911 		if (is2t) {
912 			ele_d = rtl_get_bbreg(hw, ROFDM0_XBTxIQIMBALANCE,
913 					      BMASKDWORD) & BMASKOFDM_D;
914 			for (i = 0; i < OFDM_TABLE_SIZE_92D; i++) {
915 				if (ele_d ==
916 				    (ofdmswing_table[i] & BMASKOFDM_D)) {
917 					ofdm_index_old[1] = (u8) i;
918 					RT_TRACE(rtlpriv, COMP_POWER_TRACKING,
919 						 DBG_LOUD,
920 						 "Initial pathB ele_d reg 0x%x = 0x%lx, ofdm_index = 0x%x\n",
921 						 ROFDM0_XBTxIQIMBALANCE, ele_d,
922 						 ofdm_index_old[1]);
923 					break;
924 				}
925 			}
926 		}
927 		if (rtlhal->current_bandtype == BAND_ON_2_4G) {
928 			rtl92d_bandtype_2_4G(hw, &temp_cck, &cck_index_old);
929 		} else {
930 			temp_cck = 0x090e1317;
931 			cck_index_old = 12;
932 		}
933 
934 		if (!rtlpriv->dm.thermalvalue) {
935 			rtlpriv->dm.thermalvalue =
936 				 rtlefuse->eeprom_thermalmeter;
937 			rtlpriv->dm.thermalvalue_lck = thermalvalue;
938 			rtlpriv->dm.thermalvalue_iqk = thermalvalue;
939 			rtlpriv->dm.thermalvalue_rxgain =
940 					 rtlefuse->eeprom_thermalmeter;
941 			for (i = 0; i < rf; i++)
942 				rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
943 			rtlpriv->dm.cck_index = cck_index_old;
944 		}
945 		if (rtlhal->reloadtxpowerindex) {
946 			for (i = 0; i < rf; i++)
947 				rtlpriv->dm.ofdm_index[i] = ofdm_index_old[i];
948 			rtlpriv->dm.cck_index = cck_index_old;
949 			RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
950 				 "reload ofdm index for band switch\n");
951 		}
952 		rtlpriv->dm.thermalvalue_avg
953 			    [rtlpriv->dm.thermalvalue_avg_index] = thermalvalue;
954 		rtlpriv->dm.thermalvalue_avg_index++;
955 		if (rtlpriv->dm.thermalvalue_avg_index == AVG_THERMAL_NUM)
956 			rtlpriv->dm.thermalvalue_avg_index = 0;
957 		for (i = 0; i < AVG_THERMAL_NUM; i++) {
958 			if (rtlpriv->dm.thermalvalue_avg[i]) {
959 				thermalvalue_avg +=
960 					 rtlpriv->dm.thermalvalue_avg[i];
961 				thermalvalue_avg_count++;
962 			}
963 		}
964 		if (thermalvalue_avg_count)
965 			thermalvalue = (u8) (thermalvalue_avg /
966 					thermalvalue_avg_count);
967 		if (rtlhal->reloadtxpowerindex) {
968 			delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
969 			    (thermalvalue - rtlefuse->eeprom_thermalmeter) :
970 			    (rtlefuse->eeprom_thermalmeter - thermalvalue);
971 			rtlhal->reloadtxpowerindex = false;
972 			rtlpriv->dm.done_txpower = false;
973 		} else if (rtlpriv->dm.done_txpower) {
974 			delta = (thermalvalue > rtlpriv->dm.thermalvalue) ?
975 			    (thermalvalue - rtlpriv->dm.thermalvalue) :
976 			    (rtlpriv->dm.thermalvalue - thermalvalue);
977 		} else {
978 			delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
979 			    (thermalvalue - rtlefuse->eeprom_thermalmeter) :
980 			    (rtlefuse->eeprom_thermalmeter - thermalvalue);
981 		}
982 		delta_lck = (thermalvalue > rtlpriv->dm.thermalvalue_lck) ?
983 		    (thermalvalue - rtlpriv->dm.thermalvalue_lck) :
984 		    (rtlpriv->dm.thermalvalue_lck - thermalvalue);
985 		delta_iqk = (thermalvalue > rtlpriv->dm.thermalvalue_iqk) ?
986 		    (thermalvalue - rtlpriv->dm.thermalvalue_iqk) :
987 		    (rtlpriv->dm.thermalvalue_iqk - thermalvalue);
988 		delta_rxgain =
989 			(thermalvalue > rtlpriv->dm.thermalvalue_rxgain) ?
990 			(thermalvalue - rtlpriv->dm.thermalvalue_rxgain) :
991 			(rtlpriv->dm.thermalvalue_rxgain - thermalvalue);
992 		RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
993 			 "Readback Thermal Meter = 0x%x pre thermal meter 0x%x eeprom_thermalmeter 0x%x delta 0x%x delta_lck 0x%x delta_iqk 0x%x\n",
994 			 thermalvalue, rtlpriv->dm.thermalvalue,
995 			 rtlefuse->eeprom_thermalmeter, delta, delta_lck,
996 			 delta_iqk);
997 		if ((delta_lck > rtlefuse->delta_lck) &&
998 		    (rtlefuse->delta_lck != 0)) {
999 			rtlpriv->dm.thermalvalue_lck = thermalvalue;
1000 			rtl92d_phy_lc_calibrate(hw);
1001 		}
1002 		if (delta > 0 && rtlpriv->dm.txpower_track_control) {
1003 			rtlpriv->dm.done_txpower = true;
1004 			delta = (thermalvalue > rtlefuse->eeprom_thermalmeter) ?
1005 			    (thermalvalue - rtlefuse->eeprom_thermalmeter) :
1006 			    (rtlefuse->eeprom_thermalmeter - thermalvalue);
1007 			if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1008 				offset = 4;
1009 				if (delta > INDEX_MAPPING_NUM - 1)
1010 					index = index_mapping[offset]
1011 						[INDEX_MAPPING_NUM - 1];
1012 				else
1013 					index = index_mapping[offset][delta];
1014 				if (thermalvalue > rtlpriv->dm.thermalvalue) {
1015 					for (i = 0; i < rf; i++)
1016 						ofdm_index[i] -= delta;
1017 					cck_index -= delta;
1018 				} else {
1019 					for (i = 0; i < rf; i++)
1020 						ofdm_index[i] += index;
1021 					cck_index += index;
1022 				}
1023 			} else if (rtlhal->current_bandtype == BAND_ON_5G) {
1024 				rtl92d_bandtype_5G(rtlhal, ofdm_index,
1025 						   &internal_pa, thermalvalue,
1026 						   delta, rf, rtlefuse, rtlpriv,
1027 						   rtlphy, index_mapping,
1028 						   index_mapping_internal_pa);
1029 			}
1030 			if (is2t) {
1031 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1032 					 "temp OFDM_A_index=0x%x, OFDM_B_index = 0x%x,cck_index=0x%x\n",
1033 					 rtlpriv->dm.ofdm_index[0],
1034 					 rtlpriv->dm.ofdm_index[1],
1035 					 rtlpriv->dm.cck_index);
1036 			} else {
1037 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1038 					 "temp OFDM_A_index=0x%x,cck_index = 0x%x\n",
1039 					 rtlpriv->dm.ofdm_index[0],
1040 					 rtlpriv->dm.cck_index);
1041 			}
1042 			for (i = 0; i < rf; i++) {
1043 				if (ofdm_index[i] > OFDM_TABLE_SIZE_92D - 1)
1044 					ofdm_index[i] = OFDM_TABLE_SIZE_92D - 1;
1045 				else if (ofdm_index[i] < ofdm_min_index)
1046 					ofdm_index[i] = ofdm_min_index;
1047 			}
1048 			if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1049 				if (cck_index > CCK_TABLE_SIZE - 1) {
1050 					cck_index = CCK_TABLE_SIZE - 1;
1051 				} else if (internal_pa ||
1052 					   rtlhal->current_bandtype ==
1053 					   BAND_ON_2_4G) {
1054 					if (ofdm_index[i] <
1055 					    ofdm_min_index_internal_pa)
1056 						ofdm_index[i] =
1057 						     ofdm_min_index_internal_pa;
1058 				} else if (cck_index < 0) {
1059 					cck_index = 0;
1060 				}
1061 			}
1062 			if (is2t) {
1063 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1064 					 "new OFDM_A_index=0x%x, OFDM_B_index = 0x%x, cck_index=0x%x\n",
1065 					 ofdm_index[0], ofdm_index[1],
1066 					 cck_index);
1067 			} else {
1068 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1069 					 "new OFDM_A_index=0x%x,cck_index = 0x%x\n",
1070 					 ofdm_index[0], cck_index);
1071 			}
1072 			ele_d = (ofdmswing_table[(u8) ofdm_index[0]] &
1073 						 0xFFC00000) >> 22;
1074 			val_x = rtlphy->iqk_matrix
1075 						[indexforchannel].value[0][0];
1076 			val_y = rtlphy->iqk_matrix
1077 						[indexforchannel].value[0][1];
1078 			if (val_x != 0) {
1079 				if ((val_x & 0x00000200) != 0)
1080 					val_x = val_x | 0xFFFFFC00;
1081 				ele_a =
1082 				    ((val_x * ele_d) >> 8) & 0x000003FF;
1083 
1084 				/* new element C = element D x Y */
1085 				if ((val_y & 0x00000200) != 0)
1086 					val_y = val_y | 0xFFFFFC00;
1087 				ele_c = ((val_y * ele_d) >> 8) & 0x000003FF;
1088 
1089 				/* wirte new elements A, C, D to regC80 and
1090 				 * regC94, element B is always 0 */
1091 				value32 = (ele_d << 22) | ((ele_c & 0x3F) <<
1092 					  16) | ele_a;
1093 				rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1094 					      BMASKDWORD, value32);
1095 
1096 				value32 = (ele_c & 0x000003C0) >> 6;
1097 				rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1098 					      value32);
1099 
1100 				value32 = ((val_x * ele_d) >> 7) & 0x01;
1101 				rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD, BIT(24),
1102 					      value32);
1103 
1104 			} else {
1105 				rtl_set_bbreg(hw, ROFDM0_XATxIQIMBALANCE,
1106 					      BMASKDWORD,
1107 					      ofdmswing_table
1108 					      [(u8)ofdm_index[0]]);
1109 				rtl_set_bbreg(hw, ROFDM0_XCTxAFE, BMASKH4BITS,
1110 					      0x00);
1111 				rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1112 					      BIT(24), 0x00);
1113 			}
1114 
1115 			RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1116 				 "TxPwrTracking for interface %d path A: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xe94 = 0x%lx 0xe9c = 0x%lx\n",
1117 				 rtlhal->interfaceindex,
1118 				 val_x, val_y, ele_a, ele_c, ele_d,
1119 				 val_x, val_y);
1120 
1121 			if (rtlhal->current_bandtype == BAND_ON_2_4G) {
1122 				/* Adjust CCK according to IQK result */
1123 				if (!rtlpriv->dm.cck_inch14) {
1124 					rtl_write_byte(rtlpriv, 0xa22,
1125 						       cckswing_table_ch1ch13
1126 						       [(u8)cck_index][0]);
1127 					rtl_write_byte(rtlpriv, 0xa23,
1128 						       cckswing_table_ch1ch13
1129 						       [(u8)cck_index][1]);
1130 					rtl_write_byte(rtlpriv, 0xa24,
1131 						       cckswing_table_ch1ch13
1132 						       [(u8)cck_index][2]);
1133 					rtl_write_byte(rtlpriv, 0xa25,
1134 						       cckswing_table_ch1ch13
1135 						       [(u8)cck_index][3]);
1136 					rtl_write_byte(rtlpriv, 0xa26,
1137 						       cckswing_table_ch1ch13
1138 						       [(u8)cck_index][4]);
1139 					rtl_write_byte(rtlpriv, 0xa27,
1140 						       cckswing_table_ch1ch13
1141 						       [(u8)cck_index][5]);
1142 					rtl_write_byte(rtlpriv, 0xa28,
1143 						       cckswing_table_ch1ch13
1144 						       [(u8)cck_index][6]);
1145 					rtl_write_byte(rtlpriv, 0xa29,
1146 						       cckswing_table_ch1ch13
1147 						       [(u8)cck_index][7]);
1148 				} else {
1149 					rtl_write_byte(rtlpriv, 0xa22,
1150 						       cckswing_table_ch14
1151 						       [(u8)cck_index][0]);
1152 					rtl_write_byte(rtlpriv, 0xa23,
1153 						       cckswing_table_ch14
1154 						       [(u8)cck_index][1]);
1155 					rtl_write_byte(rtlpriv, 0xa24,
1156 						       cckswing_table_ch14
1157 						       [(u8)cck_index][2]);
1158 					rtl_write_byte(rtlpriv, 0xa25,
1159 						       cckswing_table_ch14
1160 						       [(u8)cck_index][3]);
1161 					rtl_write_byte(rtlpriv, 0xa26,
1162 						       cckswing_table_ch14
1163 						       [(u8)cck_index][4]);
1164 					rtl_write_byte(rtlpriv, 0xa27,
1165 						       cckswing_table_ch14
1166 						       [(u8)cck_index][5]);
1167 					rtl_write_byte(rtlpriv, 0xa28,
1168 						       cckswing_table_ch14
1169 						       [(u8)cck_index][6]);
1170 					rtl_write_byte(rtlpriv, 0xa29,
1171 						       cckswing_table_ch14
1172 						       [(u8)cck_index][7]);
1173 				}
1174 			}
1175 			if (is2t) {
1176 				ele_d = (ofdmswing_table[(u8) ofdm_index[1]] &
1177 						0xFFC00000) >> 22;
1178 				val_x = rtlphy->iqk_matrix
1179 						[indexforchannel].value[0][4];
1180 				val_y = rtlphy->iqk_matrix
1181 						[indexforchannel].value[0][5];
1182 				if (val_x != 0) {
1183 					if ((val_x & 0x00000200) != 0)
1184 						/* consider minus */
1185 						val_x = val_x | 0xFFFFFC00;
1186 					ele_a = ((val_x * ele_d) >> 8) &
1187 						0x000003FF;
1188 					/* new element C = element D x Y */
1189 					if ((val_y & 0x00000200) != 0)
1190 						val_y =
1191 						    val_y | 0xFFFFFC00;
1192 					ele_c =
1193 					    ((val_y *
1194 					      ele_d) >> 8) & 0x00003FF;
1195 					/* write new elements A, C, D to regC88
1196 					 * and regC9C, element B is always 0
1197 					 */
1198 					value32 = (ele_d << 22) |
1199 						  ((ele_c & 0x3F) << 16) |
1200 						  ele_a;
1201 					rtl_set_bbreg(hw,
1202 						      ROFDM0_XBTxIQIMBALANCE,
1203 						      BMASKDWORD, value32);
1204 					value32 = (ele_c & 0x000003C0) >> 6;
1205 					rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1206 						      BMASKH4BITS, value32);
1207 					value32 = ((val_x * ele_d) >> 7) & 0x01;
1208 					rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1209 						      BIT(28), value32);
1210 				} else {
1211 					rtl_set_bbreg(hw,
1212 						      ROFDM0_XBTxIQIMBALANCE,
1213 						      BMASKDWORD,
1214 						      ofdmswing_table
1215 						      [(u8) ofdm_index[1]]);
1216 					rtl_set_bbreg(hw, ROFDM0_XDTxAFE,
1217 						      BMASKH4BITS, 0x00);
1218 					rtl_set_bbreg(hw, ROFDM0_ECCATHRESHOLD,
1219 						      BIT(28), 0x00);
1220 				}
1221 				RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1222 					 "TxPwrTracking path B: X = 0x%lx, Y = 0x%lx ele_A = 0x%lx ele_C = 0x%lx ele_D = 0x%lx 0xeb4 = 0x%lx 0xebc = 0x%lx\n",
1223 					 val_x, val_y, ele_a, ele_c,
1224 					 ele_d, val_x, val_y);
1225 			}
1226 			RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1227 				 "TxPwrTracking 0xc80 = 0x%x, 0xc94 = 0x%x RF 0x24 = 0x%x\n",
1228 				 rtl_get_bbreg(hw, 0xc80, BMASKDWORD),
1229 				 rtl_get_bbreg(hw, 0xc94, BMASKDWORD),
1230 				 rtl_get_rfreg(hw, RF90_PATH_A, 0x24,
1231 					       BRFREGOFFSETMASK));
1232 		}
1233 		if ((delta_iqk > rtlefuse->delta_iqk) &&
1234 		    (rtlefuse->delta_iqk != 0)) {
1235 			rtl92d_phy_reset_iqk_result(hw);
1236 			rtlpriv->dm.thermalvalue_iqk = thermalvalue;
1237 			rtl92d_phy_iq_calibrate(hw);
1238 		}
1239 		if (delta_rxgain > 0 && rtlhal->current_bandtype == BAND_ON_5G
1240 		    && thermalvalue <= rtlefuse->eeprom_thermalmeter) {
1241 			rtlpriv->dm.thermalvalue_rxgain = thermalvalue;
1242 			rtl92d_dm_rxgain_tracking_thermalmeter(hw);
1243 		}
1244 		if (rtlpriv->dm.txpower_track_control)
1245 			rtlpriv->dm.thermalvalue = thermalvalue;
1246 	}
1247 
1248 	RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD, "<===\n");
1249 }
1250 
rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw * hw)1251 static void rtl92d_dm_initialize_txpower_tracking(struct ieee80211_hw *hw)
1252 {
1253 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1254 
1255 	rtlpriv->dm.txpower_tracking = true;
1256 	rtlpriv->dm.txpower_trackinginit = false;
1257 	rtlpriv->dm.txpower_track_control = true;
1258 	RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1259 		 "pMgntInfo->txpower_tracking = %d\n",
1260 		 rtlpriv->dm.txpower_tracking);
1261 }
1262 
rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw * hw)1263 void rtl92d_dm_check_txpower_tracking_thermal_meter(struct ieee80211_hw *hw)
1264 {
1265 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1266 	static u8 tm_trigger;
1267 
1268 	if (!rtlpriv->dm.txpower_tracking)
1269 		return;
1270 
1271 	if (!tm_trigger) {
1272 		rtl_set_rfreg(hw, RF90_PATH_A, RF_T_METER, BIT(17) |
1273 			      BIT(16), 0x03);
1274 		RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1275 			 "Trigger 92S Thermal Meter!!\n");
1276 		tm_trigger = 1;
1277 		return;
1278 	} else {
1279 		RT_TRACE(rtlpriv, COMP_POWER_TRACKING, DBG_LOUD,
1280 			 "Schedule TxPowerTracking direct call!!\n");
1281 		rtl92d_dm_txpower_tracking_callback_thermalmeter(hw);
1282 		tm_trigger = 0;
1283 	}
1284 }
1285 
rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw * hw)1286 void rtl92d_dm_init_rate_adaptive_mask(struct ieee80211_hw *hw)
1287 {
1288 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1289 	struct rate_adaptive *ra = &(rtlpriv->ra);
1290 
1291 	ra->ratr_state = DM_RATR_STA_INIT;
1292 	ra->pre_ratr_state = DM_RATR_STA_INIT;
1293 	if (rtlpriv->dm.dm_type == DM_TYPE_BYDRIVER)
1294 		rtlpriv->dm.useramask = true;
1295 	else
1296 		rtlpriv->dm.useramask = false;
1297 }
1298 
rtl92d_dm_init(struct ieee80211_hw * hw)1299 void rtl92d_dm_init(struct ieee80211_hw *hw)
1300 {
1301 	struct rtl_priv *rtlpriv = rtl_priv(hw);
1302 
1303 	rtlpriv->dm.dm_type = DM_TYPE_BYDRIVER;
1304 	rtl92d_dm_diginit(hw);
1305 	rtl92d_dm_init_dynamic_txpower(hw);
1306 	rtl92d_dm_init_edca_turbo(hw);
1307 	rtl92d_dm_init_rate_adaptive_mask(hw);
1308 	rtl92d_dm_initialize_txpower_tracking(hw);
1309 }
1310 
rtl92d_dm_watchdog(struct ieee80211_hw * hw)1311 void rtl92d_dm_watchdog(struct ieee80211_hw *hw)
1312 {
1313 	struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1314 	bool fw_current_inpsmode = false;
1315 	bool fwps_awake = true;
1316 
1317 	/* 1. RF is OFF. (No need to do DM.)
1318 	 * 2. Fw is under power saving mode for FwLPS.
1319 	 *    (Prevent from SW/FW I/O racing.)
1320 	 * 3. IPS workitem is scheduled. (Prevent from IPS sequence
1321 	 *    to be swapped with DM.
1322 	 * 4. RFChangeInProgress is TRUE.
1323 	 *    (Prevent from broken by IPS/HW/SW Rf off.) */
1324 
1325 	if ((ppsc->rfpwr_state == ERFON) && ((!fw_current_inpsmode) &&
1326 	    fwps_awake) && (!ppsc->rfchange_inprogress)) {
1327 		rtl92d_dm_pwdb_monitor(hw);
1328 		rtl92d_dm_false_alarm_counter_statistics(hw);
1329 		rtl92d_dm_find_minimum_rssi(hw);
1330 		rtl92d_dm_dig(hw);
1331 		/* rtl92d_dm_dynamic_bb_powersaving(hw); */
1332 		rtl92d_dm_dynamic_txpower(hw);
1333 		/* rtl92d_dm_check_txpower_tracking_thermal_meter(hw); */
1334 		/* rtl92d_dm_refresh_rate_adaptive_mask(hw); */
1335 		/* rtl92d_dm_interrupt_migration(hw); */
1336 		rtl92d_dm_check_edca_turbo(hw);
1337 	}
1338 }
1339