1 /*
2 * intel_mid_thermal.c - Intel MID platform thermal driver
3 *
4 * Copyright (C) 2011 Intel Corporation
5 *
6 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
20 *
21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 * Author: Durgadoss R <durgadoss.r@intel.com>
23 */
24
25 #define pr_fmt(fmt) "intel_mid_thermal: " fmt
26
27 #include <linux/module.h>
28 #include <linux/init.h>
29 #include <linux/err.h>
30 #include <linux/param.h>
31 #include <linux/device.h>
32 #include <linux/platform_device.h>
33 #include <linux/slab.h>
34 #include <linux/pm.h>
35 #include <linux/thermal.h>
36 #include <linux/mfd/intel_msic.h>
37
38 /* Number of thermal sensors */
39 #define MSIC_THERMAL_SENSORS 4
40
41 /* ADC1 - thermal registers */
42 #define MSIC_ADC_ENBL 0x10
43 #define MSIC_ADC_START 0x08
44
45 #define MSIC_ADCTHERM_ENBL 0x04
46 #define MSIC_ADCRRDATA_ENBL 0x05
47 #define MSIC_CHANL_MASK_VAL 0x0F
48
49 #define MSIC_STOPBIT_MASK 16
50 #define MSIC_ADCTHERM_MASK 4
51 /* Number of ADC channels */
52 #define ADC_CHANLS_MAX 15
53 #define ADC_LOOP_MAX (ADC_CHANLS_MAX - MSIC_THERMAL_SENSORS)
54
55 /* ADC channel code values */
56 #define SKIN_SENSOR0_CODE 0x08
57 #define SKIN_SENSOR1_CODE 0x09
58 #define SYS_SENSOR_CODE 0x0A
59 #define MSIC_DIE_SENSOR_CODE 0x03
60
61 #define SKIN_THERM_SENSOR0 0
62 #define SKIN_THERM_SENSOR1 1
63 #define SYS_THERM_SENSOR2 2
64 #define MSIC_DIE_THERM_SENSOR3 3
65
66 /* ADC code range */
67 #define ADC_MAX 977
68 #define ADC_MIN 162
69 #define ADC_VAL0C 887
70 #define ADC_VAL20C 720
71 #define ADC_VAL40C 508
72 #define ADC_VAL60C 315
73
74 /* ADC base addresses */
75 #define ADC_CHNL_START_ADDR INTEL_MSIC_ADC1ADDR0 /* increments by 1 */
76 #define ADC_DATA_START_ADDR INTEL_MSIC_ADC1SNS0H /* increments by 2 */
77
78 /* MSIC die attributes */
79 #define MSIC_DIE_ADC_MIN 488
80 #define MSIC_DIE_ADC_MAX 1004
81
82 /* This holds the address of the first free ADC channel,
83 * among the 15 channels
84 */
85 static int channel_index;
86
87 struct platform_info {
88 struct platform_device *pdev;
89 struct thermal_zone_device *tzd[MSIC_THERMAL_SENSORS];
90 };
91
92 struct thermal_device_info {
93 unsigned int chnl_addr;
94 int direct;
95 /* This holds the current temperature in millidegree celsius */
96 long curr_temp;
97 };
98
99 /**
100 * to_msic_die_temp - converts adc_val to msic_die temperature
101 * @adc_val: ADC value to be converted
102 *
103 * Can sleep
104 */
to_msic_die_temp(uint16_t adc_val)105 static int to_msic_die_temp(uint16_t adc_val)
106 {
107 return (368 * (adc_val) / 1000) - 220;
108 }
109
110 /**
111 * is_valid_adc - checks whether the adc code is within the defined range
112 * @min: minimum value for the sensor
113 * @max: maximum value for the sensor
114 *
115 * Can sleep
116 */
is_valid_adc(uint16_t adc_val,uint16_t min,uint16_t max)117 static int is_valid_adc(uint16_t adc_val, uint16_t min, uint16_t max)
118 {
119 return (adc_val >= min) && (adc_val <= max);
120 }
121
122 /**
123 * adc_to_temp - converts the ADC code to temperature in C
124 * @direct: true if ths channel is direct index
125 * @adc_val: the adc_val that needs to be converted
126 * @tp: temperature return value
127 *
128 * Linear approximation is used to covert the skin adc value into temperature.
129 * This technique is used to avoid very long look-up table to get
130 * the appropriate temp value from ADC value.
131 * The adc code vs sensor temp curve is split into five parts
132 * to achieve very close approximate temp value with less than
133 * 0.5C error
134 */
adc_to_temp(int direct,uint16_t adc_val,unsigned long * tp)135 static int adc_to_temp(int direct, uint16_t adc_val, unsigned long *tp)
136 {
137 int temp;
138
139 /* Direct conversion for die temperature */
140 if (direct) {
141 if (is_valid_adc(adc_val, MSIC_DIE_ADC_MIN, MSIC_DIE_ADC_MAX)) {
142 *tp = to_msic_die_temp(adc_val) * 1000;
143 return 0;
144 }
145 return -ERANGE;
146 }
147
148 if (!is_valid_adc(adc_val, ADC_MIN, ADC_MAX))
149 return -ERANGE;
150
151 /* Linear approximation for skin temperature */
152 if (adc_val > ADC_VAL0C)
153 temp = 177 - (adc_val/5);
154 else if ((adc_val <= ADC_VAL0C) && (adc_val > ADC_VAL20C))
155 temp = 111 - (adc_val/8);
156 else if ((adc_val <= ADC_VAL20C) && (adc_val > ADC_VAL40C))
157 temp = 92 - (adc_val/10);
158 else if ((adc_val <= ADC_VAL40C) && (adc_val > ADC_VAL60C))
159 temp = 91 - (adc_val/10);
160 else
161 temp = 112 - (adc_val/6);
162
163 /* Convert temperature in celsius to milli degree celsius */
164 *tp = temp * 1000;
165 return 0;
166 }
167
168 /**
169 * mid_read_temp - read sensors for temperature
170 * @temp: holds the current temperature for the sensor after reading
171 *
172 * reads the adc_code from the channel and converts it to real
173 * temperature. The converted value is stored in temp.
174 *
175 * Can sleep
176 */
mid_read_temp(struct thermal_zone_device * tzd,unsigned long * temp)177 static int mid_read_temp(struct thermal_zone_device *tzd, unsigned long *temp)
178 {
179 struct thermal_device_info *td_info = tzd->devdata;
180 uint16_t adc_val, addr;
181 uint8_t data = 0;
182 int ret;
183 unsigned long curr_temp;
184
185
186 addr = td_info->chnl_addr;
187
188 /* Enable the msic for conversion before reading */
189 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCRRDATA_ENBL);
190 if (ret)
191 return ret;
192
193 /* Re-toggle the RRDATARD bit (temporary workaround) */
194 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, MSIC_ADCTHERM_ENBL);
195 if (ret)
196 return ret;
197
198 /* Read the higher bits of data */
199 ret = intel_msic_reg_read(addr, &data);
200 if (ret)
201 return ret;
202
203 /* Shift bits to accommodate the lower two data bits */
204 adc_val = (data << 2);
205 addr++;
206
207 ret = intel_msic_reg_read(addr, &data);/* Read lower bits */
208 if (ret)
209 return ret;
210
211 /* Adding lower two bits to the higher bits */
212 data &= 03;
213 adc_val += data;
214
215 /* Convert ADC value to temperature */
216 ret = adc_to_temp(td_info->direct, adc_val, &curr_temp);
217 if (ret == 0)
218 *temp = td_info->curr_temp = curr_temp;
219 return ret;
220 }
221
222 /**
223 * configure_adc - enables/disables the ADC for conversion
224 * @val: zero: disables the ADC non-zero:enables the ADC
225 *
226 * Enable/Disable the ADC depending on the argument
227 *
228 * Can sleep
229 */
configure_adc(int val)230 static int configure_adc(int val)
231 {
232 int ret;
233 uint8_t data;
234
235 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
236 if (ret)
237 return ret;
238
239 if (val) {
240 /* Enable and start the ADC */
241 data |= (MSIC_ADC_ENBL | MSIC_ADC_START);
242 } else {
243 /* Just stop the ADC */
244 data &= (~MSIC_ADC_START);
245 }
246 return intel_msic_reg_write(INTEL_MSIC_ADC1CNTL1, data);
247 }
248
249 /**
250 * set_up_therm_channel - enable thermal channel for conversion
251 * @base_addr: index of free msic ADC channel
252 *
253 * Enable all the three channels for conversion
254 *
255 * Can sleep
256 */
set_up_therm_channel(u16 base_addr)257 static int set_up_therm_channel(u16 base_addr)
258 {
259 int ret;
260
261 /* Enable all the sensor channels */
262 ret = intel_msic_reg_write(base_addr, SKIN_SENSOR0_CODE);
263 if (ret)
264 return ret;
265
266 ret = intel_msic_reg_write(base_addr + 1, SKIN_SENSOR1_CODE);
267 if (ret)
268 return ret;
269
270 ret = intel_msic_reg_write(base_addr + 2, SYS_SENSOR_CODE);
271 if (ret)
272 return ret;
273
274 /* Since this is the last channel, set the stop bit
275 * to 1 by ORing the DIE_SENSOR_CODE with 0x10 */
276 ret = intel_msic_reg_write(base_addr + 3,
277 (MSIC_DIE_SENSOR_CODE | 0x10));
278 if (ret)
279 return ret;
280
281 /* Enable ADC and start it */
282 return configure_adc(1);
283 }
284
285 /**
286 * reset_stopbit - sets the stop bit to 0 on the given channel
287 * @addr: address of the channel
288 *
289 * Can sleep
290 */
reset_stopbit(uint16_t addr)291 static int reset_stopbit(uint16_t addr)
292 {
293 int ret;
294 uint8_t data;
295 ret = intel_msic_reg_read(addr, &data);
296 if (ret)
297 return ret;
298 /* Set the stop bit to zero */
299 return intel_msic_reg_write(addr, (data & 0xEF));
300 }
301
302 /**
303 * find_free_channel - finds an empty channel for conversion
304 *
305 * If the ADC is not enabled then start using 0th channel
306 * itself. Otherwise find an empty channel by looking for a
307 * channel in which the stopbit is set to 1. returns the index
308 * of the first free channel if succeeds or an error code.
309 *
310 * Context: can sleep
311 *
312 * FIXME: Ultimately the channel allocator will move into the intel_scu_ipc
313 * code.
314 */
find_free_channel(void)315 static int find_free_channel(void)
316 {
317 int ret;
318 int i;
319 uint8_t data;
320
321 /* check whether ADC is enabled */
322 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL1, &data);
323 if (ret)
324 return ret;
325
326 if ((data & MSIC_ADC_ENBL) == 0)
327 return 0;
328
329 /* ADC is already enabled; Looking for an empty channel */
330 for (i = 0; i < ADC_CHANLS_MAX; i++) {
331 ret = intel_msic_reg_read(ADC_CHNL_START_ADDR + i, &data);
332 if (ret)
333 return ret;
334
335 if (data & MSIC_STOPBIT_MASK) {
336 ret = i;
337 break;
338 }
339 }
340 return (ret > ADC_LOOP_MAX) ? (-EINVAL) : ret;
341 }
342
343 /**
344 * mid_initialize_adc - initializing the ADC
345 * @dev: our device structure
346 *
347 * Initialize the ADC for reading thermistor values. Can sleep.
348 */
mid_initialize_adc(struct device * dev)349 static int mid_initialize_adc(struct device *dev)
350 {
351 u8 data;
352 u16 base_addr;
353 int ret;
354
355 /*
356 * Ensure that adctherm is disabled before we
357 * initialize the ADC
358 */
359 ret = intel_msic_reg_read(INTEL_MSIC_ADC1CNTL3, &data);
360 if (ret)
361 return ret;
362
363 data &= ~MSIC_ADCTHERM_MASK;
364 ret = intel_msic_reg_write(INTEL_MSIC_ADC1CNTL3, data);
365 if (ret)
366 return ret;
367
368 /* Index of the first channel in which the stop bit is set */
369 channel_index = find_free_channel();
370 if (channel_index < 0) {
371 dev_err(dev, "No free ADC channels");
372 return channel_index;
373 }
374
375 base_addr = ADC_CHNL_START_ADDR + channel_index;
376
377 if (!(channel_index == 0 || channel_index == ADC_LOOP_MAX)) {
378 /* Reset stop bit for channels other than 0 and 12 */
379 ret = reset_stopbit(base_addr);
380 if (ret)
381 return ret;
382
383 /* Index of the first free channel */
384 base_addr++;
385 channel_index++;
386 }
387
388 ret = set_up_therm_channel(base_addr);
389 if (ret) {
390 dev_err(dev, "unable to enable ADC");
391 return ret;
392 }
393 dev_dbg(dev, "ADC initialization successful");
394 return ret;
395 }
396
397 /**
398 * initialize_sensor - sets default temp and timer ranges
399 * @index: index of the sensor
400 *
401 * Context: can sleep
402 */
initialize_sensor(int index)403 static struct thermal_device_info *initialize_sensor(int index)
404 {
405 struct thermal_device_info *td_info =
406 kzalloc(sizeof(struct thermal_device_info), GFP_KERNEL);
407
408 if (!td_info)
409 return NULL;
410
411 /* Set the base addr of the channel for this sensor */
412 td_info->chnl_addr = ADC_DATA_START_ADDR + 2 * (channel_index + index);
413 /* Sensor 3 is direct conversion */
414 if (index == 3)
415 td_info->direct = 1;
416 return td_info;
417 }
418
419 /**
420 * mid_thermal_resume - resume routine
421 * @dev: device structure
422 *
423 * mid thermal resume: re-initializes the adc. Can sleep.
424 */
mid_thermal_resume(struct device * dev)425 static int mid_thermal_resume(struct device *dev)
426 {
427 return mid_initialize_adc(dev);
428 }
429
430 /**
431 * mid_thermal_suspend - suspend routine
432 * @dev: device structure
433 *
434 * mid thermal suspend implements the suspend functionality
435 * by stopping the ADC. Can sleep.
436 */
mid_thermal_suspend(struct device * dev)437 static int mid_thermal_suspend(struct device *dev)
438 {
439 /*
440 * This just stops the ADC and does not disable it.
441 * temporary workaround until we have a generic ADC driver.
442 * If 0 is passed, it disables the ADC.
443 */
444 return configure_adc(0);
445 }
446
447 static SIMPLE_DEV_PM_OPS(mid_thermal_pm,
448 mid_thermal_suspend, mid_thermal_resume);
449
450 /**
451 * read_curr_temp - reads the current temperature and stores in temp
452 * @temp: holds the current temperature value after reading
453 *
454 * Can sleep
455 */
read_curr_temp(struct thermal_zone_device * tzd,unsigned long * temp)456 static int read_curr_temp(struct thermal_zone_device *tzd, unsigned long *temp)
457 {
458 WARN_ON(tzd == NULL);
459 return mid_read_temp(tzd, temp);
460 }
461
462 /* Can't be const */
463 static struct thermal_zone_device_ops tzd_ops = {
464 .get_temp = read_curr_temp,
465 };
466
467 /**
468 * mid_thermal_probe - mfld thermal initialize
469 * @pdev: platform device structure
470 *
471 * mid thermal probe initializes the hardware and registers
472 * all the sensors with the generic thermal framework. Can sleep.
473 */
mid_thermal_probe(struct platform_device * pdev)474 static int mid_thermal_probe(struct platform_device *pdev)
475 {
476 static char *name[MSIC_THERMAL_SENSORS] = {
477 "skin0", "skin1", "sys", "msicdie"
478 };
479
480 int ret;
481 int i;
482 struct platform_info *pinfo;
483
484 pinfo = kzalloc(sizeof(struct platform_info), GFP_KERNEL);
485 if (!pinfo)
486 return -ENOMEM;
487
488 /* Initializing the hardware */
489 ret = mid_initialize_adc(&pdev->dev);
490 if (ret) {
491 dev_err(&pdev->dev, "ADC init failed");
492 kfree(pinfo);
493 return ret;
494 }
495
496 /* Register each sensor with the generic thermal framework*/
497 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
498 struct thermal_device_info *td_info = initialize_sensor(i);
499
500 if (!td_info) {
501 ret = -ENOMEM;
502 goto err;
503 }
504 pinfo->tzd[i] = thermal_zone_device_register(name[i],
505 0, 0, td_info, &tzd_ops, NULL, 0, 0);
506 if (IS_ERR(pinfo->tzd[i])) {
507 kfree(td_info);
508 ret = PTR_ERR(pinfo->tzd[i]);
509 goto err;
510 }
511 }
512
513 pinfo->pdev = pdev;
514 platform_set_drvdata(pdev, pinfo);
515 return 0;
516
517 err:
518 while (--i >= 0) {
519 kfree(pinfo->tzd[i]->devdata);
520 thermal_zone_device_unregister(pinfo->tzd[i]);
521 }
522 configure_adc(0);
523 kfree(pinfo);
524 return ret;
525 }
526
527 /**
528 * mid_thermal_remove - mfld thermal finalize
529 * @dev: platform device structure
530 *
531 * MLFD thermal remove unregisters all the sensors from the generic
532 * thermal framework. Can sleep.
533 */
mid_thermal_remove(struct platform_device * pdev)534 static int mid_thermal_remove(struct platform_device *pdev)
535 {
536 int i;
537 struct platform_info *pinfo = platform_get_drvdata(pdev);
538
539 for (i = 0; i < MSIC_THERMAL_SENSORS; i++) {
540 kfree(pinfo->tzd[i]->devdata);
541 thermal_zone_device_unregister(pinfo->tzd[i]);
542 }
543
544 kfree(pinfo);
545 platform_set_drvdata(pdev, NULL);
546
547 /* Stop the ADC */
548 return configure_adc(0);
549 }
550
551 #define DRIVER_NAME "msic_thermal"
552
553 static const struct platform_device_id therm_id_table[] = {
554 { DRIVER_NAME, 1 },
555 { "msic_thermal", 1 },
556 { }
557 };
558
559 static struct platform_driver mid_thermal_driver = {
560 .driver = {
561 .name = DRIVER_NAME,
562 .owner = THIS_MODULE,
563 .pm = &mid_thermal_pm,
564 },
565 .probe = mid_thermal_probe,
566 .remove = mid_thermal_remove,
567 .id_table = therm_id_table,
568 };
569
570 module_platform_driver(mid_thermal_driver);
571
572 MODULE_AUTHOR("Durgadoss R <durgadoss.r@intel.com>");
573 MODULE_DESCRIPTION("Intel Medfield Platform Thermal Driver");
574 MODULE_LICENSE("GPL");
575