1 #include <linux/interrupt.h>
2 #include <linux/gpio.h>
3 #include <linux/mutex.h>
4 #include <linux/kernel.h>
5 #include <linux/spi/spi.h>
6 #include <linux/slab.h>
7 #include <linux/export.h>
8
9 #include <linux/iio/iio.h>
10 #include <linux/iio/kfifo_buf.h>
11 #include <linux/iio/trigger.h>
12 #include <linux/iio/trigger_consumer.h>
13 #include "lis3l02dq.h"
14
15 /**
16 * combine_8_to_16() utility function to munge two u8s into u16
17 **/
combine_8_to_16(u8 lower,u8 upper)18 static inline u16 combine_8_to_16(u8 lower, u8 upper)
19 {
20 u16 _lower = lower;
21 u16 _upper = upper;
22 return _lower | (_upper << 8);
23 }
24
25 /**
26 * lis3l02dq_data_rdy_trig_poll() the event handler for the data rdy trig
27 **/
lis3l02dq_data_rdy_trig_poll(int irq,void * private)28 irqreturn_t lis3l02dq_data_rdy_trig_poll(int irq, void *private)
29 {
30 struct iio_dev *indio_dev = private;
31 struct lis3l02dq_state *st = iio_priv(indio_dev);
32
33 if (st->trigger_on) {
34 iio_trigger_poll(st->trig, iio_get_time_ns());
35 return IRQ_HANDLED;
36 } else
37 return IRQ_WAKE_THREAD;
38 }
39
40 static const u8 read_all_tx_array[] = {
41 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_L_ADDR), 0,
42 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_X_H_ADDR), 0,
43 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_L_ADDR), 0,
44 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Y_H_ADDR), 0,
45 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_L_ADDR), 0,
46 LIS3L02DQ_READ_REG(LIS3L02DQ_REG_OUT_Z_H_ADDR), 0,
47 };
48
49 /**
50 * lis3l02dq_read_all() Reads all channels currently selected
51 * @indio_dev: IIO device state
52 * @rx_array: (dma capable) receive array, must be at least
53 * 4*number of channels
54 **/
lis3l02dq_read_all(struct iio_dev * indio_dev,u8 * rx_array)55 static int lis3l02dq_read_all(struct iio_dev *indio_dev, u8 *rx_array)
56 {
57 struct lis3l02dq_state *st = iio_priv(indio_dev);
58 struct spi_transfer *xfers;
59 struct spi_message msg;
60 int ret, i, j = 0;
61
62 xfers = kcalloc(bitmap_weight(indio_dev->active_scan_mask,
63 indio_dev->masklength) * 2,
64 sizeof(*xfers), GFP_KERNEL);
65 if (!xfers)
66 return -ENOMEM;
67
68 mutex_lock(&st->buf_lock);
69
70 for (i = 0; i < ARRAY_SIZE(read_all_tx_array)/4; i++)
71 if (test_bit(i, indio_dev->active_scan_mask)) {
72 /* lower byte */
73 xfers[j].tx_buf = st->tx + 2*j;
74 st->tx[2*j] = read_all_tx_array[i*4];
75 st->tx[2*j + 1] = 0;
76 if (rx_array)
77 xfers[j].rx_buf = rx_array + j*2;
78 xfers[j].bits_per_word = 8;
79 xfers[j].len = 2;
80 xfers[j].cs_change = 1;
81 j++;
82
83 /* upper byte */
84 xfers[j].tx_buf = st->tx + 2*j;
85 st->tx[2*j] = read_all_tx_array[i*4 + 2];
86 st->tx[2*j + 1] = 0;
87 if (rx_array)
88 xfers[j].rx_buf = rx_array + j*2;
89 xfers[j].bits_per_word = 8;
90 xfers[j].len = 2;
91 xfers[j].cs_change = 1;
92 j++;
93 }
94
95 /* After these are transmitted, the rx_buff should have
96 * values in alternate bytes
97 */
98 spi_message_init(&msg);
99 for (j = 0; j < bitmap_weight(indio_dev->active_scan_mask,
100 indio_dev->masklength) * 2; j++)
101 spi_message_add_tail(&xfers[j], &msg);
102
103 ret = spi_sync(st->us, &msg);
104 mutex_unlock(&st->buf_lock);
105 kfree(xfers);
106
107 return ret;
108 }
109
lis3l02dq_get_buffer_element(struct iio_dev * indio_dev,u8 * buf)110 static int lis3l02dq_get_buffer_element(struct iio_dev *indio_dev,
111 u8 *buf)
112 {
113 int ret, i;
114 u8 *rx_array ;
115 s16 *data = (s16 *)buf;
116 int scan_count = bitmap_weight(indio_dev->active_scan_mask,
117 indio_dev->masklength);
118
119 rx_array = kzalloc(4 * scan_count, GFP_KERNEL);
120 if (rx_array == NULL)
121 return -ENOMEM;
122 ret = lis3l02dq_read_all(indio_dev, rx_array);
123 if (ret < 0) {
124 kfree(rx_array);
125 return ret;
126 }
127 for (i = 0; i < scan_count; i++)
128 data[i] = combine_8_to_16(rx_array[i*4+1],
129 rx_array[i*4+3]);
130 kfree(rx_array);
131
132 return i*sizeof(data[0]);
133 }
134
lis3l02dq_trigger_handler(int irq,void * p)135 static irqreturn_t lis3l02dq_trigger_handler(int irq, void *p)
136 {
137 struct iio_poll_func *pf = p;
138 struct iio_dev *indio_dev = pf->indio_dev;
139 int len = 0;
140 char *data;
141
142 data = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
143 if (data == NULL)
144 goto done;
145
146 if (!bitmap_empty(indio_dev->active_scan_mask, indio_dev->masklength))
147 len = lis3l02dq_get_buffer_element(indio_dev, data);
148
149 /* Guaranteed to be aligned with 8 byte boundary */
150 if (indio_dev->scan_timestamp)
151 *(s64 *)((u8 *)data + ALIGN(len, sizeof(s64)))
152 = pf->timestamp;
153 iio_push_to_buffers(indio_dev, (u8 *)data);
154
155 kfree(data);
156 done:
157 iio_trigger_notify_done(indio_dev->trig);
158 return IRQ_HANDLED;
159 }
160
161 /* Caller responsible for locking as necessary. */
162 static int
__lis3l02dq_write_data_ready_config(struct iio_dev * indio_dev,bool state)163 __lis3l02dq_write_data_ready_config(struct iio_dev *indio_dev, bool state)
164 {
165 int ret;
166 u8 valold;
167 bool currentlyset;
168 struct lis3l02dq_state *st = iio_priv(indio_dev);
169
170 /* Get the current event mask register */
171 ret = lis3l02dq_spi_read_reg_8(indio_dev,
172 LIS3L02DQ_REG_CTRL_2_ADDR,
173 &valold);
174 if (ret)
175 goto error_ret;
176 /* Find out if data ready is already on */
177 currentlyset
178 = valold & LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
179
180 /* Disable requested */
181 if (!state && currentlyset) {
182 /* Disable the data ready signal */
183 valold &= ~LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
184
185 /* The double write is to overcome a hardware bug? */
186 ret = lis3l02dq_spi_write_reg_8(indio_dev,
187 LIS3L02DQ_REG_CTRL_2_ADDR,
188 valold);
189 if (ret)
190 goto error_ret;
191 ret = lis3l02dq_spi_write_reg_8(indio_dev,
192 LIS3L02DQ_REG_CTRL_2_ADDR,
193 valold);
194 if (ret)
195 goto error_ret;
196 st->trigger_on = false;
197 /* Enable requested */
198 } else if (state && !currentlyset) {
199 /* If not set, enable requested
200 * first disable all events */
201 ret = lis3l02dq_disable_all_events(indio_dev);
202 if (ret < 0)
203 goto error_ret;
204
205 valold = ret |
206 LIS3L02DQ_REG_CTRL_2_ENABLE_DATA_READY_GENERATION;
207
208 st->trigger_on = true;
209 ret = lis3l02dq_spi_write_reg_8(indio_dev,
210 LIS3L02DQ_REG_CTRL_2_ADDR,
211 valold);
212 if (ret)
213 goto error_ret;
214 }
215
216 return 0;
217 error_ret:
218 return ret;
219 }
220
221 /**
222 * lis3l02dq_data_rdy_trigger_set_state() set datardy interrupt state
223 *
224 * If disabling the interrupt also does a final read to ensure it is clear.
225 * This is only important in some cases where the scan enable elements are
226 * switched before the buffer is reenabled.
227 **/
lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger * trig,bool state)228 static int lis3l02dq_data_rdy_trigger_set_state(struct iio_trigger *trig,
229 bool state)
230 {
231 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
232 int ret = 0;
233 u8 t;
234
235 __lis3l02dq_write_data_ready_config(indio_dev, state);
236 if (!state) {
237 /*
238 * A possible quirk with the handler is currently worked around
239 * by ensuring outstanding read events are cleared.
240 */
241 ret = lis3l02dq_read_all(indio_dev, NULL);
242 }
243 lis3l02dq_spi_read_reg_8(indio_dev,
244 LIS3L02DQ_REG_WAKE_UP_SRC_ADDR,
245 &t);
246 return ret;
247 }
248
249 /**
250 * lis3l02dq_trig_try_reen() try reenabling irq for data rdy trigger
251 * @trig: the datardy trigger
252 */
lis3l02dq_trig_try_reen(struct iio_trigger * trig)253 static int lis3l02dq_trig_try_reen(struct iio_trigger *trig)
254 {
255 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
256 struct lis3l02dq_state *st = iio_priv(indio_dev);
257 int i;
258
259 /* If gpio still high (or high again)
260 * In theory possible we will need to do this several times */
261 for (i = 0; i < 5; i++)
262 if (gpio_get_value(st->gpio))
263 lis3l02dq_read_all(indio_dev, NULL);
264 else
265 break;
266 if (i == 5)
267 printk(KERN_INFO
268 "Failed to clear the interrupt for lis3l02dq\n");
269
270 /* irq reenabled so success! */
271 return 0;
272 }
273
274 static const struct iio_trigger_ops lis3l02dq_trigger_ops = {
275 .owner = THIS_MODULE,
276 .set_trigger_state = &lis3l02dq_data_rdy_trigger_set_state,
277 .try_reenable = &lis3l02dq_trig_try_reen,
278 };
279
lis3l02dq_probe_trigger(struct iio_dev * indio_dev)280 int lis3l02dq_probe_trigger(struct iio_dev *indio_dev)
281 {
282 int ret;
283 struct lis3l02dq_state *st = iio_priv(indio_dev);
284
285 st->trig = iio_trigger_alloc("lis3l02dq-dev%d", indio_dev->id);
286 if (!st->trig) {
287 ret = -ENOMEM;
288 goto error_ret;
289 }
290
291 st->trig->dev.parent = &st->us->dev;
292 st->trig->ops = &lis3l02dq_trigger_ops;
293 iio_trigger_set_drvdata(st->trig, indio_dev);
294 ret = iio_trigger_register(st->trig);
295 if (ret)
296 goto error_free_trig;
297
298 return 0;
299
300 error_free_trig:
301 iio_trigger_free(st->trig);
302 error_ret:
303 return ret;
304 }
305
lis3l02dq_remove_trigger(struct iio_dev * indio_dev)306 void lis3l02dq_remove_trigger(struct iio_dev *indio_dev)
307 {
308 struct lis3l02dq_state *st = iio_priv(indio_dev);
309
310 iio_trigger_unregister(st->trig);
311 iio_trigger_free(st->trig);
312 }
313
lis3l02dq_unconfigure_buffer(struct iio_dev * indio_dev)314 void lis3l02dq_unconfigure_buffer(struct iio_dev *indio_dev)
315 {
316 iio_dealloc_pollfunc(indio_dev->pollfunc);
317 iio_kfifo_free(indio_dev->buffer);
318 }
319
lis3l02dq_buffer_postenable(struct iio_dev * indio_dev)320 static int lis3l02dq_buffer_postenable(struct iio_dev *indio_dev)
321 {
322 /* Disable unwanted channels otherwise the interrupt will not clear */
323 u8 t;
324 int ret;
325 bool oneenabled = false;
326
327 ret = lis3l02dq_spi_read_reg_8(indio_dev,
328 LIS3L02DQ_REG_CTRL_1_ADDR,
329 &t);
330 if (ret)
331 goto error_ret;
332
333 if (test_bit(0, indio_dev->active_scan_mask)) {
334 t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
335 oneenabled = true;
336 } else
337 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE;
338 if (test_bit(1, indio_dev->active_scan_mask)) {
339 t |= LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
340 oneenabled = true;
341 } else
342 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE;
343 if (test_bit(2, indio_dev->active_scan_mask)) {
344 t |= LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
345 oneenabled = true;
346 } else
347 t &= ~LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
348
349 if (!oneenabled) /* what happens in this case is unknown */
350 return -EINVAL;
351 ret = lis3l02dq_spi_write_reg_8(indio_dev,
352 LIS3L02DQ_REG_CTRL_1_ADDR,
353 t);
354 if (ret)
355 goto error_ret;
356
357 return iio_triggered_buffer_postenable(indio_dev);
358 error_ret:
359 return ret;
360 }
361
362 /* Turn all channels on again */
lis3l02dq_buffer_predisable(struct iio_dev * indio_dev)363 static int lis3l02dq_buffer_predisable(struct iio_dev *indio_dev)
364 {
365 u8 t;
366 int ret;
367
368 ret = iio_triggered_buffer_predisable(indio_dev);
369 if (ret)
370 goto error_ret;
371
372 ret = lis3l02dq_spi_read_reg_8(indio_dev,
373 LIS3L02DQ_REG_CTRL_1_ADDR,
374 &t);
375 if (ret)
376 goto error_ret;
377 t |= LIS3L02DQ_REG_CTRL_1_AXES_X_ENABLE |
378 LIS3L02DQ_REG_CTRL_1_AXES_Y_ENABLE |
379 LIS3L02DQ_REG_CTRL_1_AXES_Z_ENABLE;
380
381 ret = lis3l02dq_spi_write_reg_8(indio_dev,
382 LIS3L02DQ_REG_CTRL_1_ADDR,
383 t);
384
385 error_ret:
386 return ret;
387 }
388
389 static const struct iio_buffer_setup_ops lis3l02dq_buffer_setup_ops = {
390 .preenable = &iio_sw_buffer_preenable,
391 .postenable = &lis3l02dq_buffer_postenable,
392 .predisable = &lis3l02dq_buffer_predisable,
393 };
394
lis3l02dq_configure_buffer(struct iio_dev * indio_dev)395 int lis3l02dq_configure_buffer(struct iio_dev *indio_dev)
396 {
397 int ret;
398 struct iio_buffer *buffer;
399
400 buffer = iio_kfifo_allocate(indio_dev);
401 if (!buffer)
402 return -ENOMEM;
403
404 indio_dev->buffer = buffer;
405
406 buffer->scan_timestamp = true;
407 indio_dev->setup_ops = &lis3l02dq_buffer_setup_ops;
408
409 /* Functions are NULL as we set handler below */
410 indio_dev->pollfunc = iio_alloc_pollfunc(&iio_pollfunc_store_time,
411 &lis3l02dq_trigger_handler,
412 0,
413 indio_dev,
414 "lis3l02dq_consumer%d",
415 indio_dev->id);
416
417 if (indio_dev->pollfunc == NULL) {
418 ret = -ENOMEM;
419 goto error_iio_sw_rb_free;
420 }
421
422 indio_dev->modes |= INDIO_BUFFER_TRIGGERED;
423 return 0;
424
425 error_iio_sw_rb_free:
426 iio_kfifo_free(indio_dev->buffer);
427 return ret;
428 }
429