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1 /*
2  * Freescale i.MX28 LRADC driver
3  *
4  * Copyright (c) 2012 DENX Software Engineering, GmbH.
5  * Marek Vasut <marex@denx.de>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  * GNU General Public License for more details.
16  */
17 
18 #include <linux/err.h>
19 #include <linux/interrupt.h>
20 #include <linux/device.h>
21 #include <linux/kernel.h>
22 #include <linux/slab.h>
23 #include <linux/of.h>
24 #include <linux/of_device.h>
25 #include <linux/sysfs.h>
26 #include <linux/list.h>
27 #include <linux/io.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/spinlock.h>
31 #include <linux/wait.h>
32 #include <linux/sched.h>
33 #include <linux/stmp_device.h>
34 #include <linux/bitops.h>
35 #include <linux/completion.h>
36 #include <linux/delay.h>
37 #include <linux/input.h>
38 
39 #include <linux/iio/iio.h>
40 #include <linux/iio/buffer.h>
41 #include <linux/iio/trigger.h>
42 #include <linux/iio/trigger_consumer.h>
43 #include <linux/iio/triggered_buffer.h>
44 
45 #define DRIVER_NAME		"mxs-lradc"
46 
47 #define LRADC_MAX_DELAY_CHANS	4
48 #define LRADC_MAX_MAPPED_CHANS	8
49 #define LRADC_MAX_TOTAL_CHANS	16
50 
51 #define LRADC_DELAY_TIMER_HZ	2000
52 
53 /*
54  * Make this runtime configurable if necessary. Currently, if the buffered mode
55  * is enabled, the LRADC takes LRADC_DELAY_TIMER_LOOP samples of data before
56  * triggering IRQ. The sampling happens every (LRADC_DELAY_TIMER_PER / 2000)
57  * seconds. The result is that the samples arrive every 500mS.
58  */
59 #define LRADC_DELAY_TIMER_PER	200
60 #define LRADC_DELAY_TIMER_LOOP	5
61 
62 /*
63  * Once the pen touches the touchscreen, the touchscreen switches from
64  * IRQ-driven mode to polling mode to prevent interrupt storm. The polling
65  * is realized by worker thread, which is called every 20 or so milliseconds.
66  * This gives the touchscreen enough fluence and does not strain the system
67  * too much.
68  */
69 #define LRADC_TS_SAMPLE_DELAY_MS	5
70 
71 /*
72  * The LRADC reads the following amount of samples from each touchscreen
73  * channel and the driver then computes avarage of these.
74  */
75 #define LRADC_TS_SAMPLE_AMOUNT		4
76 
77 enum mxs_lradc_id {
78 	IMX23_LRADC,
79 	IMX28_LRADC,
80 };
81 
82 static const char * const mx23_lradc_irq_names[] = {
83 	"mxs-lradc-touchscreen",
84 	"mxs-lradc-channel0",
85 	"mxs-lradc-channel1",
86 	"mxs-lradc-channel2",
87 	"mxs-lradc-channel3",
88 	"mxs-lradc-channel4",
89 	"mxs-lradc-channel5",
90 	"mxs-lradc-channel6",
91 	"mxs-lradc-channel7",
92 };
93 
94 static const char * const mx28_lradc_irq_names[] = {
95 	"mxs-lradc-touchscreen",
96 	"mxs-lradc-thresh0",
97 	"mxs-lradc-thresh1",
98 	"mxs-lradc-channel0",
99 	"mxs-lradc-channel1",
100 	"mxs-lradc-channel2",
101 	"mxs-lradc-channel3",
102 	"mxs-lradc-channel4",
103 	"mxs-lradc-channel5",
104 	"mxs-lradc-channel6",
105 	"mxs-lradc-channel7",
106 	"mxs-lradc-button0",
107 	"mxs-lradc-button1",
108 };
109 
110 struct mxs_lradc_of_config {
111 	const int		irq_count;
112 	const char * const	*irq_name;
113 };
114 
115 static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
116 	[IMX23_LRADC] = {
117 		.irq_count	= ARRAY_SIZE(mx23_lradc_irq_names),
118 		.irq_name	= mx23_lradc_irq_names,
119 	},
120 	[IMX28_LRADC] = {
121 		.irq_count	= ARRAY_SIZE(mx28_lradc_irq_names),
122 		.irq_name	= mx28_lradc_irq_names,
123 	},
124 };
125 
126 enum mxs_lradc_ts {
127 	MXS_LRADC_TOUCHSCREEN_NONE = 0,
128 	MXS_LRADC_TOUCHSCREEN_4WIRE,
129 	MXS_LRADC_TOUCHSCREEN_5WIRE,
130 };
131 
132 struct mxs_lradc {
133 	struct device		*dev;
134 	void __iomem		*base;
135 	int			irq[13];
136 
137 	uint32_t		*buffer;
138 	struct iio_trigger	*trig;
139 
140 	struct mutex		lock;
141 
142 	struct completion	completion;
143 
144 	/*
145 	 * Touchscreen LRADC channels receives a private slot in the CTRL4
146 	 * register, the slot #7. Therefore only 7 slots instead of 8 in the
147 	 * CTRL4 register can be mapped to LRADC channels when using the
148 	 * touchscreen.
149 	 *
150 	 * Furthermore, certain LRADC channels are shared between touchscreen
151 	 * and/or touch-buttons and generic LRADC block. Therefore when using
152 	 * either of these, these channels are not available for the regular
153 	 * sampling. The shared channels are as follows:
154 	 *
155 	 * CH0 -- Touch button #0
156 	 * CH1 -- Touch button #1
157 	 * CH2 -- Touch screen XPUL
158 	 * CH3 -- Touch screen YPLL
159 	 * CH4 -- Touch screen XNUL
160 	 * CH5 -- Touch screen YNLR
161 	 * CH6 -- Touch screen WIPER (5-wire only)
162 	 *
163 	 * The bitfields below represents which parts of the LRADC block are
164 	 * switched into special mode of operation. These channels can not
165 	 * be sampled as regular LRADC channels. The driver will refuse any
166 	 * attempt to sample these channels.
167 	 */
168 #define CHAN_MASK_TOUCHBUTTON		(0x3 << 0)
169 #define CHAN_MASK_TOUCHSCREEN_4WIRE	(0xf << 2)
170 #define CHAN_MASK_TOUCHSCREEN_5WIRE	(0x1f << 2)
171 	enum mxs_lradc_ts	use_touchscreen;
172 	bool			stop_touchscreen;
173 	bool			use_touchbutton;
174 
175 	struct input_dev	*ts_input;
176 	struct work_struct	ts_work;
177 };
178 
179 #define	LRADC_CTRL0				0x00
180 #define	LRADC_CTRL0_TOUCH_DETECT_ENABLE		(1 << 23)
181 #define	LRADC_CTRL0_TOUCH_SCREEN_TYPE		(1 << 22)
182 #define	LRADC_CTRL0_YNNSW	/* YM */	(1 << 21)
183 #define	LRADC_CTRL0_YPNSW	/* YP */	(1 << 20)
184 #define	LRADC_CTRL0_YPPSW	/* YP */	(1 << 19)
185 #define	LRADC_CTRL0_XNNSW	/* XM */	(1 << 18)
186 #define	LRADC_CTRL0_XNPSW	/* XM */	(1 << 17)
187 #define	LRADC_CTRL0_XPPSW	/* XP */	(1 << 16)
188 #define	LRADC_CTRL0_PLATE_MASK			(0x3f << 16)
189 
190 #define	LRADC_CTRL1				0x10
191 #define	LRADC_CTRL1_TOUCH_DETECT_IRQ_EN		(1 << 24)
192 #define	LRADC_CTRL1_LRADC_IRQ_EN(n)		(1 << ((n) + 16))
193 #define	LRADC_CTRL1_LRADC_IRQ_EN_MASK		(0x1fff << 16)
194 #define	LRADC_CTRL1_LRADC_IRQ_EN_OFFSET		16
195 #define	LRADC_CTRL1_TOUCH_DETECT_IRQ		(1 << 8)
196 #define	LRADC_CTRL1_LRADC_IRQ(n)		(1 << (n))
197 #define	LRADC_CTRL1_LRADC_IRQ_MASK		0x1fff
198 #define	LRADC_CTRL1_LRADC_IRQ_OFFSET		0
199 
200 #define	LRADC_CTRL2				0x20
201 #define	LRADC_CTRL2_TEMPSENSE_PWD		(1 << 15)
202 
203 #define	LRADC_STATUS				0x40
204 #define	LRADC_STATUS_TOUCH_DETECT_RAW		(1 << 0)
205 
206 #define	LRADC_CH(n)				(0x50 + (0x10 * (n)))
207 #define	LRADC_CH_ACCUMULATE			(1 << 29)
208 #define	LRADC_CH_NUM_SAMPLES_MASK		(0x1f << 24)
209 #define	LRADC_CH_NUM_SAMPLES_OFFSET		24
210 #define	LRADC_CH_VALUE_MASK			0x3ffff
211 #define	LRADC_CH_VALUE_OFFSET			0
212 
213 #define	LRADC_DELAY(n)				(0xd0 + (0x10 * (n)))
214 #define	LRADC_DELAY_TRIGGER_LRADCS_MASK		(0xff << 24)
215 #define	LRADC_DELAY_TRIGGER_LRADCS_OFFSET	24
216 #define	LRADC_DELAY_KICK			(1 << 20)
217 #define	LRADC_DELAY_TRIGGER_DELAYS_MASK		(0xf << 16)
218 #define	LRADC_DELAY_TRIGGER_DELAYS_OFFSET	16
219 #define	LRADC_DELAY_LOOP_COUNT_MASK		(0x1f << 11)
220 #define	LRADC_DELAY_LOOP_COUNT_OFFSET		11
221 #define	LRADC_DELAY_DELAY_MASK			0x7ff
222 #define	LRADC_DELAY_DELAY_OFFSET		0
223 
224 #define	LRADC_CTRL4				0x140
225 #define	LRADC_CTRL4_LRADCSELECT_MASK(n)		(0xf << ((n) * 4))
226 #define	LRADC_CTRL4_LRADCSELECT_OFFSET(n)	((n) * 4)
227 
228 /*
229  * Raw I/O operations
230  */
mxs_lradc_read_raw(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long m)231 static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
232 			const struct iio_chan_spec *chan,
233 			int *val, int *val2, long m)
234 {
235 	struct mxs_lradc *lradc = iio_priv(iio_dev);
236 	int ret;
237 	unsigned long mask;
238 
239 	if (m != IIO_CHAN_INFO_RAW)
240 		return -EINVAL;
241 
242 	/* Check for invalid channel */
243 	if (chan->channel > LRADC_MAX_TOTAL_CHANS)
244 		return -EINVAL;
245 
246 	/* Validate the channel if it doesn't intersect with reserved chans. */
247 	bitmap_set(&mask, chan->channel, 1);
248 	ret = iio_validate_scan_mask_onehot(iio_dev, &mask);
249 	if (ret)
250 		return -EINVAL;
251 
252 	/*
253 	 * See if there is no buffered operation in progess. If there is, simply
254 	 * bail out. This can be improved to support both buffered and raw IO at
255 	 * the same time, yet the code becomes horribly complicated. Therefore I
256 	 * applied KISS principle here.
257 	 */
258 	ret = mutex_trylock(&lradc->lock);
259 	if (!ret)
260 		return -EBUSY;
261 
262 	INIT_COMPLETION(lradc->completion);
263 
264 	/*
265 	 * No buffered operation in progress, map the channel and trigger it.
266 	 * Virtual channel 0 is always used here as the others are always not
267 	 * used if doing raw sampling.
268 	 */
269 	writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
270 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
271 	writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
272 
273 	/* Clean the slot's previous content, then set new one. */
274 	writel(LRADC_CTRL4_LRADCSELECT_MASK(0),
275 		lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
276 	writel(chan->channel, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
277 
278 	writel(0, lradc->base + LRADC_CH(0));
279 
280 	/* Enable the IRQ and start sampling the channel. */
281 	writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
282 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
283 	writel(1 << 0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
284 
285 	/* Wait for completion on the channel, 1 second max. */
286 	ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
287 	if (!ret)
288 		ret = -ETIMEDOUT;
289 	if (ret < 0)
290 		goto err;
291 
292 	/* Read the data. */
293 	*val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
294 	ret = IIO_VAL_INT;
295 
296 err:
297 	writel(LRADC_CTRL1_LRADC_IRQ_EN(0),
298 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
299 
300 	mutex_unlock(&lradc->lock);
301 
302 	return ret;
303 }
304 
305 static const struct iio_info mxs_lradc_iio_info = {
306 	.driver_module		= THIS_MODULE,
307 	.read_raw		= mxs_lradc_read_raw,
308 };
309 
310 /*
311  * Touchscreen handling
312  */
313 enum lradc_ts_plate {
314 	LRADC_SAMPLE_X,
315 	LRADC_SAMPLE_Y,
316 	LRADC_SAMPLE_PRESSURE,
317 };
318 
mxs_lradc_ts_touched(struct mxs_lradc * lradc)319 static int mxs_lradc_ts_touched(struct mxs_lradc *lradc)
320 {
321 	uint32_t reg;
322 
323 	/* Enable touch detection. */
324 	writel(LRADC_CTRL0_PLATE_MASK,
325 		lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
326 	writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
327 		lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
328 
329 	msleep(LRADC_TS_SAMPLE_DELAY_MS);
330 
331 	reg = readl(lradc->base + LRADC_STATUS);
332 
333 	return reg & LRADC_STATUS_TOUCH_DETECT_RAW;
334 }
335 
mxs_lradc_ts_sample(struct mxs_lradc * lradc,enum lradc_ts_plate plate,int change)336 static int32_t mxs_lradc_ts_sample(struct mxs_lradc *lradc,
337 				enum lradc_ts_plate plate, int change)
338 {
339 	unsigned long delay, jiff;
340 	uint32_t reg, ctrl0 = 0, chan = 0;
341 	/* The touchscreen always uses CTRL4 slot #7. */
342 	const uint8_t slot = 7;
343 	uint32_t val;
344 
345 	/*
346 	 * There are three correct configurations of the controller sampling
347 	 * the touchscreen, each of these configuration provides different
348 	 * information from the touchscreen.
349 	 *
350 	 * The following table describes the sampling configurations:
351 	 * +-------------+-------+-------+-------+
352 	 * | Wire \ Axis |   X   |   Y   |   Z   |
353 	 * +---------------------+-------+-------+
354 	 * |   X+ (CH2)  |   HI  |   TS  |   TS  |
355 	 * +-------------+-------+-------+-------+
356 	 * |   X- (CH4)  |   LO  |   SH  |   HI  |
357 	 * +-------------+-------+-------+-------+
358 	 * |   Y+ (CH3)  |   SH  |   HI  |   HI  |
359 	 * +-------------+-------+-------+-------+
360 	 * |   Y- (CH5)  |   TS  |   LO  |   SH  |
361 	 * +-------------+-------+-------+-------+
362 	 *
363 	 * HI ... strong '1'  ; LO ... strong '0'
364 	 * SH ... sample here ; TS ... tri-state
365 	 *
366 	 * There are a few other ways of obtaining the Z coordinate
367 	 * (aka. pressure), but the one in the table seems to be the
368 	 * most reliable one.
369 	 */
370 	switch (plate) {
371 	case LRADC_SAMPLE_X:
372 		ctrl0 = LRADC_CTRL0_XPPSW | LRADC_CTRL0_XNNSW;
373 		chan = 3;
374 		break;
375 	case LRADC_SAMPLE_Y:
376 		ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_YNNSW;
377 		chan = 4;
378 		break;
379 	case LRADC_SAMPLE_PRESSURE:
380 		ctrl0 = LRADC_CTRL0_YPPSW | LRADC_CTRL0_XNNSW;
381 		chan = 5;
382 		break;
383 	}
384 
385 	if (change) {
386 		writel(LRADC_CTRL0_PLATE_MASK,
387 			lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
388 		writel(ctrl0, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
389 
390 		writel(LRADC_CTRL4_LRADCSELECT_MASK(slot),
391 			lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
392 		writel(chan << LRADC_CTRL4_LRADCSELECT_OFFSET(slot),
393 			lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
394 	}
395 
396 	writel(0xffffffff, lradc->base + LRADC_CH(slot) + STMP_OFFSET_REG_CLR);
397 	writel(1 << slot, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
398 
399 	delay = jiffies + msecs_to_jiffies(LRADC_TS_SAMPLE_DELAY_MS);
400 	do {
401 		jiff = jiffies;
402 		reg = readl_relaxed(lradc->base + LRADC_CTRL1);
403 		if (reg & LRADC_CTRL1_LRADC_IRQ(slot))
404 			break;
405 	} while (time_before(jiff, delay));
406 
407 	writel(LRADC_CTRL1_LRADC_IRQ(slot),
408 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
409 
410 	if (time_after_eq(jiff, delay))
411 		return -ETIMEDOUT;
412 
413 	val = readl(lradc->base + LRADC_CH(slot));
414 	val &= LRADC_CH_VALUE_MASK;
415 
416 	return val;
417 }
418 
mxs_lradc_ts_sample_filter(struct mxs_lradc * lradc,enum lradc_ts_plate plate)419 static int32_t mxs_lradc_ts_sample_filter(struct mxs_lradc *lradc,
420 				enum lradc_ts_plate plate)
421 {
422 	int32_t val, tot = 0;
423 	int i;
424 
425 	val = mxs_lradc_ts_sample(lradc, plate, 1);
426 
427 	/* Delay a bit so the touchscreen is stable. */
428 	mdelay(2);
429 
430 	for (i = 0; i < LRADC_TS_SAMPLE_AMOUNT; i++) {
431 		val = mxs_lradc_ts_sample(lradc, plate, 0);
432 		tot += val;
433 	}
434 
435 	return tot / LRADC_TS_SAMPLE_AMOUNT;
436 }
437 
mxs_lradc_ts_work(struct work_struct * ts_work)438 static void mxs_lradc_ts_work(struct work_struct *ts_work)
439 {
440 	struct mxs_lradc *lradc = container_of(ts_work,
441 				struct mxs_lradc, ts_work);
442 	int val_x, val_y, val_p;
443 	bool valid = false;
444 
445 	while (mxs_lradc_ts_touched(lradc)) {
446 		/* Disable touch detector so we can sample the touchscreen. */
447 		writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
448 			lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
449 
450 		if (likely(valid)) {
451 			input_report_abs(lradc->ts_input, ABS_X, val_x);
452 			input_report_abs(lradc->ts_input, ABS_Y, val_y);
453 			input_report_abs(lradc->ts_input, ABS_PRESSURE, val_p);
454 			input_report_key(lradc->ts_input, BTN_TOUCH, 1);
455 			input_sync(lradc->ts_input);
456 		}
457 
458 		valid = false;
459 
460 		val_x = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_X);
461 		if (val_x < 0)
462 			continue;
463 		val_y = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_Y);
464 		if (val_y < 0)
465 			continue;
466 		val_p = mxs_lradc_ts_sample_filter(lradc, LRADC_SAMPLE_PRESSURE);
467 		if (val_p < 0)
468 			continue;
469 
470 		valid = true;
471 	}
472 
473 	input_report_abs(lradc->ts_input, ABS_PRESSURE, 0);
474 	input_report_key(lradc->ts_input, BTN_TOUCH, 0);
475 	input_sync(lradc->ts_input);
476 
477 	/* Do not restart the TS IRQ if the driver is shutting down. */
478 	if (lradc->stop_touchscreen)
479 		return;
480 
481 	/* Restart the touchscreen interrupts. */
482 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ,
483 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
484 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
485 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
486 }
487 
mxs_lradc_ts_open(struct input_dev * dev)488 static int mxs_lradc_ts_open(struct input_dev *dev)
489 {
490 	struct mxs_lradc *lradc = input_get_drvdata(dev);
491 
492 	/* The touchscreen is starting. */
493 	lradc->stop_touchscreen = false;
494 
495 	/* Enable the touch-detect circuitry. */
496 	writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
497 		lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
498 
499 	/* Enable the touch-detect IRQ. */
500 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
501 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
502 
503 	return 0;
504 }
505 
mxs_lradc_ts_close(struct input_dev * dev)506 static void mxs_lradc_ts_close(struct input_dev *dev)
507 {
508 	struct mxs_lradc *lradc = input_get_drvdata(dev);
509 
510 	/* Indicate the touchscreen is stopping. */
511 	lradc->stop_touchscreen = true;
512 	mb();
513 
514 	/* Wait until touchscreen thread finishes any possible remnants. */
515 	cancel_work_sync(&lradc->ts_work);
516 
517 	/* Disable touchscreen touch-detect IRQ. */
518 	writel(LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
519 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
520 
521 	/* Power-down touchscreen touch-detect circuitry. */
522 	writel(LRADC_CTRL0_TOUCH_DETECT_ENABLE,
523 		lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
524 }
525 
mxs_lradc_ts_register(struct mxs_lradc * lradc)526 static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
527 {
528 	struct input_dev *input;
529 	struct device *dev = lradc->dev;
530 	int ret;
531 
532 	if (!lradc->use_touchscreen)
533 		return 0;
534 
535 	input = input_allocate_device();
536 	if (!input) {
537 		dev_err(dev, "Failed to allocate TS device!\n");
538 		return -ENOMEM;
539 	}
540 
541 	input->name = DRIVER_NAME;
542 	input->id.bustype = BUS_HOST;
543 	input->dev.parent = dev;
544 	input->open = mxs_lradc_ts_open;
545 	input->close = mxs_lradc_ts_close;
546 
547 	__set_bit(EV_ABS, input->evbit);
548 	__set_bit(EV_KEY, input->evbit);
549 	__set_bit(BTN_TOUCH, input->keybit);
550 	input_set_abs_params(input, ABS_X, 0, LRADC_CH_VALUE_MASK, 0, 0);
551 	input_set_abs_params(input, ABS_Y, 0, LRADC_CH_VALUE_MASK, 0, 0);
552 	input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_CH_VALUE_MASK, 0, 0);
553 
554 	lradc->ts_input = input;
555 	input_set_drvdata(input, lradc);
556 	ret = input_register_device(input);
557 	if (ret)
558 		input_free_device(lradc->ts_input);
559 
560 	return ret;
561 }
562 
mxs_lradc_ts_unregister(struct mxs_lradc * lradc)563 static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
564 {
565 	if (!lradc->use_touchscreen)
566 		return;
567 
568 	cancel_work_sync(&lradc->ts_work);
569 
570 	input_unregister_device(lradc->ts_input);
571 }
572 
573 /*
574  * IRQ Handling
575  */
mxs_lradc_handle_irq(int irq,void * data)576 static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
577 {
578 	struct iio_dev *iio = data;
579 	struct mxs_lradc *lradc = iio_priv(iio);
580 	unsigned long reg = readl(lradc->base + LRADC_CTRL1);
581 	const uint32_t ts_irq_mask =
582 		LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
583 		LRADC_CTRL1_TOUCH_DETECT_IRQ;
584 
585 	if (!(reg & LRADC_CTRL1_LRADC_IRQ_MASK))
586 		return IRQ_NONE;
587 
588 	/*
589 	 * Touchscreen IRQ handling code has priority and therefore
590 	 * is placed here. In case touchscreen IRQ arrives, disable
591 	 * it ASAP
592 	 */
593 	if (reg & LRADC_CTRL1_TOUCH_DETECT_IRQ) {
594 		writel(ts_irq_mask,
595 			lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
596 		if (!lradc->stop_touchscreen)
597 			schedule_work(&lradc->ts_work);
598 	}
599 
600 	if (iio_buffer_enabled(iio))
601 		iio_trigger_poll(iio->trig, iio_get_time_ns());
602 	else if (reg & LRADC_CTRL1_LRADC_IRQ(0))
603 		complete(&lradc->completion);
604 
605 	writel(reg & LRADC_CTRL1_LRADC_IRQ_MASK,
606 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
607 
608 	return IRQ_HANDLED;
609 }
610 
611 /*
612  * Trigger handling
613  */
mxs_lradc_trigger_handler(int irq,void * p)614 static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
615 {
616 	struct iio_poll_func *pf = p;
617 	struct iio_dev *iio = pf->indio_dev;
618 	struct mxs_lradc *lradc = iio_priv(iio);
619 	const uint32_t chan_value = LRADC_CH_ACCUMULATE |
620 		((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
621 	unsigned int i, j = 0;
622 
623 	for_each_set_bit(i, iio->active_scan_mask, iio->masklength) {
624 		lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
625 		writel(chan_value, lradc->base + LRADC_CH(j));
626 		lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
627 		lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
628 		j++;
629 	}
630 
631 	if (iio->scan_timestamp) {
632 		s64 *timestamp = (s64 *)((u8 *)lradc->buffer +
633 					ALIGN(j, sizeof(s64)));
634 		*timestamp = pf->timestamp;
635 	}
636 
637 	iio_push_to_buffers(iio, (u8 *)lradc->buffer);
638 
639 	iio_trigger_notify_done(iio->trig);
640 
641 	return IRQ_HANDLED;
642 }
643 
mxs_lradc_configure_trigger(struct iio_trigger * trig,bool state)644 static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
645 {
646 	struct iio_dev *iio = iio_trigger_get_drvdata(trig);
647 	struct mxs_lradc *lradc = iio_priv(iio);
648 	const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
649 
650 	writel(LRADC_DELAY_KICK, lradc->base + LRADC_DELAY(0) + st);
651 
652 	return 0;
653 }
654 
655 static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
656 	.owner = THIS_MODULE,
657 	.set_trigger_state = &mxs_lradc_configure_trigger,
658 };
659 
mxs_lradc_trigger_init(struct iio_dev * iio)660 static int mxs_lradc_trigger_init(struct iio_dev *iio)
661 {
662 	int ret;
663 	struct iio_trigger *trig;
664 
665 	trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
666 	if (trig == NULL)
667 		return -ENOMEM;
668 
669 	trig->dev.parent = iio->dev.parent;
670 	iio_trigger_set_drvdata(trig, iio);
671 	trig->ops = &mxs_lradc_trigger_ops;
672 
673 	ret = iio_trigger_register(trig);
674 	if (ret) {
675 		iio_trigger_free(trig);
676 		return ret;
677 	}
678 
679 	iio->trig = trig;
680 
681 	return 0;
682 }
683 
mxs_lradc_trigger_remove(struct iio_dev * iio)684 static void mxs_lradc_trigger_remove(struct iio_dev *iio)
685 {
686 	iio_trigger_unregister(iio->trig);
687 	iio_trigger_free(iio->trig);
688 }
689 
mxs_lradc_buffer_preenable(struct iio_dev * iio)690 static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
691 {
692 	struct mxs_lradc *lradc = iio_priv(iio);
693 	int ret = 0, chan, ofs = 0;
694 	unsigned long enable = 0;
695 	uint32_t ctrl4_set = 0;
696 	uint32_t ctrl4_clr = 0;
697 	uint32_t ctrl1_irq = 0;
698 	const uint32_t chan_value = LRADC_CH_ACCUMULATE |
699 		((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
700 	const int len = bitmap_weight(iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS);
701 
702 	if (!len)
703 		return -EINVAL;
704 
705 	/*
706 	 * Lock the driver so raw access can not be done during buffered
707 	 * operation. This simplifies the code a lot.
708 	 */
709 	ret = mutex_trylock(&lradc->lock);
710 	if (!ret)
711 		return -EBUSY;
712 
713 	lradc->buffer = kmalloc(len * sizeof(*lradc->buffer), GFP_KERNEL);
714 	if (!lradc->buffer) {
715 		ret = -ENOMEM;
716 		goto err_mem;
717 	}
718 
719 	ret = iio_sw_buffer_preenable(iio);
720 	if (ret < 0)
721 		goto err_buf;
722 
723 	writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
724 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
725 	writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
726 
727 	for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
728 		ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
729 		ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
730 		ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
731 		writel(chan_value, lradc->base + LRADC_CH(ofs));
732 		bitmap_set(&enable, ofs, 1);
733 		ofs++;
734 	}
735 
736 	writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
737 		lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
738 
739 	writel(ctrl4_clr, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_CLR);
740 	writel(ctrl4_set, lradc->base + LRADC_CTRL4 + STMP_OFFSET_REG_SET);
741 
742 	writel(ctrl1_irq, lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_SET);
743 
744 	writel(enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
745 		lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_SET);
746 
747 	return 0;
748 
749 err_buf:
750 	kfree(lradc->buffer);
751 err_mem:
752 	mutex_unlock(&lradc->lock);
753 	return ret;
754 }
755 
mxs_lradc_buffer_postdisable(struct iio_dev * iio)756 static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
757 {
758 	struct mxs_lradc *lradc = iio_priv(iio);
759 
760 	writel(LRADC_DELAY_TRIGGER_LRADCS_MASK | LRADC_DELAY_KICK,
761 		lradc->base + LRADC_DELAY(0) + STMP_OFFSET_REG_CLR);
762 
763 	writel(0xff, lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
764 	writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
765 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
766 
767 	kfree(lradc->buffer);
768 	mutex_unlock(&lradc->lock);
769 
770 	return 0;
771 }
772 
mxs_lradc_validate_scan_mask(struct iio_dev * iio,const unsigned long * mask)773 static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
774 					const unsigned long *mask)
775 {
776 	struct mxs_lradc *lradc = iio_priv(iio);
777 	const int len = iio->masklength;
778 	const int map_chans = bitmap_weight(mask, len);
779 	int rsvd_chans = 0;
780 	unsigned long rsvd_mask = 0;
781 
782 	if (lradc->use_touchbutton)
783 		rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
784 	if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
785 		rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
786 	if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
787 		rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
788 
789 	if (lradc->use_touchbutton)
790 		rsvd_chans++;
791 	if (lradc->use_touchscreen)
792 		rsvd_chans++;
793 
794 	/* Test for attempts to map channels with special mode of operation. */
795 	if (bitmap_intersects(mask, &rsvd_mask, len))
796 		return false;
797 
798 	/* Test for attempts to map more channels then available slots. */
799 	if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
800 		return false;
801 
802 	return true;
803 }
804 
805 static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
806 	.preenable = &mxs_lradc_buffer_preenable,
807 	.postenable = &iio_triggered_buffer_postenable,
808 	.predisable = &iio_triggered_buffer_predisable,
809 	.postdisable = &mxs_lradc_buffer_postdisable,
810 	.validate_scan_mask = &mxs_lradc_validate_scan_mask,
811 };
812 
813 /*
814  * Driver initialization
815  */
816 
817 #define MXS_ADC_CHAN(idx, chan_type) {				\
818 	.type = (chan_type),					\
819 	.indexed = 1,						\
820 	.scan_index = (idx),					\
821 	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
822 	.channel = (idx),					\
823 	.scan_type = {						\
824 		.sign = 'u',					\
825 		.realbits = 18,					\
826 		.storagebits = 32,				\
827 	},							\
828 }
829 
830 static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
831 	MXS_ADC_CHAN(0, IIO_VOLTAGE),
832 	MXS_ADC_CHAN(1, IIO_VOLTAGE),
833 	MXS_ADC_CHAN(2, IIO_VOLTAGE),
834 	MXS_ADC_CHAN(3, IIO_VOLTAGE),
835 	MXS_ADC_CHAN(4, IIO_VOLTAGE),
836 	MXS_ADC_CHAN(5, IIO_VOLTAGE),
837 	MXS_ADC_CHAN(6, IIO_VOLTAGE),
838 	MXS_ADC_CHAN(7, IIO_VOLTAGE),	/* VBATT */
839 	MXS_ADC_CHAN(8, IIO_TEMP),	/* Temp sense 0 */
840 	MXS_ADC_CHAN(9, IIO_TEMP),	/* Temp sense 1 */
841 	MXS_ADC_CHAN(10, IIO_VOLTAGE),	/* VDDIO */
842 	MXS_ADC_CHAN(11, IIO_VOLTAGE),	/* VTH */
843 	MXS_ADC_CHAN(12, IIO_VOLTAGE),	/* VDDA */
844 	MXS_ADC_CHAN(13, IIO_VOLTAGE),	/* VDDD */
845 	MXS_ADC_CHAN(14, IIO_VOLTAGE),	/* VBG */
846 	MXS_ADC_CHAN(15, IIO_VOLTAGE),	/* VDD5V */
847 };
848 
mxs_lradc_hw_init(struct mxs_lradc * lradc)849 static void mxs_lradc_hw_init(struct mxs_lradc *lradc)
850 {
851 	/* The ADC always uses DELAY CHANNEL 0. */
852 	const uint32_t adc_cfg =
853 		(1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
854 		(LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
855 
856 	stmp_reset_block(lradc->base);
857 
858 	/* Configure DELAY CHANNEL 0 for generic ADC sampling. */
859 	writel(adc_cfg, lradc->base + LRADC_DELAY(0));
860 
861 	/* Disable remaining DELAY CHANNELs */
862 	writel(0, lradc->base + LRADC_DELAY(1));
863 	writel(0, lradc->base + LRADC_DELAY(2));
864 	writel(0, lradc->base + LRADC_DELAY(3));
865 
866 	/* Configure the touchscreen type */
867 	writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
868 		lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_CLR);
869 
870 	if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE) {
871 		writel(LRADC_CTRL0_TOUCH_SCREEN_TYPE,
872 			lradc->base + LRADC_CTRL0 + STMP_OFFSET_REG_SET);
873 	}
874 
875 	/* Start internal temperature sensing. */
876 	writel(0, lradc->base + LRADC_CTRL2);
877 }
878 
mxs_lradc_hw_stop(struct mxs_lradc * lradc)879 static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
880 {
881 	int i;
882 
883 	writel(LRADC_CTRL1_LRADC_IRQ_EN_MASK,
884 		lradc->base + LRADC_CTRL1 + STMP_OFFSET_REG_CLR);
885 
886 	for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
887 		writel(0, lradc->base + LRADC_DELAY(i));
888 }
889 
890 static const struct of_device_id mxs_lradc_dt_ids[] = {
891 	{ .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
892 	{ .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
893 	{ /* sentinel */ }
894 };
895 MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
896 
mxs_lradc_probe(struct platform_device * pdev)897 static int mxs_lradc_probe(struct platform_device *pdev)
898 {
899 	const struct of_device_id *of_id =
900 		of_match_device(mxs_lradc_dt_ids, &pdev->dev);
901 	const struct mxs_lradc_of_config *of_cfg =
902 		&mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
903 	struct device *dev = &pdev->dev;
904 	struct device_node *node = dev->of_node;
905 	struct mxs_lradc *lradc;
906 	struct iio_dev *iio;
907 	struct resource *iores;
908 	uint32_t ts_wires = 0;
909 	int ret = 0;
910 	int i;
911 
912 	/* Allocate the IIO device. */
913 	iio = iio_device_alloc(sizeof(*lradc));
914 	if (!iio) {
915 		dev_err(dev, "Failed to allocate IIO device\n");
916 		return -ENOMEM;
917 	}
918 
919 	lradc = iio_priv(iio);
920 
921 	/* Grab the memory area */
922 	iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
923 	lradc->dev = &pdev->dev;
924 	lradc->base = devm_ioremap_resource(dev, iores);
925 	if (IS_ERR(lradc->base)) {
926 		ret = PTR_ERR(lradc->base);
927 		goto err_addr;
928 	}
929 
930 	INIT_WORK(&lradc->ts_work, mxs_lradc_ts_work);
931 
932 	/* Check if touchscreen is enabled in DT. */
933 	ret = of_property_read_u32(node, "fsl,lradc-touchscreen-wires",
934 				&ts_wires);
935 	if (ret)
936 		dev_info(dev, "Touchscreen not enabled.\n");
937 	else if (ts_wires == 4)
938 		lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
939 	else if (ts_wires == 5)
940 		lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
941 	else
942 		dev_warn(dev, "Unsupported number of touchscreen wires (%d)\n",
943 				ts_wires);
944 
945 	/* Grab all IRQ sources */
946 	for (i = 0; i < of_cfg->irq_count; i++) {
947 		lradc->irq[i] = platform_get_irq(pdev, i);
948 		if (lradc->irq[i] < 0) {
949 			ret = -EINVAL;
950 			goto err_addr;
951 		}
952 
953 		ret = devm_request_irq(dev, lradc->irq[i],
954 					mxs_lradc_handle_irq, 0,
955 					of_cfg->irq_name[i], iio);
956 		if (ret)
957 			goto err_addr;
958 	}
959 
960 	platform_set_drvdata(pdev, iio);
961 
962 	init_completion(&lradc->completion);
963 	mutex_init(&lradc->lock);
964 
965 	iio->name = pdev->name;
966 	iio->dev.parent = &pdev->dev;
967 	iio->info = &mxs_lradc_iio_info;
968 	iio->modes = INDIO_DIRECT_MODE;
969 	iio->channels = mxs_lradc_chan_spec;
970 	iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
971 
972 	ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
973 				&mxs_lradc_trigger_handler,
974 				&mxs_lradc_buffer_ops);
975 	if (ret)
976 		goto err_addr;
977 
978 	ret = mxs_lradc_trigger_init(iio);
979 	if (ret)
980 		goto err_trig;
981 
982 	/* Configure the hardware. */
983 	mxs_lradc_hw_init(lradc);
984 
985 	/* Register the touchscreen input device. */
986 	ret = mxs_lradc_ts_register(lradc);
987 	if (ret)
988 		goto err_dev;
989 
990 	/* Register IIO device. */
991 	ret = iio_device_register(iio);
992 	if (ret) {
993 		dev_err(dev, "Failed to register IIO device\n");
994 		goto err_ts;
995 	}
996 
997 	return 0;
998 
999 err_ts:
1000 	mxs_lradc_ts_unregister(lradc);
1001 err_dev:
1002 	mxs_lradc_trigger_remove(iio);
1003 err_trig:
1004 	iio_triggered_buffer_cleanup(iio);
1005 err_addr:
1006 	iio_device_free(iio);
1007 	return ret;
1008 }
1009 
mxs_lradc_remove(struct platform_device * pdev)1010 static int mxs_lradc_remove(struct platform_device *pdev)
1011 {
1012 	struct iio_dev *iio = platform_get_drvdata(pdev);
1013 	struct mxs_lradc *lradc = iio_priv(iio);
1014 
1015 	mxs_lradc_ts_unregister(lradc);
1016 
1017 	mxs_lradc_hw_stop(lradc);
1018 
1019 	iio_device_unregister(iio);
1020 	iio_triggered_buffer_cleanup(iio);
1021 	mxs_lradc_trigger_remove(iio);
1022 	iio_device_free(iio);
1023 
1024 	return 0;
1025 }
1026 
1027 static struct platform_driver mxs_lradc_driver = {
1028 	.driver	= {
1029 		.name	= DRIVER_NAME,
1030 		.owner	= THIS_MODULE,
1031 		.of_match_table = mxs_lradc_dt_ids,
1032 	},
1033 	.probe	= mxs_lradc_probe,
1034 	.remove	= mxs_lradc_remove,
1035 };
1036 
1037 module_platform_driver(mxs_lradc_driver);
1038 
1039 MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1040 MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1041 MODULE_LICENSE("GPL v2");
1042