1 /*
2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/delay.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
20
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include "ad2s1210.h"
24
25 #define DRV_NAME "ad2s1210"
26
27 #define AD2S1210_DEF_CONTROL 0x7E
28
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
37
38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \
39 AD2S1210_SET_ENRES0)
40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
41
42 #define AD2S1210_REG_POSITION 0x80
43 #define AD2S1210_REG_VELOCITY 0x82
44 #define AD2S1210_REG_LOS_THRD 0x88
45 #define AD2S1210_REG_DOS_OVR_THRD 0x89
46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
51 #define AD2S1210_REG_EXCIT_FREQ 0x91
52 #define AD2S1210_REG_CONTROL 0x92
53 #define AD2S1210_REG_SOFT_RESET 0xF0
54 #define AD2S1210_REG_FAULT 0xFF
55
56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */
57 #define AD2S1210_SAA 3
58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES)
59
60 #define AD2S1210_MIN_CLKIN 6144000
61 #define AD2S1210_MAX_CLKIN 10240000
62 #define AD2S1210_MIN_EXCIT 2000
63 #define AD2S1210_MAX_EXCIT 20000
64 #define AD2S1210_MIN_FCW 0x4
65 #define AD2S1210_MAX_FCW 0x50
66
67 /* default input clock on serial interface */
68 #define AD2S1210_DEF_CLKIN 8192000
69 /* clock period in nano second */
70 #define AD2S1210_DEF_TCK (1000000000/AD2S1210_DEF_CLKIN)
71 #define AD2S1210_DEF_EXCIT 10000
72
73 enum ad2s1210_mode {
74 MOD_POS = 0,
75 MOD_VEL,
76 MOD_CONFIG,
77 MOD_RESERVED,
78 };
79
80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
81
82 struct ad2s1210_state {
83 const struct ad2s1210_platform_data *pdata;
84 struct mutex lock;
85 struct spi_device *sdev;
86 unsigned int fclkin;
87 unsigned int fexcit;
88 bool hysteresis;
89 bool old_data;
90 u8 resolution;
91 enum ad2s1210_mode mode;
92 u8 rx[2] ____cacheline_aligned;
93 u8 tx[2] ____cacheline_aligned;
94 };
95
96 static const int ad2s1210_mode_vals[4][2] = {
97 [MOD_POS] = { 0, 0 },
98 [MOD_VEL] = { 0, 1 },
99 [MOD_CONFIG] = { 1, 0 },
100 };
ad2s1210_set_mode(enum ad2s1210_mode mode,struct ad2s1210_state * st)101 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
102 struct ad2s1210_state *st)
103 {
104 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]);
105 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]);
106 st->mode = mode;
107 }
108
109 /* write 1 bytes (address or data) to the chip */
ad2s1210_config_write(struct ad2s1210_state * st,u8 data)110 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
111 {
112 int ret;
113
114 ad2s1210_set_mode(MOD_CONFIG, st);
115 st->tx[0] = data;
116 ret = spi_write(st->sdev, st->tx, 1);
117 if (ret < 0)
118 return ret;
119 st->old_data = true;
120
121 return 0;
122 }
123
124 /* read value from one of the registers */
ad2s1210_config_read(struct ad2s1210_state * st,unsigned char address)125 static int ad2s1210_config_read(struct ad2s1210_state *st,
126 unsigned char address)
127 {
128 struct spi_transfer xfer = {
129 .len = 2,
130 .rx_buf = st->rx,
131 .tx_buf = st->tx,
132 };
133 int ret = 0;
134
135 ad2s1210_set_mode(MOD_CONFIG, st);
136 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
137 st->tx[1] = AD2S1210_REG_FAULT;
138 ret = spi_sync_transfer(st->sdev, &xfer, 1);
139 if (ret < 0)
140 return ret;
141 st->old_data = true;
142
143 return st->rx[1];
144 }
145
146 static inline
ad2s1210_update_frequency_control_word(struct ad2s1210_state * st)147 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
148 {
149 int ret;
150 unsigned char fcw;
151
152 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
153 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
154 pr_err("ad2s1210: FCW out of range\n");
155 return -ERANGE;
156 }
157
158 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
159 if (ret < 0)
160 return ret;
161
162 return ad2s1210_config_write(st, fcw);
163 }
164
ad2s1210_read_resolution_pin(struct ad2s1210_state * st)165 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st)
166 {
167 return ad2s1210_resolution_value[
168 (gpio_get_value(st->pdata->res[0]) << 1) |
169 gpio_get_value(st->pdata->res[1])];
170 }
171
172 static const int ad2s1210_res_pins[4][2] = {
173 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
174 };
175
ad2s1210_set_resolution_pin(struct ad2s1210_state * st)176 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
177 {
178 gpio_set_value(st->pdata->res[0],
179 ad2s1210_res_pins[(st->resolution - 10)/2][0]);
180 gpio_set_value(st->pdata->res[1],
181 ad2s1210_res_pins[(st->resolution - 10)/2][1]);
182 }
183
ad2s1210_soft_reset(struct ad2s1210_state * st)184 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
185 {
186 int ret;
187
188 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
189 if (ret < 0)
190 return ret;
191
192 return ad2s1210_config_write(st, 0x0);
193 }
194
ad2s1210_store_softreset(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)195 static ssize_t ad2s1210_store_softreset(struct device *dev,
196 struct device_attribute *attr,
197 const char *buf,
198 size_t len)
199 {
200 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
201 int ret;
202
203 mutex_lock(&st->lock);
204 ret = ad2s1210_soft_reset(st);
205 mutex_unlock(&st->lock);
206
207 return ret < 0 ? ret : len;
208 }
209
ad2s1210_show_fclkin(struct device * dev,struct device_attribute * attr,char * buf)210 static ssize_t ad2s1210_show_fclkin(struct device *dev,
211 struct device_attribute *attr,
212 char *buf)
213 {
214 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
215 return sprintf(buf, "%d\n", st->fclkin);
216 }
217
ad2s1210_store_fclkin(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)218 static ssize_t ad2s1210_store_fclkin(struct device *dev,
219 struct device_attribute *attr,
220 const char *buf,
221 size_t len)
222 {
223 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
224 unsigned long fclkin;
225 int ret;
226
227 ret = strict_strtoul(buf, 10, &fclkin);
228 if (ret)
229 return ret;
230 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
231 pr_err("ad2s1210: fclkin out of range\n");
232 return -EINVAL;
233 }
234
235 mutex_lock(&st->lock);
236 st->fclkin = fclkin;
237
238 ret = ad2s1210_update_frequency_control_word(st);
239 if (ret < 0)
240 goto error_ret;
241 ret = ad2s1210_soft_reset(st);
242 error_ret:
243 mutex_unlock(&st->lock);
244
245 return ret < 0 ? ret : len;
246 }
247
ad2s1210_show_fexcit(struct device * dev,struct device_attribute * attr,char * buf)248 static ssize_t ad2s1210_show_fexcit(struct device *dev,
249 struct device_attribute *attr,
250 char *buf)
251 {
252 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
253 return sprintf(buf, "%d\n", st->fexcit);
254 }
255
ad2s1210_store_fexcit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)256 static ssize_t ad2s1210_store_fexcit(struct device *dev,
257 struct device_attribute *attr,
258 const char *buf, size_t len)
259 {
260 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
261 unsigned long fexcit;
262 int ret;
263
264 ret = strict_strtoul(buf, 10, &fexcit);
265 if (ret < 0)
266 return ret;
267 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
268 pr_err("ad2s1210: excitation frequency out of range\n");
269 return -EINVAL;
270 }
271 mutex_lock(&st->lock);
272 st->fexcit = fexcit;
273 ret = ad2s1210_update_frequency_control_word(st);
274 if (ret < 0)
275 goto error_ret;
276 ret = ad2s1210_soft_reset(st);
277 error_ret:
278 mutex_unlock(&st->lock);
279
280 return ret < 0 ? ret : len;
281 }
282
ad2s1210_show_control(struct device * dev,struct device_attribute * attr,char * buf)283 static ssize_t ad2s1210_show_control(struct device *dev,
284 struct device_attribute *attr,
285 char *buf)
286 {
287 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
288 int ret;
289 mutex_lock(&st->lock);
290 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
291 mutex_unlock(&st->lock);
292 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
293 }
294
ad2s1210_store_control(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)295 static ssize_t ad2s1210_store_control(struct device *dev,
296 struct device_attribute *attr,
297 const char *buf, size_t len)
298 {
299 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
300 unsigned long udata;
301 unsigned char data;
302 int ret;
303
304 ret = strict_strtoul(buf, 16, &udata);
305 if (ret)
306 return -EINVAL;
307
308 mutex_lock(&st->lock);
309 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
310 if (ret < 0)
311 goto error_ret;
312 data = udata & AD2S1210_MSB_IS_LOW;
313 ret = ad2s1210_config_write(st, data);
314 if (ret < 0)
315 goto error_ret;
316
317 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
318 if (ret < 0)
319 goto error_ret;
320 if (ret & AD2S1210_MSB_IS_HIGH) {
321 ret = -EIO;
322 pr_err("ad2s1210: write control register fail\n");
323 goto error_ret;
324 }
325 st->resolution
326 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
327 if (st->pdata->gpioin) {
328 data = ad2s1210_read_resolution_pin(st);
329 if (data != st->resolution)
330 pr_warning("ad2s1210: resolution settings not match\n");
331 } else
332 ad2s1210_set_resolution_pin(st);
333
334 ret = len;
335 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
336
337 error_ret:
338 mutex_unlock(&st->lock);
339 return ret;
340 }
341
ad2s1210_show_resolution(struct device * dev,struct device_attribute * attr,char * buf)342 static ssize_t ad2s1210_show_resolution(struct device *dev,
343 struct device_attribute *attr, char *buf)
344 {
345 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
346 return sprintf(buf, "%d\n", st->resolution);
347 }
348
ad2s1210_store_resolution(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)349 static ssize_t ad2s1210_store_resolution(struct device *dev,
350 struct device_attribute *attr,
351 const char *buf, size_t len)
352 {
353 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
354 unsigned char data;
355 unsigned long udata;
356 int ret;
357
358 ret = strict_strtoul(buf, 10, &udata);
359 if (ret || udata < 10 || udata > 16) {
360 pr_err("ad2s1210: resolution out of range\n");
361 return -EINVAL;
362 }
363 mutex_lock(&st->lock);
364 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
365 if (ret < 0)
366 goto error_ret;
367 data = ret;
368 data &= ~AD2S1210_SET_RESOLUTION;
369 data |= (udata - 10) >> 1;
370 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
371 if (ret < 0)
372 goto error_ret;
373 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
374 if (ret < 0)
375 goto error_ret;
376 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
377 if (ret < 0)
378 goto error_ret;
379 data = ret;
380 if (data & AD2S1210_MSB_IS_HIGH) {
381 ret = -EIO;
382 pr_err("ad2s1210: setting resolution fail\n");
383 goto error_ret;
384 }
385 st->resolution
386 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
387 if (st->pdata->gpioin) {
388 data = ad2s1210_read_resolution_pin(st);
389 if (data != st->resolution)
390 pr_warning("ad2s1210: resolution settings not match\n");
391 } else
392 ad2s1210_set_resolution_pin(st);
393 ret = len;
394 error_ret:
395 mutex_unlock(&st->lock);
396 return ret;
397 }
398
399 /* read the fault register since last sample */
ad2s1210_show_fault(struct device * dev,struct device_attribute * attr,char * buf)400 static ssize_t ad2s1210_show_fault(struct device *dev,
401 struct device_attribute *attr, char *buf)
402 {
403 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
404 int ret;
405
406 mutex_lock(&st->lock);
407 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
408 mutex_unlock(&st->lock);
409
410 return ret ? ret : sprintf(buf, "0x%x\n", ret);
411 }
412
ad2s1210_clear_fault(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)413 static ssize_t ad2s1210_clear_fault(struct device *dev,
414 struct device_attribute *attr,
415 const char *buf,
416 size_t len)
417 {
418 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
419 int ret;
420
421 mutex_lock(&st->lock);
422 gpio_set_value(st->pdata->sample, 0);
423 /* delay (2 * tck + 20) nano seconds */
424 udelay(1);
425 gpio_set_value(st->pdata->sample, 1);
426 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
427 if (ret < 0)
428 goto error_ret;
429 gpio_set_value(st->pdata->sample, 0);
430 gpio_set_value(st->pdata->sample, 1);
431 error_ret:
432 mutex_unlock(&st->lock);
433
434 return ret < 0 ? ret : len;
435 }
436
ad2s1210_show_reg(struct device * dev,struct device_attribute * attr,char * buf)437 static ssize_t ad2s1210_show_reg(struct device *dev,
438 struct device_attribute *attr,
439 char *buf)
440 {
441 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
442 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
443 int ret;
444
445 mutex_lock(&st->lock);
446 ret = ad2s1210_config_read(st, iattr->address);
447 mutex_unlock(&st->lock);
448
449 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
450 }
451
ad2s1210_store_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)452 static ssize_t ad2s1210_store_reg(struct device *dev,
453 struct device_attribute *attr, const char *buf, size_t len)
454 {
455 struct ad2s1210_state *st = iio_priv(dev_to_iio_dev(dev));
456 unsigned long data;
457 int ret;
458 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
459
460 ret = strict_strtoul(buf, 10, &data);
461 if (ret)
462 return -EINVAL;
463 mutex_lock(&st->lock);
464 ret = ad2s1210_config_write(st, iattr->address);
465 if (ret < 0)
466 goto error_ret;
467 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
468 error_ret:
469 mutex_unlock(&st->lock);
470 return ret < 0 ? ret : len;
471 }
472
ad2s1210_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)473 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
474 struct iio_chan_spec const *chan,
475 int *val,
476 int *val2,
477 long m)
478 {
479 struct ad2s1210_state *st = iio_priv(indio_dev);
480 bool negative;
481 int ret = 0;
482 u16 pos;
483 s16 vel;
484
485 mutex_lock(&st->lock);
486 gpio_set_value(st->pdata->sample, 0);
487 /* delay (6 * tck + 20) nano seconds */
488 udelay(1);
489
490 switch (chan->type) {
491 case IIO_ANGL:
492 ad2s1210_set_mode(MOD_POS, st);
493 break;
494 case IIO_ANGL_VEL:
495 ad2s1210_set_mode(MOD_VEL, st);
496 break;
497 default:
498 ret = -EINVAL;
499 break;
500 }
501 if (ret < 0)
502 goto error_ret;
503 ret = spi_read(st->sdev, st->rx, 2);
504 if (ret < 0)
505 goto error_ret;
506
507 switch (chan->type) {
508 case IIO_ANGL:
509 pos = be16_to_cpup((u16 *)st->rx);
510 if (st->hysteresis)
511 pos >>= 16 - st->resolution;
512 *val = pos;
513 ret = IIO_VAL_INT;
514 break;
515 case IIO_ANGL_VEL:
516 negative = st->rx[0] & 0x80;
517 vel = be16_to_cpup((s16 *)st->rx);
518 vel >>= 16 - st->resolution;
519 if (vel & 0x8000) {
520 negative = (0xffff >> st->resolution) << st->resolution;
521 vel |= negative;
522 }
523 *val = vel;
524 ret = IIO_VAL_INT;
525 break;
526 default:
527 mutex_unlock(&st->lock);
528 return -EINVAL;
529 }
530
531 error_ret:
532 gpio_set_value(st->pdata->sample, 1);
533 /* delay (2 * tck + 20) nano seconds */
534 udelay(1);
535 mutex_unlock(&st->lock);
536 return ret;
537 }
538
539 static IIO_DEVICE_ATTR(reset, S_IWUSR,
540 NULL, ad2s1210_store_softreset, 0);
541 static IIO_DEVICE_ATTR(fclkin, S_IRUGO | S_IWUSR,
542 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
543 static IIO_DEVICE_ATTR(fexcit, S_IRUGO | S_IWUSR,
544 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
545 static IIO_DEVICE_ATTR(control, S_IRUGO | S_IWUSR,
546 ad2s1210_show_control, ad2s1210_store_control, 0);
547 static IIO_DEVICE_ATTR(bits, S_IRUGO | S_IWUSR,
548 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
549 static IIO_DEVICE_ATTR(fault, S_IRUGO | S_IWUSR,
550 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
551
552 static IIO_DEVICE_ATTR(los_thrd, S_IRUGO | S_IWUSR,
553 ad2s1210_show_reg, ad2s1210_store_reg,
554 AD2S1210_REG_LOS_THRD);
555 static IIO_DEVICE_ATTR(dos_ovr_thrd, S_IRUGO | S_IWUSR,
556 ad2s1210_show_reg, ad2s1210_store_reg,
557 AD2S1210_REG_DOS_OVR_THRD);
558 static IIO_DEVICE_ATTR(dos_mis_thrd, S_IRUGO | S_IWUSR,
559 ad2s1210_show_reg, ad2s1210_store_reg,
560 AD2S1210_REG_DOS_MIS_THRD);
561 static IIO_DEVICE_ATTR(dos_rst_max_thrd, S_IRUGO | S_IWUSR,
562 ad2s1210_show_reg, ad2s1210_store_reg,
563 AD2S1210_REG_DOS_RST_MAX_THRD);
564 static IIO_DEVICE_ATTR(dos_rst_min_thrd, S_IRUGO | S_IWUSR,
565 ad2s1210_show_reg, ad2s1210_store_reg,
566 AD2S1210_REG_DOS_RST_MIN_THRD);
567 static IIO_DEVICE_ATTR(lot_high_thrd, S_IRUGO | S_IWUSR,
568 ad2s1210_show_reg, ad2s1210_store_reg,
569 AD2S1210_REG_LOT_HIGH_THRD);
570 static IIO_DEVICE_ATTR(lot_low_thrd, S_IRUGO | S_IWUSR,
571 ad2s1210_show_reg, ad2s1210_store_reg,
572 AD2S1210_REG_LOT_LOW_THRD);
573
574
575 static const struct iio_chan_spec ad2s1210_channels[] = {
576 {
577 .type = IIO_ANGL,
578 .indexed = 1,
579 .channel = 0,
580 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
581 }, {
582 .type = IIO_ANGL_VEL,
583 .indexed = 1,
584 .channel = 0,
585 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
586 }
587 };
588
589 static struct attribute *ad2s1210_attributes[] = {
590 &iio_dev_attr_reset.dev_attr.attr,
591 &iio_dev_attr_fclkin.dev_attr.attr,
592 &iio_dev_attr_fexcit.dev_attr.attr,
593 &iio_dev_attr_control.dev_attr.attr,
594 &iio_dev_attr_bits.dev_attr.attr,
595 &iio_dev_attr_fault.dev_attr.attr,
596 &iio_dev_attr_los_thrd.dev_attr.attr,
597 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
598 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
599 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
600 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
601 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
602 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
603 NULL,
604 };
605
606 static const struct attribute_group ad2s1210_attribute_group = {
607 .attrs = ad2s1210_attributes,
608 };
609
ad2s1210_initial(struct ad2s1210_state * st)610 static int ad2s1210_initial(struct ad2s1210_state *st)
611 {
612 unsigned char data;
613 int ret;
614
615 mutex_lock(&st->lock);
616 if (st->pdata->gpioin)
617 st->resolution = ad2s1210_read_resolution_pin(st);
618 else
619 ad2s1210_set_resolution_pin(st);
620
621 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
622 if (ret < 0)
623 goto error_ret;
624 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
625 data |= (st->resolution - 10) >> 1;
626 ret = ad2s1210_config_write(st, data);
627 if (ret < 0)
628 goto error_ret;
629 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
630 if (ret < 0)
631 goto error_ret;
632
633 if (ret & AD2S1210_MSB_IS_HIGH) {
634 ret = -EIO;
635 goto error_ret;
636 }
637
638 ret = ad2s1210_update_frequency_control_word(st);
639 if (ret < 0)
640 goto error_ret;
641 ret = ad2s1210_soft_reset(st);
642 error_ret:
643 mutex_unlock(&st->lock);
644 return ret;
645 }
646
647 static const struct iio_info ad2s1210_info = {
648 .read_raw = &ad2s1210_read_raw,
649 .attrs = &ad2s1210_attribute_group,
650 .driver_module = THIS_MODULE,
651 };
652
ad2s1210_setup_gpios(struct ad2s1210_state * st)653 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
654 {
655 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
656 struct gpio ad2s1210_gpios[] = {
657 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
658 { st->pdata->a[0], flags, "a0" },
659 { st->pdata->a[1], flags, "a1" },
660 { st->pdata->res[0], flags, "res0" },
661 { st->pdata->res[0], flags, "res1" },
662 };
663
664 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
665 }
666
ad2s1210_free_gpios(struct ad2s1210_state * st)667 static void ad2s1210_free_gpios(struct ad2s1210_state *st)
668 {
669 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
670 struct gpio ad2s1210_gpios[] = {
671 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
672 { st->pdata->a[0], flags, "a0" },
673 { st->pdata->a[1], flags, "a1" },
674 { st->pdata->res[0], flags, "res0" },
675 { st->pdata->res[0], flags, "res1" },
676 };
677
678 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
679 }
680
ad2s1210_probe(struct spi_device * spi)681 static int ad2s1210_probe(struct spi_device *spi)
682 {
683 struct iio_dev *indio_dev;
684 struct ad2s1210_state *st;
685 int ret;
686
687 if (spi->dev.platform_data == NULL)
688 return -EINVAL;
689
690 indio_dev = iio_device_alloc(sizeof(*st));
691 if (indio_dev == NULL) {
692 ret = -ENOMEM;
693 goto error_ret;
694 }
695 st = iio_priv(indio_dev);
696 st->pdata = spi->dev.platform_data;
697 ret = ad2s1210_setup_gpios(st);
698 if (ret < 0)
699 goto error_free_dev;
700
701 spi_set_drvdata(spi, indio_dev);
702
703 mutex_init(&st->lock);
704 st->sdev = spi;
705 st->hysteresis = true;
706 st->mode = MOD_CONFIG;
707 st->resolution = 12;
708 st->fexcit = AD2S1210_DEF_EXCIT;
709
710 indio_dev->dev.parent = &spi->dev;
711 indio_dev->info = &ad2s1210_info;
712 indio_dev->modes = INDIO_DIRECT_MODE;
713 indio_dev->channels = ad2s1210_channels;
714 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
715 indio_dev->name = spi_get_device_id(spi)->name;
716
717 ret = iio_device_register(indio_dev);
718 if (ret)
719 goto error_free_gpios;
720
721 st->fclkin = spi->max_speed_hz;
722 spi->mode = SPI_MODE_3;
723 spi_setup(spi);
724 ad2s1210_initial(st);
725
726 return 0;
727
728 error_free_gpios:
729 ad2s1210_free_gpios(st);
730 error_free_dev:
731 iio_device_free(indio_dev);
732 error_ret:
733 return ret;
734 }
735
ad2s1210_remove(struct spi_device * spi)736 static int ad2s1210_remove(struct spi_device *spi)
737 {
738 struct iio_dev *indio_dev = spi_get_drvdata(spi);
739
740 iio_device_unregister(indio_dev);
741 ad2s1210_free_gpios(iio_priv(indio_dev));
742 iio_device_free(indio_dev);
743
744 return 0;
745 }
746
747 static const struct spi_device_id ad2s1210_id[] = {
748 { "ad2s1210" },
749 {}
750 };
751 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
752
753 static struct spi_driver ad2s1210_driver = {
754 .driver = {
755 .name = DRV_NAME,
756 .owner = THIS_MODULE,
757 },
758 .probe = ad2s1210_probe,
759 .remove = ad2s1210_remove,
760 .id_table = ad2s1210_id,
761 };
762 module_spi_driver(ad2s1210_driver);
763
764 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
765 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
766 MODULE_LICENSE("GPL v2");
767