1 /*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/slab.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/list.h>
19 #include <linux/platform_device.h>
20 #include <linux/usb/ch9.h>
21 #include <linux/usb/gadget.h>
22 #include <linux/usb/atmel_usba_udc.h>
23 #include <linux/delay.h>
24 #include <linux/platform_data/atmel.h>
25
26 #include <asm/gpio.h>
27
28 #include "atmel_usba_udc.h"
29
30
31 static struct usba_udc the_udc;
32 static struct usba_ep *usba_ep;
33
34 #ifdef CONFIG_USB_GADGET_DEBUG_FS
35 #include <linux/debugfs.h>
36 #include <linux/uaccess.h>
37
queue_dbg_open(struct inode * inode,struct file * file)38 static int queue_dbg_open(struct inode *inode, struct file *file)
39 {
40 struct usba_ep *ep = inode->i_private;
41 struct usba_request *req, *req_copy;
42 struct list_head *queue_data;
43
44 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
45 if (!queue_data)
46 return -ENOMEM;
47 INIT_LIST_HEAD(queue_data);
48
49 spin_lock_irq(&ep->udc->lock);
50 list_for_each_entry(req, &ep->queue, queue) {
51 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
52 if (!req_copy)
53 goto fail;
54 list_add_tail(&req_copy->queue, queue_data);
55 }
56 spin_unlock_irq(&ep->udc->lock);
57
58 file->private_data = queue_data;
59 return 0;
60
61 fail:
62 spin_unlock_irq(&ep->udc->lock);
63 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
64 list_del(&req->queue);
65 kfree(req);
66 }
67 kfree(queue_data);
68 return -ENOMEM;
69 }
70
71 /*
72 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
73 *
74 * b: buffer address
75 * l: buffer length
76 * I/i: interrupt/no interrupt
77 * Z/z: zero/no zero
78 * S/s: short ok/short not ok
79 * s: status
80 * n: nr_packets
81 * F/f: submitted/not submitted to FIFO
82 * D/d: using/not using DMA
83 * L/l: last transaction/not last transaction
84 */
queue_dbg_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)85 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
86 size_t nbytes, loff_t *ppos)
87 {
88 struct list_head *queue = file->private_data;
89 struct usba_request *req, *tmp_req;
90 size_t len, remaining, actual = 0;
91 char tmpbuf[38];
92
93 if (!access_ok(VERIFY_WRITE, buf, nbytes))
94 return -EFAULT;
95
96 mutex_lock(&file_inode(file)->i_mutex);
97 list_for_each_entry_safe(req, tmp_req, queue, queue) {
98 len = snprintf(tmpbuf, sizeof(tmpbuf),
99 "%8p %08x %c%c%c %5d %c%c%c\n",
100 req->req.buf, req->req.length,
101 req->req.no_interrupt ? 'i' : 'I',
102 req->req.zero ? 'Z' : 'z',
103 req->req.short_not_ok ? 's' : 'S',
104 req->req.status,
105 req->submitted ? 'F' : 'f',
106 req->using_dma ? 'D' : 'd',
107 req->last_transaction ? 'L' : 'l');
108 len = min(len, sizeof(tmpbuf));
109 if (len > nbytes)
110 break;
111
112 list_del(&req->queue);
113 kfree(req);
114
115 remaining = __copy_to_user(buf, tmpbuf, len);
116 actual += len - remaining;
117 if (remaining)
118 break;
119
120 nbytes -= len;
121 buf += len;
122 }
123 mutex_unlock(&file_inode(file)->i_mutex);
124
125 return actual;
126 }
127
queue_dbg_release(struct inode * inode,struct file * file)128 static int queue_dbg_release(struct inode *inode, struct file *file)
129 {
130 struct list_head *queue_data = file->private_data;
131 struct usba_request *req, *tmp_req;
132
133 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
134 list_del(&req->queue);
135 kfree(req);
136 }
137 kfree(queue_data);
138 return 0;
139 }
140
regs_dbg_open(struct inode * inode,struct file * file)141 static int regs_dbg_open(struct inode *inode, struct file *file)
142 {
143 struct usba_udc *udc;
144 unsigned int i;
145 u32 *data;
146 int ret = -ENOMEM;
147
148 mutex_lock(&inode->i_mutex);
149 udc = inode->i_private;
150 data = kmalloc(inode->i_size, GFP_KERNEL);
151 if (!data)
152 goto out;
153
154 spin_lock_irq(&udc->lock);
155 for (i = 0; i < inode->i_size / 4; i++)
156 data[i] = __raw_readl(udc->regs + i * 4);
157 spin_unlock_irq(&udc->lock);
158
159 file->private_data = data;
160 ret = 0;
161
162 out:
163 mutex_unlock(&inode->i_mutex);
164
165 return ret;
166 }
167
regs_dbg_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)168 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
169 size_t nbytes, loff_t *ppos)
170 {
171 struct inode *inode = file_inode(file);
172 int ret;
173
174 mutex_lock(&inode->i_mutex);
175 ret = simple_read_from_buffer(buf, nbytes, ppos,
176 file->private_data,
177 file_inode(file)->i_size);
178 mutex_unlock(&inode->i_mutex);
179
180 return ret;
181 }
182
regs_dbg_release(struct inode * inode,struct file * file)183 static int regs_dbg_release(struct inode *inode, struct file *file)
184 {
185 kfree(file->private_data);
186 return 0;
187 }
188
189 const struct file_operations queue_dbg_fops = {
190 .owner = THIS_MODULE,
191 .open = queue_dbg_open,
192 .llseek = no_llseek,
193 .read = queue_dbg_read,
194 .release = queue_dbg_release,
195 };
196
197 const struct file_operations regs_dbg_fops = {
198 .owner = THIS_MODULE,
199 .open = regs_dbg_open,
200 .llseek = generic_file_llseek,
201 .read = regs_dbg_read,
202 .release = regs_dbg_release,
203 };
204
usba_ep_init_debugfs(struct usba_udc * udc,struct usba_ep * ep)205 static void usba_ep_init_debugfs(struct usba_udc *udc,
206 struct usba_ep *ep)
207 {
208 struct dentry *ep_root;
209
210 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
211 if (!ep_root)
212 goto err_root;
213 ep->debugfs_dir = ep_root;
214
215 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
216 ep, &queue_dbg_fops);
217 if (!ep->debugfs_queue)
218 goto err_queue;
219
220 if (ep->can_dma) {
221 ep->debugfs_dma_status
222 = debugfs_create_u32("dma_status", 0400, ep_root,
223 &ep->last_dma_status);
224 if (!ep->debugfs_dma_status)
225 goto err_dma_status;
226 }
227 if (ep_is_control(ep)) {
228 ep->debugfs_state
229 = debugfs_create_u32("state", 0400, ep_root,
230 &ep->state);
231 if (!ep->debugfs_state)
232 goto err_state;
233 }
234
235 return;
236
237 err_state:
238 if (ep->can_dma)
239 debugfs_remove(ep->debugfs_dma_status);
240 err_dma_status:
241 debugfs_remove(ep->debugfs_queue);
242 err_queue:
243 debugfs_remove(ep_root);
244 err_root:
245 dev_err(&ep->udc->pdev->dev,
246 "failed to create debugfs directory for %s\n", ep->ep.name);
247 }
248
usba_ep_cleanup_debugfs(struct usba_ep * ep)249 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
250 {
251 debugfs_remove(ep->debugfs_queue);
252 debugfs_remove(ep->debugfs_dma_status);
253 debugfs_remove(ep->debugfs_state);
254 debugfs_remove(ep->debugfs_dir);
255 ep->debugfs_dma_status = NULL;
256 ep->debugfs_dir = NULL;
257 }
258
usba_init_debugfs(struct usba_udc * udc)259 static void usba_init_debugfs(struct usba_udc *udc)
260 {
261 struct dentry *root, *regs;
262 struct resource *regs_resource;
263
264 root = debugfs_create_dir(udc->gadget.name, NULL);
265 if (IS_ERR(root) || !root)
266 goto err_root;
267 udc->debugfs_root = root;
268
269 regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops);
270 if (!regs)
271 goto err_regs;
272
273 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
274 CTRL_IOMEM_ID);
275 regs->d_inode->i_size = resource_size(regs_resource);
276 udc->debugfs_regs = regs;
277
278 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
279
280 return;
281
282 err_regs:
283 debugfs_remove(root);
284 err_root:
285 udc->debugfs_root = NULL;
286 dev_err(&udc->pdev->dev, "debugfs is not available\n");
287 }
288
usba_cleanup_debugfs(struct usba_udc * udc)289 static void usba_cleanup_debugfs(struct usba_udc *udc)
290 {
291 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
292 debugfs_remove(udc->debugfs_regs);
293 debugfs_remove(udc->debugfs_root);
294 udc->debugfs_regs = NULL;
295 udc->debugfs_root = NULL;
296 }
297 #else
usba_ep_init_debugfs(struct usba_udc * udc,struct usba_ep * ep)298 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
299 struct usba_ep *ep)
300 {
301
302 }
303
usba_ep_cleanup_debugfs(struct usba_ep * ep)304 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
305 {
306
307 }
308
usba_init_debugfs(struct usba_udc * udc)309 static inline void usba_init_debugfs(struct usba_udc *udc)
310 {
311
312 }
313
usba_cleanup_debugfs(struct usba_udc * udc)314 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
315 {
316
317 }
318 #endif
319
vbus_is_present(struct usba_udc * udc)320 static int vbus_is_present(struct usba_udc *udc)
321 {
322 if (gpio_is_valid(udc->vbus_pin))
323 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
324
325 /* No Vbus detection: Assume always present */
326 return 1;
327 }
328
329 #if defined(CONFIG_ARCH_AT91SAM9RL)
330
331 #include <mach/at91_pmc.h>
332
toggle_bias(int is_on)333 static void toggle_bias(int is_on)
334 {
335 unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
336
337 if (is_on)
338 at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
339 else
340 at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
341 }
342
343 #else
344
toggle_bias(int is_on)345 static void toggle_bias(int is_on)
346 {
347 }
348
349 #endif /* CONFIG_ARCH_AT91SAM9RL */
350
next_fifo_transaction(struct usba_ep * ep,struct usba_request * req)351 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
352 {
353 unsigned int transaction_len;
354
355 transaction_len = req->req.length - req->req.actual;
356 req->last_transaction = 1;
357 if (transaction_len > ep->ep.maxpacket) {
358 transaction_len = ep->ep.maxpacket;
359 req->last_transaction = 0;
360 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
361 req->last_transaction = 0;
362
363 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
364 ep->ep.name, req, transaction_len,
365 req->last_transaction ? ", done" : "");
366
367 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
368 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
369 req->req.actual += transaction_len;
370 }
371
submit_request(struct usba_ep * ep,struct usba_request * req)372 static void submit_request(struct usba_ep *ep, struct usba_request *req)
373 {
374 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
375 ep->ep.name, req, req->req.length);
376
377 req->req.actual = 0;
378 req->submitted = 1;
379
380 if (req->using_dma) {
381 if (req->req.length == 0) {
382 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
383 return;
384 }
385
386 if (req->req.zero)
387 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
388 else
389 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
390
391 usba_dma_writel(ep, ADDRESS, req->req.dma);
392 usba_dma_writel(ep, CONTROL, req->ctrl);
393 } else {
394 next_fifo_transaction(ep, req);
395 if (req->last_transaction) {
396 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
397 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
398 } else {
399 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
400 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
401 }
402 }
403 }
404
submit_next_request(struct usba_ep * ep)405 static void submit_next_request(struct usba_ep *ep)
406 {
407 struct usba_request *req;
408
409 if (list_empty(&ep->queue)) {
410 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
411 return;
412 }
413
414 req = list_entry(ep->queue.next, struct usba_request, queue);
415 if (!req->submitted)
416 submit_request(ep, req);
417 }
418
send_status(struct usba_udc * udc,struct usba_ep * ep)419 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
420 {
421 ep->state = STATUS_STAGE_IN;
422 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
423 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
424 }
425
receive_data(struct usba_ep * ep)426 static void receive_data(struct usba_ep *ep)
427 {
428 struct usba_udc *udc = ep->udc;
429 struct usba_request *req;
430 unsigned long status;
431 unsigned int bytecount, nr_busy;
432 int is_complete = 0;
433
434 status = usba_ep_readl(ep, STA);
435 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
436
437 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
438
439 while (nr_busy > 0) {
440 if (list_empty(&ep->queue)) {
441 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
442 break;
443 }
444 req = list_entry(ep->queue.next,
445 struct usba_request, queue);
446
447 bytecount = USBA_BFEXT(BYTE_COUNT, status);
448
449 if (status & (1 << 31))
450 is_complete = 1;
451 if (req->req.actual + bytecount >= req->req.length) {
452 is_complete = 1;
453 bytecount = req->req.length - req->req.actual;
454 }
455
456 memcpy_fromio(req->req.buf + req->req.actual,
457 ep->fifo, bytecount);
458 req->req.actual += bytecount;
459
460 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
461
462 if (is_complete) {
463 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
464 req->req.status = 0;
465 list_del_init(&req->queue);
466 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
467 spin_unlock(&udc->lock);
468 req->req.complete(&ep->ep, &req->req);
469 spin_lock(&udc->lock);
470 }
471
472 status = usba_ep_readl(ep, STA);
473 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
474
475 if (is_complete && ep_is_control(ep)) {
476 send_status(udc, ep);
477 break;
478 }
479 }
480 }
481
482 static void
request_complete(struct usba_ep * ep,struct usba_request * req,int status)483 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
484 {
485 struct usba_udc *udc = ep->udc;
486
487 WARN_ON(!list_empty(&req->queue));
488
489 if (req->req.status == -EINPROGRESS)
490 req->req.status = status;
491
492 if (req->using_dma)
493 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
494
495 DBG(DBG_GADGET | DBG_REQ,
496 "%s: req %p complete: status %d, actual %u\n",
497 ep->ep.name, req, req->req.status, req->req.actual);
498
499 spin_unlock(&udc->lock);
500 req->req.complete(&ep->ep, &req->req);
501 spin_lock(&udc->lock);
502 }
503
504 static void
request_complete_list(struct usba_ep * ep,struct list_head * list,int status)505 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
506 {
507 struct usba_request *req, *tmp_req;
508
509 list_for_each_entry_safe(req, tmp_req, list, queue) {
510 list_del_init(&req->queue);
511 request_complete(ep, req, status);
512 }
513 }
514
515 static int
usba_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)516 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
517 {
518 struct usba_ep *ep = to_usba_ep(_ep);
519 struct usba_udc *udc = ep->udc;
520 unsigned long flags, ept_cfg, maxpacket;
521 unsigned int nr_trans;
522
523 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
524
525 maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
526
527 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
528 || ep->index == 0
529 || desc->bDescriptorType != USB_DT_ENDPOINT
530 || maxpacket == 0
531 || maxpacket > ep->fifo_size) {
532 DBG(DBG_ERR, "ep_enable: Invalid argument");
533 return -EINVAL;
534 }
535
536 ep->is_isoc = 0;
537 ep->is_in = 0;
538
539 if (maxpacket <= 8)
540 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
541 else
542 /* LSB is bit 1, not 0 */
543 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
544
545 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
546 ep->ep.name, ept_cfg, maxpacket);
547
548 if (usb_endpoint_dir_in(desc)) {
549 ep->is_in = 1;
550 ept_cfg |= USBA_EPT_DIR_IN;
551 }
552
553 switch (usb_endpoint_type(desc)) {
554 case USB_ENDPOINT_XFER_CONTROL:
555 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
556 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
557 break;
558 case USB_ENDPOINT_XFER_ISOC:
559 if (!ep->can_isoc) {
560 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
561 ep->ep.name);
562 return -EINVAL;
563 }
564
565 /*
566 * Bits 11:12 specify number of _additional_
567 * transactions per microframe.
568 */
569 nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
570 if (nr_trans > 3)
571 return -EINVAL;
572
573 ep->is_isoc = 1;
574 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
575
576 /*
577 * Do triple-buffering on high-bandwidth iso endpoints.
578 */
579 if (nr_trans > 1 && ep->nr_banks == 3)
580 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
581 else
582 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
583 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
584 break;
585 case USB_ENDPOINT_XFER_BULK:
586 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
588 break;
589 case USB_ENDPOINT_XFER_INT:
590 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
591 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
592 break;
593 }
594
595 spin_lock_irqsave(&ep->udc->lock, flags);
596
597 ep->ep.desc = desc;
598 ep->ep.maxpacket = maxpacket;
599
600 usba_ep_writel(ep, CFG, ept_cfg);
601 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
602
603 if (ep->can_dma) {
604 u32 ctrl;
605
606 usba_writel(udc, INT_ENB,
607 (usba_readl(udc, INT_ENB)
608 | USBA_BF(EPT_INT, 1 << ep->index)
609 | USBA_BF(DMA_INT, 1 << ep->index)));
610 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
611 usba_ep_writel(ep, CTL_ENB, ctrl);
612 } else {
613 usba_writel(udc, INT_ENB,
614 (usba_readl(udc, INT_ENB)
615 | USBA_BF(EPT_INT, 1 << ep->index)));
616 }
617
618 spin_unlock_irqrestore(&udc->lock, flags);
619
620 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
621 (unsigned long)usba_ep_readl(ep, CFG));
622 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
623 (unsigned long)usba_readl(udc, INT_ENB));
624
625 return 0;
626 }
627
usba_ep_disable(struct usb_ep * _ep)628 static int usba_ep_disable(struct usb_ep *_ep)
629 {
630 struct usba_ep *ep = to_usba_ep(_ep);
631 struct usba_udc *udc = ep->udc;
632 LIST_HEAD(req_list);
633 unsigned long flags;
634
635 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
636
637 spin_lock_irqsave(&udc->lock, flags);
638
639 if (!ep->ep.desc) {
640 spin_unlock_irqrestore(&udc->lock, flags);
641 /* REVISIT because this driver disables endpoints in
642 * reset_all_endpoints() before calling disconnect(),
643 * most gadget drivers would trigger this non-error ...
644 */
645 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
646 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
647 ep->ep.name);
648 return -EINVAL;
649 }
650 ep->ep.desc = NULL;
651
652 list_splice_init(&ep->queue, &req_list);
653 if (ep->can_dma) {
654 usba_dma_writel(ep, CONTROL, 0);
655 usba_dma_writel(ep, ADDRESS, 0);
656 usba_dma_readl(ep, STATUS);
657 }
658 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
659 usba_writel(udc, INT_ENB,
660 usba_readl(udc, INT_ENB)
661 & ~USBA_BF(EPT_INT, 1 << ep->index));
662
663 request_complete_list(ep, &req_list, -ESHUTDOWN);
664
665 spin_unlock_irqrestore(&udc->lock, flags);
666
667 return 0;
668 }
669
670 static struct usb_request *
usba_ep_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)671 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
672 {
673 struct usba_request *req;
674
675 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
676
677 req = kzalloc(sizeof(*req), gfp_flags);
678 if (!req)
679 return NULL;
680
681 INIT_LIST_HEAD(&req->queue);
682
683 return &req->req;
684 }
685
686 static void
usba_ep_free_request(struct usb_ep * _ep,struct usb_request * _req)687 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
688 {
689 struct usba_request *req = to_usba_req(_req);
690
691 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
692
693 kfree(req);
694 }
695
queue_dma(struct usba_udc * udc,struct usba_ep * ep,struct usba_request * req,gfp_t gfp_flags)696 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
697 struct usba_request *req, gfp_t gfp_flags)
698 {
699 unsigned long flags;
700 int ret;
701
702 DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
703 ep->ep.name, req->req.length, req->req.dma,
704 req->req.zero ? 'Z' : 'z',
705 req->req.short_not_ok ? 'S' : 's',
706 req->req.no_interrupt ? 'I' : 'i');
707
708 if (req->req.length > 0x10000) {
709 /* Lengths from 0 to 65536 (inclusive) are supported */
710 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
711 return -EINVAL;
712 }
713
714 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
715 if (ret)
716 return ret;
717
718 req->using_dma = 1;
719 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
720 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
721 | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
722
723 if (ep->is_in)
724 req->ctrl |= USBA_DMA_END_BUF_EN;
725
726 /*
727 * Add this request to the queue and submit for DMA if
728 * possible. Check if we're still alive first -- we may have
729 * received a reset since last time we checked.
730 */
731 ret = -ESHUTDOWN;
732 spin_lock_irqsave(&udc->lock, flags);
733 if (ep->ep.desc) {
734 if (list_empty(&ep->queue))
735 submit_request(ep, req);
736
737 list_add_tail(&req->queue, &ep->queue);
738 ret = 0;
739 }
740 spin_unlock_irqrestore(&udc->lock, flags);
741
742 return ret;
743 }
744
745 static int
usba_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)746 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
747 {
748 struct usba_request *req = to_usba_req(_req);
749 struct usba_ep *ep = to_usba_ep(_ep);
750 struct usba_udc *udc = ep->udc;
751 unsigned long flags;
752 int ret;
753
754 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
755 ep->ep.name, req, _req->length);
756
757 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
758 !ep->ep.desc)
759 return -ESHUTDOWN;
760
761 req->submitted = 0;
762 req->using_dma = 0;
763 req->last_transaction = 0;
764
765 _req->status = -EINPROGRESS;
766 _req->actual = 0;
767
768 if (ep->can_dma)
769 return queue_dma(udc, ep, req, gfp_flags);
770
771 /* May have received a reset since last time we checked */
772 ret = -ESHUTDOWN;
773 spin_lock_irqsave(&udc->lock, flags);
774 if (ep->ep.desc) {
775 list_add_tail(&req->queue, &ep->queue);
776
777 if ((!ep_is_control(ep) && ep->is_in) ||
778 (ep_is_control(ep)
779 && (ep->state == DATA_STAGE_IN
780 || ep->state == STATUS_STAGE_IN)))
781 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
782 else
783 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
784 ret = 0;
785 }
786 spin_unlock_irqrestore(&udc->lock, flags);
787
788 return ret;
789 }
790
791 static void
usba_update_req(struct usba_ep * ep,struct usba_request * req,u32 status)792 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
793 {
794 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
795 }
796
stop_dma(struct usba_ep * ep,u32 * pstatus)797 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
798 {
799 unsigned int timeout;
800 u32 status;
801
802 /*
803 * Stop the DMA controller. When writing both CH_EN
804 * and LINK to 0, the other bits are not affected.
805 */
806 usba_dma_writel(ep, CONTROL, 0);
807
808 /* Wait for the FIFO to empty */
809 for (timeout = 40; timeout; --timeout) {
810 status = usba_dma_readl(ep, STATUS);
811 if (!(status & USBA_DMA_CH_EN))
812 break;
813 udelay(1);
814 }
815
816 if (pstatus)
817 *pstatus = status;
818
819 if (timeout == 0) {
820 dev_err(&ep->udc->pdev->dev,
821 "%s: timed out waiting for DMA FIFO to empty\n",
822 ep->ep.name);
823 return -ETIMEDOUT;
824 }
825
826 return 0;
827 }
828
usba_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)829 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
830 {
831 struct usba_ep *ep = to_usba_ep(_ep);
832 struct usba_udc *udc = ep->udc;
833 struct usba_request *req = to_usba_req(_req);
834 unsigned long flags;
835 u32 status;
836
837 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
838 ep->ep.name, req);
839
840 spin_lock_irqsave(&udc->lock, flags);
841
842 if (req->using_dma) {
843 /*
844 * If this request is currently being transferred,
845 * stop the DMA controller and reset the FIFO.
846 */
847 if (ep->queue.next == &req->queue) {
848 status = usba_dma_readl(ep, STATUS);
849 if (status & USBA_DMA_CH_EN)
850 stop_dma(ep, &status);
851
852 #ifdef CONFIG_USB_GADGET_DEBUG_FS
853 ep->last_dma_status = status;
854 #endif
855
856 usba_writel(udc, EPT_RST, 1 << ep->index);
857
858 usba_update_req(ep, req, status);
859 }
860 }
861
862 /*
863 * Errors should stop the queue from advancing until the
864 * completion function returns.
865 */
866 list_del_init(&req->queue);
867
868 request_complete(ep, req, -ECONNRESET);
869
870 /* Process the next request if any */
871 submit_next_request(ep);
872 spin_unlock_irqrestore(&udc->lock, flags);
873
874 return 0;
875 }
876
usba_ep_set_halt(struct usb_ep * _ep,int value)877 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
878 {
879 struct usba_ep *ep = to_usba_ep(_ep);
880 struct usba_udc *udc = ep->udc;
881 unsigned long flags;
882 int ret = 0;
883
884 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
885 value ? "set" : "clear");
886
887 if (!ep->ep.desc) {
888 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
889 ep->ep.name);
890 return -ENODEV;
891 }
892 if (ep->is_isoc) {
893 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
894 ep->ep.name);
895 return -ENOTTY;
896 }
897
898 spin_lock_irqsave(&udc->lock, flags);
899
900 /*
901 * We can't halt IN endpoints while there are still data to be
902 * transferred
903 */
904 if (!list_empty(&ep->queue)
905 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
906 & USBA_BF(BUSY_BANKS, -1L))))) {
907 ret = -EAGAIN;
908 } else {
909 if (value)
910 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
911 else
912 usba_ep_writel(ep, CLR_STA,
913 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
914 usba_ep_readl(ep, STA);
915 }
916
917 spin_unlock_irqrestore(&udc->lock, flags);
918
919 return ret;
920 }
921
usba_ep_fifo_status(struct usb_ep * _ep)922 static int usba_ep_fifo_status(struct usb_ep *_ep)
923 {
924 struct usba_ep *ep = to_usba_ep(_ep);
925
926 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
927 }
928
usba_ep_fifo_flush(struct usb_ep * _ep)929 static void usba_ep_fifo_flush(struct usb_ep *_ep)
930 {
931 struct usba_ep *ep = to_usba_ep(_ep);
932 struct usba_udc *udc = ep->udc;
933
934 usba_writel(udc, EPT_RST, 1 << ep->index);
935 }
936
937 static const struct usb_ep_ops usba_ep_ops = {
938 .enable = usba_ep_enable,
939 .disable = usba_ep_disable,
940 .alloc_request = usba_ep_alloc_request,
941 .free_request = usba_ep_free_request,
942 .queue = usba_ep_queue,
943 .dequeue = usba_ep_dequeue,
944 .set_halt = usba_ep_set_halt,
945 .fifo_status = usba_ep_fifo_status,
946 .fifo_flush = usba_ep_fifo_flush,
947 };
948
usba_udc_get_frame(struct usb_gadget * gadget)949 static int usba_udc_get_frame(struct usb_gadget *gadget)
950 {
951 struct usba_udc *udc = to_usba_udc(gadget);
952
953 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
954 }
955
usba_udc_wakeup(struct usb_gadget * gadget)956 static int usba_udc_wakeup(struct usb_gadget *gadget)
957 {
958 struct usba_udc *udc = to_usba_udc(gadget);
959 unsigned long flags;
960 u32 ctrl;
961 int ret = -EINVAL;
962
963 spin_lock_irqsave(&udc->lock, flags);
964 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
965 ctrl = usba_readl(udc, CTRL);
966 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
967 ret = 0;
968 }
969 spin_unlock_irqrestore(&udc->lock, flags);
970
971 return ret;
972 }
973
974 static int
usba_udc_set_selfpowered(struct usb_gadget * gadget,int is_selfpowered)975 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
976 {
977 struct usba_udc *udc = to_usba_udc(gadget);
978 unsigned long flags;
979
980 spin_lock_irqsave(&udc->lock, flags);
981 if (is_selfpowered)
982 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
983 else
984 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
985 spin_unlock_irqrestore(&udc->lock, flags);
986
987 return 0;
988 }
989
990 static int atmel_usba_start(struct usb_gadget *gadget,
991 struct usb_gadget_driver *driver);
992 static int atmel_usba_stop(struct usb_gadget *gadget,
993 struct usb_gadget_driver *driver);
994 static const struct usb_gadget_ops usba_udc_ops = {
995 .get_frame = usba_udc_get_frame,
996 .wakeup = usba_udc_wakeup,
997 .set_selfpowered = usba_udc_set_selfpowered,
998 .udc_start = atmel_usba_start,
999 .udc_stop = atmel_usba_stop,
1000 };
1001
1002 static struct usb_endpoint_descriptor usba_ep0_desc = {
1003 .bLength = USB_DT_ENDPOINT_SIZE,
1004 .bDescriptorType = USB_DT_ENDPOINT,
1005 .bEndpointAddress = 0,
1006 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1007 .wMaxPacketSize = cpu_to_le16(64),
1008 /* FIXME: I have no idea what to put here */
1009 .bInterval = 1,
1010 };
1011
nop_release(struct device * dev)1012 static void nop_release(struct device *dev)
1013 {
1014
1015 }
1016
1017 static struct usba_udc the_udc = {
1018 .gadget = {
1019 .ops = &usba_udc_ops,
1020 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1021 .max_speed = USB_SPEED_HIGH,
1022 .name = "atmel_usba_udc",
1023 .dev = {
1024 .init_name = "gadget",
1025 .release = nop_release,
1026 },
1027 },
1028 };
1029
1030 /*
1031 * Called with interrupts disabled and udc->lock held.
1032 */
reset_all_endpoints(struct usba_udc * udc)1033 static void reset_all_endpoints(struct usba_udc *udc)
1034 {
1035 struct usba_ep *ep;
1036 struct usba_request *req, *tmp_req;
1037
1038 usba_writel(udc, EPT_RST, ~0UL);
1039
1040 ep = to_usba_ep(udc->gadget.ep0);
1041 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1042 list_del_init(&req->queue);
1043 request_complete(ep, req, -ECONNRESET);
1044 }
1045
1046 /* NOTE: normally, the next call to the gadget driver is in
1047 * charge of disabling endpoints... usually disconnect().
1048 * The exception would be entering a high speed test mode.
1049 *
1050 * FIXME remove this code ... and retest thoroughly.
1051 */
1052 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
1053 if (ep->ep.desc) {
1054 spin_unlock(&udc->lock);
1055 usba_ep_disable(&ep->ep);
1056 spin_lock(&udc->lock);
1057 }
1058 }
1059 }
1060
get_ep_by_addr(struct usba_udc * udc,u16 wIndex)1061 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1062 {
1063 struct usba_ep *ep;
1064
1065 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1066 return to_usba_ep(udc->gadget.ep0);
1067
1068 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1069 u8 bEndpointAddress;
1070
1071 if (!ep->ep.desc)
1072 continue;
1073 bEndpointAddress = ep->ep.desc->bEndpointAddress;
1074 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1075 continue;
1076 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1077 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1078 return ep;
1079 }
1080
1081 return NULL;
1082 }
1083
1084 /* Called with interrupts disabled and udc->lock held */
set_protocol_stall(struct usba_udc * udc,struct usba_ep * ep)1085 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1086 {
1087 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1088 ep->state = WAIT_FOR_SETUP;
1089 }
1090
is_stalled(struct usba_udc * udc,struct usba_ep * ep)1091 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1092 {
1093 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1094 return 1;
1095 return 0;
1096 }
1097
set_address(struct usba_udc * udc,unsigned int addr)1098 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1099 {
1100 u32 regval;
1101
1102 DBG(DBG_BUS, "setting address %u...\n", addr);
1103 regval = usba_readl(udc, CTRL);
1104 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1105 usba_writel(udc, CTRL, regval);
1106 }
1107
do_test_mode(struct usba_udc * udc)1108 static int do_test_mode(struct usba_udc *udc)
1109 {
1110 static const char test_packet_buffer[] = {
1111 /* JKJKJKJK * 9 */
1112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1113 /* JJKKJJKK * 8 */
1114 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1115 /* JJKKJJKK * 8 */
1116 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1117 /* JJJJJJJKKKKKKK * 8 */
1118 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1119 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1120 /* JJJJJJJK * 8 */
1121 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1122 /* {JKKKKKKK * 10}, JK */
1123 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1124 };
1125 struct usba_ep *ep;
1126 struct device *dev = &udc->pdev->dev;
1127 int test_mode;
1128
1129 test_mode = udc->test_mode;
1130
1131 /* Start from a clean slate */
1132 reset_all_endpoints(udc);
1133
1134 switch (test_mode) {
1135 case 0x0100:
1136 /* Test_J */
1137 usba_writel(udc, TST, USBA_TST_J_MODE);
1138 dev_info(dev, "Entering Test_J mode...\n");
1139 break;
1140 case 0x0200:
1141 /* Test_K */
1142 usba_writel(udc, TST, USBA_TST_K_MODE);
1143 dev_info(dev, "Entering Test_K mode...\n");
1144 break;
1145 case 0x0300:
1146 /*
1147 * Test_SE0_NAK: Force high-speed mode and set up ep0
1148 * for Bulk IN transfers
1149 */
1150 ep = &usba_ep[0];
1151 usba_writel(udc, TST,
1152 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1153 usba_ep_writel(ep, CFG,
1154 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1155 | USBA_EPT_DIR_IN
1156 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1157 | USBA_BF(BK_NUMBER, 1));
1158 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1159 set_protocol_stall(udc, ep);
1160 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1161 } else {
1162 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1163 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1164 }
1165 break;
1166 case 0x0400:
1167 /* Test_Packet */
1168 ep = &usba_ep[0];
1169 usba_ep_writel(ep, CFG,
1170 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1171 | USBA_EPT_DIR_IN
1172 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1173 | USBA_BF(BK_NUMBER, 1));
1174 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1175 set_protocol_stall(udc, ep);
1176 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1177 } else {
1178 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1179 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1180 memcpy_toio(ep->fifo, test_packet_buffer,
1181 sizeof(test_packet_buffer));
1182 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1183 dev_info(dev, "Entering Test_Packet mode...\n");
1184 }
1185 break;
1186 default:
1187 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1188 return -EINVAL;
1189 }
1190
1191 return 0;
1192 }
1193
1194 /* Avoid overly long expressions */
feature_is_dev_remote_wakeup(struct usb_ctrlrequest * crq)1195 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1196 {
1197 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1198 return true;
1199 return false;
1200 }
1201
feature_is_dev_test_mode(struct usb_ctrlrequest * crq)1202 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1203 {
1204 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1205 return true;
1206 return false;
1207 }
1208
feature_is_ep_halt(struct usb_ctrlrequest * crq)1209 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1210 {
1211 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1212 return true;
1213 return false;
1214 }
1215
handle_ep0_setup(struct usba_udc * udc,struct usba_ep * ep,struct usb_ctrlrequest * crq)1216 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1217 struct usb_ctrlrequest *crq)
1218 {
1219 int retval = 0;
1220
1221 switch (crq->bRequest) {
1222 case USB_REQ_GET_STATUS: {
1223 u16 status;
1224
1225 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1226 status = cpu_to_le16(udc->devstatus);
1227 } else if (crq->bRequestType
1228 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1229 status = cpu_to_le16(0);
1230 } else if (crq->bRequestType
1231 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1232 struct usba_ep *target;
1233
1234 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1235 if (!target)
1236 goto stall;
1237
1238 status = 0;
1239 if (is_stalled(udc, target))
1240 status |= cpu_to_le16(1);
1241 } else
1242 goto delegate;
1243
1244 /* Write directly to the FIFO. No queueing is done. */
1245 if (crq->wLength != cpu_to_le16(sizeof(status)))
1246 goto stall;
1247 ep->state = DATA_STAGE_IN;
1248 __raw_writew(status, ep->fifo);
1249 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1250 break;
1251 }
1252
1253 case USB_REQ_CLEAR_FEATURE: {
1254 if (crq->bRequestType == USB_RECIP_DEVICE) {
1255 if (feature_is_dev_remote_wakeup(crq))
1256 udc->devstatus
1257 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1258 else
1259 /* Can't CLEAR_FEATURE TEST_MODE */
1260 goto stall;
1261 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1262 struct usba_ep *target;
1263
1264 if (crq->wLength != cpu_to_le16(0)
1265 || !feature_is_ep_halt(crq))
1266 goto stall;
1267 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1268 if (!target)
1269 goto stall;
1270
1271 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1272 if (target->index != 0)
1273 usba_ep_writel(target, CLR_STA,
1274 USBA_TOGGLE_CLR);
1275 } else {
1276 goto delegate;
1277 }
1278
1279 send_status(udc, ep);
1280 break;
1281 }
1282
1283 case USB_REQ_SET_FEATURE: {
1284 if (crq->bRequestType == USB_RECIP_DEVICE) {
1285 if (feature_is_dev_test_mode(crq)) {
1286 send_status(udc, ep);
1287 ep->state = STATUS_STAGE_TEST;
1288 udc->test_mode = le16_to_cpu(crq->wIndex);
1289 return 0;
1290 } else if (feature_is_dev_remote_wakeup(crq)) {
1291 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1292 } else {
1293 goto stall;
1294 }
1295 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1296 struct usba_ep *target;
1297
1298 if (crq->wLength != cpu_to_le16(0)
1299 || !feature_is_ep_halt(crq))
1300 goto stall;
1301
1302 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1303 if (!target)
1304 goto stall;
1305
1306 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1307 } else
1308 goto delegate;
1309
1310 send_status(udc, ep);
1311 break;
1312 }
1313
1314 case USB_REQ_SET_ADDRESS:
1315 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1316 goto delegate;
1317
1318 set_address(udc, le16_to_cpu(crq->wValue));
1319 send_status(udc, ep);
1320 ep->state = STATUS_STAGE_ADDR;
1321 break;
1322
1323 default:
1324 delegate:
1325 spin_unlock(&udc->lock);
1326 retval = udc->driver->setup(&udc->gadget, crq);
1327 spin_lock(&udc->lock);
1328 }
1329
1330 return retval;
1331
1332 stall:
1333 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1334 "halting endpoint...\n",
1335 ep->ep.name, crq->bRequestType, crq->bRequest,
1336 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1337 le16_to_cpu(crq->wLength));
1338 set_protocol_stall(udc, ep);
1339 return -1;
1340 }
1341
usba_control_irq(struct usba_udc * udc,struct usba_ep * ep)1342 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1343 {
1344 struct usba_request *req;
1345 u32 epstatus;
1346 u32 epctrl;
1347
1348 restart:
1349 epstatus = usba_ep_readl(ep, STA);
1350 epctrl = usba_ep_readl(ep, CTL);
1351
1352 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1353 ep->ep.name, ep->state, epstatus, epctrl);
1354
1355 req = NULL;
1356 if (!list_empty(&ep->queue))
1357 req = list_entry(ep->queue.next,
1358 struct usba_request, queue);
1359
1360 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1361 if (req->submitted)
1362 next_fifo_transaction(ep, req);
1363 else
1364 submit_request(ep, req);
1365
1366 if (req->last_transaction) {
1367 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1368 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1369 }
1370 goto restart;
1371 }
1372 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1373 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1374
1375 switch (ep->state) {
1376 case DATA_STAGE_IN:
1377 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1378 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1379 ep->state = STATUS_STAGE_OUT;
1380 break;
1381 case STATUS_STAGE_ADDR:
1382 /* Activate our new address */
1383 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1384 | USBA_FADDR_EN));
1385 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1386 ep->state = WAIT_FOR_SETUP;
1387 break;
1388 case STATUS_STAGE_IN:
1389 if (req) {
1390 list_del_init(&req->queue);
1391 request_complete(ep, req, 0);
1392 submit_next_request(ep);
1393 }
1394 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1395 ep->state = WAIT_FOR_SETUP;
1396 break;
1397 case STATUS_STAGE_TEST:
1398 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1399 ep->state = WAIT_FOR_SETUP;
1400 if (do_test_mode(udc))
1401 set_protocol_stall(udc, ep);
1402 break;
1403 default:
1404 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1405 "halting endpoint...\n",
1406 ep->ep.name, ep->state);
1407 set_protocol_stall(udc, ep);
1408 break;
1409 }
1410
1411 goto restart;
1412 }
1413 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1414 switch (ep->state) {
1415 case STATUS_STAGE_OUT:
1416 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1417 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1418
1419 if (req) {
1420 list_del_init(&req->queue);
1421 request_complete(ep, req, 0);
1422 }
1423 ep->state = WAIT_FOR_SETUP;
1424 break;
1425
1426 case DATA_STAGE_OUT:
1427 receive_data(ep);
1428 break;
1429
1430 default:
1431 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1432 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1433 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1434 "halting endpoint...\n",
1435 ep->ep.name, ep->state);
1436 set_protocol_stall(udc, ep);
1437 break;
1438 }
1439
1440 goto restart;
1441 }
1442 if (epstatus & USBA_RX_SETUP) {
1443 union {
1444 struct usb_ctrlrequest crq;
1445 unsigned long data[2];
1446 } crq;
1447 unsigned int pkt_len;
1448 int ret;
1449
1450 if (ep->state != WAIT_FOR_SETUP) {
1451 /*
1452 * Didn't expect a SETUP packet at this
1453 * point. Clean up any pending requests (which
1454 * may be successful).
1455 */
1456 int status = -EPROTO;
1457
1458 /*
1459 * RXRDY and TXCOMP are dropped when SETUP
1460 * packets arrive. Just pretend we received
1461 * the status packet.
1462 */
1463 if (ep->state == STATUS_STAGE_OUT
1464 || ep->state == STATUS_STAGE_IN) {
1465 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1466 status = 0;
1467 }
1468
1469 if (req) {
1470 list_del_init(&req->queue);
1471 request_complete(ep, req, status);
1472 }
1473 }
1474
1475 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1476 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1477 if (pkt_len != sizeof(crq)) {
1478 pr_warning("udc: Invalid packet length %u "
1479 "(expected %zu)\n", pkt_len, sizeof(crq));
1480 set_protocol_stall(udc, ep);
1481 return;
1482 }
1483
1484 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1485 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1486
1487 /* Free up one bank in the FIFO so that we can
1488 * generate or receive a reply right away. */
1489 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1490
1491 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1492 ep->state, crq.crq.bRequestType,
1493 crq.crq.bRequest); */
1494
1495 if (crq.crq.bRequestType & USB_DIR_IN) {
1496 /*
1497 * The USB 2.0 spec states that "if wLength is
1498 * zero, there is no data transfer phase."
1499 * However, testusb #14 seems to actually
1500 * expect a data phase even if wLength = 0...
1501 */
1502 ep->state = DATA_STAGE_IN;
1503 } else {
1504 if (crq.crq.wLength != cpu_to_le16(0))
1505 ep->state = DATA_STAGE_OUT;
1506 else
1507 ep->state = STATUS_STAGE_IN;
1508 }
1509
1510 ret = -1;
1511 if (ep->index == 0)
1512 ret = handle_ep0_setup(udc, ep, &crq.crq);
1513 else {
1514 spin_unlock(&udc->lock);
1515 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1516 spin_lock(&udc->lock);
1517 }
1518
1519 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1520 crq.crq.bRequestType, crq.crq.bRequest,
1521 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1522
1523 if (ret < 0) {
1524 /* Let the host know that we failed */
1525 set_protocol_stall(udc, ep);
1526 }
1527 }
1528 }
1529
usba_ep_irq(struct usba_udc * udc,struct usba_ep * ep)1530 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1531 {
1532 struct usba_request *req;
1533 u32 epstatus;
1534 u32 epctrl;
1535
1536 epstatus = usba_ep_readl(ep, STA);
1537 epctrl = usba_ep_readl(ep, CTL);
1538
1539 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1540
1541 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1542 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1543
1544 if (list_empty(&ep->queue)) {
1545 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1546 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1547 return;
1548 }
1549
1550 req = list_entry(ep->queue.next, struct usba_request, queue);
1551
1552 if (req->using_dma) {
1553 /* Send a zero-length packet */
1554 usba_ep_writel(ep, SET_STA,
1555 USBA_TX_PK_RDY);
1556 usba_ep_writel(ep, CTL_DIS,
1557 USBA_TX_PK_RDY);
1558 list_del_init(&req->queue);
1559 submit_next_request(ep);
1560 request_complete(ep, req, 0);
1561 } else {
1562 if (req->submitted)
1563 next_fifo_transaction(ep, req);
1564 else
1565 submit_request(ep, req);
1566
1567 if (req->last_transaction) {
1568 list_del_init(&req->queue);
1569 submit_next_request(ep);
1570 request_complete(ep, req, 0);
1571 }
1572 }
1573
1574 epstatus = usba_ep_readl(ep, STA);
1575 epctrl = usba_ep_readl(ep, CTL);
1576 }
1577 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1578 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1579 receive_data(ep);
1580 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1581 }
1582 }
1583
usba_dma_irq(struct usba_udc * udc,struct usba_ep * ep)1584 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1585 {
1586 struct usba_request *req;
1587 u32 status, control, pending;
1588
1589 status = usba_dma_readl(ep, STATUS);
1590 control = usba_dma_readl(ep, CONTROL);
1591 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1592 ep->last_dma_status = status;
1593 #endif
1594 pending = status & control;
1595 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1596
1597 if (status & USBA_DMA_CH_EN) {
1598 dev_err(&udc->pdev->dev,
1599 "DMA_CH_EN is set after transfer is finished!\n");
1600 dev_err(&udc->pdev->dev,
1601 "status=%#08x, pending=%#08x, control=%#08x\n",
1602 status, pending, control);
1603
1604 /*
1605 * try to pretend nothing happened. We might have to
1606 * do something here...
1607 */
1608 }
1609
1610 if (list_empty(&ep->queue))
1611 /* Might happen if a reset comes along at the right moment */
1612 return;
1613
1614 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1615 req = list_entry(ep->queue.next, struct usba_request, queue);
1616 usba_update_req(ep, req, status);
1617
1618 list_del_init(&req->queue);
1619 submit_next_request(ep);
1620 request_complete(ep, req, 0);
1621 }
1622 }
1623
usba_udc_irq(int irq,void * devid)1624 static irqreturn_t usba_udc_irq(int irq, void *devid)
1625 {
1626 struct usba_udc *udc = devid;
1627 u32 status;
1628 u32 dma_status;
1629 u32 ep_status;
1630
1631 spin_lock(&udc->lock);
1632
1633 status = usba_readl(udc, INT_STA);
1634 DBG(DBG_INT, "irq, status=%#08x\n", status);
1635
1636 if (status & USBA_DET_SUSPEND) {
1637 toggle_bias(0);
1638 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1639 DBG(DBG_BUS, "Suspend detected\n");
1640 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1641 && udc->driver && udc->driver->suspend) {
1642 spin_unlock(&udc->lock);
1643 udc->driver->suspend(&udc->gadget);
1644 spin_lock(&udc->lock);
1645 }
1646 }
1647
1648 if (status & USBA_WAKE_UP) {
1649 toggle_bias(1);
1650 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1651 DBG(DBG_BUS, "Wake Up CPU detected\n");
1652 }
1653
1654 if (status & USBA_END_OF_RESUME) {
1655 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1656 DBG(DBG_BUS, "Resume detected\n");
1657 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1658 && udc->driver && udc->driver->resume) {
1659 spin_unlock(&udc->lock);
1660 udc->driver->resume(&udc->gadget);
1661 spin_lock(&udc->lock);
1662 }
1663 }
1664
1665 dma_status = USBA_BFEXT(DMA_INT, status);
1666 if (dma_status) {
1667 int i;
1668
1669 for (i = 1; i < USBA_NR_ENDPOINTS; i++)
1670 if (dma_status & (1 << i))
1671 usba_dma_irq(udc, &usba_ep[i]);
1672 }
1673
1674 ep_status = USBA_BFEXT(EPT_INT, status);
1675 if (ep_status) {
1676 int i;
1677
1678 for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1679 if (ep_status & (1 << i)) {
1680 if (ep_is_control(&usba_ep[i]))
1681 usba_control_irq(udc, &usba_ep[i]);
1682 else
1683 usba_ep_irq(udc, &usba_ep[i]);
1684 }
1685 }
1686
1687 if (status & USBA_END_OF_RESET) {
1688 struct usba_ep *ep0;
1689
1690 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1691 reset_all_endpoints(udc);
1692
1693 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1694 && udc->driver->disconnect) {
1695 udc->gadget.speed = USB_SPEED_UNKNOWN;
1696 spin_unlock(&udc->lock);
1697 udc->driver->disconnect(&udc->gadget);
1698 spin_lock(&udc->lock);
1699 }
1700
1701 if (status & USBA_HIGH_SPEED)
1702 udc->gadget.speed = USB_SPEED_HIGH;
1703 else
1704 udc->gadget.speed = USB_SPEED_FULL;
1705 DBG(DBG_BUS, "%s bus reset detected\n",
1706 usb_speed_string(udc->gadget.speed));
1707
1708 ep0 = &usba_ep[0];
1709 ep0->ep.desc = &usba_ep0_desc;
1710 ep0->state = WAIT_FOR_SETUP;
1711 usba_ep_writel(ep0, CFG,
1712 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1713 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1714 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1715 usba_ep_writel(ep0, CTL_ENB,
1716 USBA_EPT_ENABLE | USBA_RX_SETUP);
1717 usba_writel(udc, INT_ENB,
1718 (usba_readl(udc, INT_ENB)
1719 | USBA_BF(EPT_INT, 1)
1720 | USBA_DET_SUSPEND
1721 | USBA_END_OF_RESUME));
1722
1723 /*
1724 * Unclear why we hit this irregularly, e.g. in usbtest,
1725 * but it's clearly harmless...
1726 */
1727 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1728 dev_dbg(&udc->pdev->dev,
1729 "ODD: EP0 configuration is invalid!\n");
1730 }
1731
1732 spin_unlock(&udc->lock);
1733
1734 return IRQ_HANDLED;
1735 }
1736
usba_vbus_irq(int irq,void * devid)1737 static irqreturn_t usba_vbus_irq(int irq, void *devid)
1738 {
1739 struct usba_udc *udc = devid;
1740 int vbus;
1741
1742 /* debounce */
1743 udelay(10);
1744
1745 spin_lock(&udc->lock);
1746
1747 /* May happen if Vbus pin toggles during probe() */
1748 if (!udc->driver)
1749 goto out;
1750
1751 vbus = vbus_is_present(udc);
1752 if (vbus != udc->vbus_prev) {
1753 if (vbus) {
1754 toggle_bias(1);
1755 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1756 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1757 } else {
1758 udc->gadget.speed = USB_SPEED_UNKNOWN;
1759 reset_all_endpoints(udc);
1760 toggle_bias(0);
1761 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1762 if (udc->driver->disconnect) {
1763 spin_unlock(&udc->lock);
1764 udc->driver->disconnect(&udc->gadget);
1765 spin_lock(&udc->lock);
1766 }
1767 }
1768 udc->vbus_prev = vbus;
1769 }
1770
1771 out:
1772 spin_unlock(&udc->lock);
1773
1774 return IRQ_HANDLED;
1775 }
1776
atmel_usba_start(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1777 static int atmel_usba_start(struct usb_gadget *gadget,
1778 struct usb_gadget_driver *driver)
1779 {
1780 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1781 unsigned long flags;
1782
1783 spin_lock_irqsave(&udc->lock, flags);
1784
1785 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1786 udc->driver = driver;
1787 spin_unlock_irqrestore(&udc->lock, flags);
1788
1789 clk_enable(udc->pclk);
1790 clk_enable(udc->hclk);
1791
1792 DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
1793
1794 udc->vbus_prev = 0;
1795 if (gpio_is_valid(udc->vbus_pin))
1796 enable_irq(gpio_to_irq(udc->vbus_pin));
1797
1798 /* If Vbus is present, enable the controller and wait for reset */
1799 spin_lock_irqsave(&udc->lock, flags);
1800 if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1801 toggle_bias(1);
1802 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1803 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1804 }
1805 spin_unlock_irqrestore(&udc->lock, flags);
1806
1807 return 0;
1808 }
1809
atmel_usba_stop(struct usb_gadget * gadget,struct usb_gadget_driver * driver)1810 static int atmel_usba_stop(struct usb_gadget *gadget,
1811 struct usb_gadget_driver *driver)
1812 {
1813 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1814 unsigned long flags;
1815
1816 if (gpio_is_valid(udc->vbus_pin))
1817 disable_irq(gpio_to_irq(udc->vbus_pin));
1818
1819 spin_lock_irqsave(&udc->lock, flags);
1820 udc->gadget.speed = USB_SPEED_UNKNOWN;
1821 reset_all_endpoints(udc);
1822 spin_unlock_irqrestore(&udc->lock, flags);
1823
1824 /* This will also disable the DP pullup */
1825 toggle_bias(0);
1826 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1827
1828 udc->driver = NULL;
1829
1830 clk_disable(udc->hclk);
1831 clk_disable(udc->pclk);
1832
1833 DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
1834
1835 return 0;
1836 }
1837
usba_udc_probe(struct platform_device * pdev)1838 static int __init usba_udc_probe(struct platform_device *pdev)
1839 {
1840 struct usba_platform_data *pdata = pdev->dev.platform_data;
1841 struct resource *regs, *fifo;
1842 struct clk *pclk, *hclk;
1843 struct usba_udc *udc = &the_udc;
1844 int irq, ret, i;
1845
1846 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
1847 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
1848 if (!regs || !fifo || !pdata)
1849 return -ENXIO;
1850
1851 irq = platform_get_irq(pdev, 0);
1852 if (irq < 0)
1853 return irq;
1854
1855 pclk = clk_get(&pdev->dev, "pclk");
1856 if (IS_ERR(pclk))
1857 return PTR_ERR(pclk);
1858 hclk = clk_get(&pdev->dev, "hclk");
1859 if (IS_ERR(hclk)) {
1860 ret = PTR_ERR(hclk);
1861 goto err_get_hclk;
1862 }
1863
1864 spin_lock_init(&udc->lock);
1865 udc->pdev = pdev;
1866 udc->pclk = pclk;
1867 udc->hclk = hclk;
1868 udc->vbus_pin = -ENODEV;
1869
1870 ret = -ENOMEM;
1871 udc->regs = ioremap(regs->start, resource_size(regs));
1872 if (!udc->regs) {
1873 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
1874 goto err_map_regs;
1875 }
1876 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
1877 (unsigned long)regs->start, udc->regs);
1878 udc->fifo = ioremap(fifo->start, resource_size(fifo));
1879 if (!udc->fifo) {
1880 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
1881 goto err_map_fifo;
1882 }
1883 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
1884 (unsigned long)fifo->start, udc->fifo);
1885
1886 platform_set_drvdata(pdev, udc);
1887
1888 /* Make sure we start from a clean slate */
1889 clk_enable(pclk);
1890 toggle_bias(0);
1891 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1892 clk_disable(pclk);
1893
1894 usba_ep = kzalloc(sizeof(struct usba_ep) * pdata->num_ep,
1895 GFP_KERNEL);
1896 if (!usba_ep)
1897 goto err_alloc_ep;
1898
1899 the_udc.gadget.ep0 = &usba_ep[0].ep;
1900
1901 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
1902 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
1903 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
1904 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
1905 usba_ep[0].ep.ops = &usba_ep_ops;
1906 usba_ep[0].ep.name = pdata->ep[0].name;
1907 usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
1908 usba_ep[0].udc = &the_udc;
1909 INIT_LIST_HEAD(&usba_ep[0].queue);
1910 usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
1911 usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
1912 usba_ep[0].index = pdata->ep[0].index;
1913 usba_ep[0].can_dma = pdata->ep[0].can_dma;
1914 usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
1915
1916 for (i = 1; i < pdata->num_ep; i++) {
1917 struct usba_ep *ep = &usba_ep[i];
1918
1919 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1920 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1921 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1922 ep->ep.ops = &usba_ep_ops;
1923 ep->ep.name = pdata->ep[i].name;
1924 ep->ep.maxpacket = pdata->ep[i].fifo_size;
1925 ep->udc = &the_udc;
1926 INIT_LIST_HEAD(&ep->queue);
1927 ep->fifo_size = pdata->ep[i].fifo_size;
1928 ep->nr_banks = pdata->ep[i].nr_banks;
1929 ep->index = pdata->ep[i].index;
1930 ep->can_dma = pdata->ep[i].can_dma;
1931 ep->can_isoc = pdata->ep[i].can_isoc;
1932
1933 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1934 }
1935
1936 ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
1937 if (ret) {
1938 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
1939 irq, ret);
1940 goto err_request_irq;
1941 }
1942 udc->irq = irq;
1943
1944 if (gpio_is_valid(pdata->vbus_pin)) {
1945 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
1946 udc->vbus_pin = pdata->vbus_pin;
1947 udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
1948
1949 ret = request_irq(gpio_to_irq(udc->vbus_pin),
1950 usba_vbus_irq, 0,
1951 "atmel_usba_udc", udc);
1952 if (ret) {
1953 gpio_free(udc->vbus_pin);
1954 udc->vbus_pin = -ENODEV;
1955 dev_warn(&udc->pdev->dev,
1956 "failed to request vbus irq; "
1957 "assuming always on\n");
1958 } else {
1959 disable_irq(gpio_to_irq(udc->vbus_pin));
1960 }
1961 } else {
1962 /* gpio_request fail so use -EINVAL for gpio_is_valid */
1963 udc->vbus_pin = -EINVAL;
1964 }
1965 }
1966
1967 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
1968 if (ret)
1969 goto err_add_udc;
1970
1971 usba_init_debugfs(udc);
1972 for (i = 1; i < pdata->num_ep; i++)
1973 usba_ep_init_debugfs(udc, &usba_ep[i]);
1974
1975 return 0;
1976
1977 err_add_udc:
1978 if (gpio_is_valid(pdata->vbus_pin)) {
1979 free_irq(gpio_to_irq(udc->vbus_pin), udc);
1980 gpio_free(udc->vbus_pin);
1981 }
1982
1983 free_irq(irq, udc);
1984 err_request_irq:
1985 kfree(usba_ep);
1986 err_alloc_ep:
1987 iounmap(udc->fifo);
1988 err_map_fifo:
1989 iounmap(udc->regs);
1990 err_map_regs:
1991 clk_put(hclk);
1992 err_get_hclk:
1993 clk_put(pclk);
1994
1995 return ret;
1996 }
1997
usba_udc_remove(struct platform_device * pdev)1998 static int __exit usba_udc_remove(struct platform_device *pdev)
1999 {
2000 struct usba_udc *udc;
2001 int i;
2002 struct usba_platform_data *pdata = pdev->dev.platform_data;
2003
2004 udc = platform_get_drvdata(pdev);
2005
2006 usb_del_gadget_udc(&udc->gadget);
2007
2008 for (i = 1; i < pdata->num_ep; i++)
2009 usba_ep_cleanup_debugfs(&usba_ep[i]);
2010 usba_cleanup_debugfs(udc);
2011
2012 if (gpio_is_valid(udc->vbus_pin)) {
2013 free_irq(gpio_to_irq(udc->vbus_pin), udc);
2014 gpio_free(udc->vbus_pin);
2015 }
2016
2017 free_irq(udc->irq, udc);
2018 kfree(usba_ep);
2019 iounmap(udc->fifo);
2020 iounmap(udc->regs);
2021 clk_put(udc->hclk);
2022 clk_put(udc->pclk);
2023
2024 return 0;
2025 }
2026
2027 static struct platform_driver udc_driver = {
2028 .remove = __exit_p(usba_udc_remove),
2029 .driver = {
2030 .name = "atmel_usba_udc",
2031 .owner = THIS_MODULE,
2032 },
2033 };
2034
2035 module_platform_driver_probe(udc_driver, usba_udc_probe);
2036
2037 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2038 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2039 MODULE_LICENSE("GPL");
2040 MODULE_ALIAS("platform:atmel_usba_udc");
2041