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1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16  * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
17  *
18  * Intel documents this fairly well, and as far as I know there
19  * are no royalties or anything like that, but even so there are
20  * people who decided that they want to do the same thing in a
21  * completely different way.
22  *
23  */
24 
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kernel.h>
28 #include <linux/init.h>
29 #include <linux/delay.h>
30 #include <linux/ioport.h>
31 #include <linux/slab.h>
32 #include <linux/errno.h>
33 #include <linux/unistd.h>
34 #include <linux/interrupt.h>
35 #include <linux/spinlock.h>
36 #include <linux/debugfs.h>
37 #include <linux/pm.h>
38 #include <linux/dmapool.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/usb.h>
41 #include <linux/usb/hcd.h>
42 #include <linux/bitops.h>
43 #include <linux/dmi.h>
44 
45 #include <asm/uaccess.h>
46 #include <asm/io.h>
47 #include <asm/irq.h>
48 
49 #include "uhci-hcd.h"
50 
51 /*
52  * Version Information
53  */
54 #define DRIVER_AUTHOR							\
55 	"Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, "		\
56 	"Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, "	\
57 	"Roman Weissgaerber, Alan Stern"
58 #define DRIVER_DESC "USB Universal Host Controller Interface driver"
59 
60 /* for flakey hardware, ignore overcurrent indicators */
61 static bool ignore_oc;
62 module_param(ignore_oc, bool, S_IRUGO);
63 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications");
64 
65 /*
66  * debug = 0, no debugging messages
67  * debug = 1, dump failed URBs except for stalls
68  * debug = 2, dump all failed URBs (including stalls)
69  *            show all queues in /sys/kernel/debug/uhci/[pci_addr]
70  * debug = 3, show all TDs in URBs when dumping
71  */
72 #ifdef DEBUG
73 #define DEBUG_CONFIGURED	1
74 static int debug = 1;
75 module_param(debug, int, S_IRUGO | S_IWUSR);
76 MODULE_PARM_DESC(debug, "Debug level");
77 
78 #else
79 #define DEBUG_CONFIGURED	0
80 #define debug			0
81 #endif
82 
83 static char *errbuf;
84 #define ERRBUF_LEN    (32 * 1024)
85 
86 static struct kmem_cache *uhci_up_cachep;	/* urb_priv */
87 
88 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state);
89 static void wakeup_rh(struct uhci_hcd *uhci);
90 static void uhci_get_current_frame_number(struct uhci_hcd *uhci);
91 
92 /*
93  * Calculate the link pointer DMA value for the first Skeleton QH in a frame.
94  */
uhci_frame_skel_link(struct uhci_hcd * uhci,int frame)95 static __hc32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame)
96 {
97 	int skelnum;
98 
99 	/*
100 	 * The interrupt queues will be interleaved as evenly as possible.
101 	 * There's not much to be done about period-1 interrupts; they have
102 	 * to occur in every frame.  But we can schedule period-2 interrupts
103 	 * in odd-numbered frames, period-4 interrupts in frames congruent
104 	 * to 2 (mod 4), and so on.  This way each frame only has two
105 	 * interrupt QHs, which will help spread out bandwidth utilization.
106 	 *
107 	 * ffs (Find First bit Set) does exactly what we need:
108 	 * 1,3,5,...  => ffs = 0 => use period-2 QH = skelqh[8],
109 	 * 2,6,10,... => ffs = 1 => use period-4 QH = skelqh[7], etc.
110 	 * ffs >= 7 => not on any high-period queue, so use
111 	 *	period-1 QH = skelqh[9].
112 	 * Add in UHCI_NUMFRAMES to insure at least one bit is set.
113 	 */
114 	skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES);
115 	if (skelnum <= 1)
116 		skelnum = 9;
117 	return LINK_TO_QH(uhci, uhci->skelqh[skelnum]);
118 }
119 
120 #include "uhci-debug.c"
121 #include "uhci-q.c"
122 #include "uhci-hub.c"
123 
124 /*
125  * Finish up a host controller reset and update the recorded state.
126  */
finish_reset(struct uhci_hcd * uhci)127 static void finish_reset(struct uhci_hcd *uhci)
128 {
129 	int port;
130 
131 	/* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
132 	 * bits in the port status and control registers.
133 	 * We have to clear them by hand.
134 	 */
135 	for (port = 0; port < uhci->rh_numports; ++port)
136 		uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
137 
138 	uhci->port_c_suspend = uhci->resuming_ports = 0;
139 	uhci->rh_state = UHCI_RH_RESET;
140 	uhci->is_stopped = UHCI_IS_STOPPED;
141 	clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
142 }
143 
144 /*
145  * Last rites for a defunct/nonfunctional controller
146  * or one we don't want to use any more.
147  */
uhci_hc_died(struct uhci_hcd * uhci)148 static void uhci_hc_died(struct uhci_hcd *uhci)
149 {
150 	uhci_get_current_frame_number(uhci);
151 	uhci->reset_hc(uhci);
152 	finish_reset(uhci);
153 	uhci->dead = 1;
154 
155 	/* The current frame may already be partway finished */
156 	++uhci->frame_number;
157 }
158 
159 /*
160  * Initialize a controller that was newly discovered or has lost power
161  * or otherwise been reset while it was suspended.  In none of these cases
162  * can we be sure of its previous state.
163  */
check_and_reset_hc(struct uhci_hcd * uhci)164 static void check_and_reset_hc(struct uhci_hcd *uhci)
165 {
166 	if (uhci->check_and_reset_hc(uhci))
167 		finish_reset(uhci);
168 }
169 
170 #if defined(CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC)
171 /*
172  * The two functions below are generic reset functions that are used on systems
173  * that do not have keyboard and mouse legacy support. We assume that we are
174  * running on such a system if CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC is defined.
175  */
176 
177 /*
178  * Make sure the controller is completely inactive, unable to
179  * generate interrupts or do DMA.
180  */
uhci_generic_reset_hc(struct uhci_hcd * uhci)181 static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
182 {
183 	/* Reset the HC - this will force us to get a
184 	 * new notification of any already connected
185 	 * ports due to the virtual disconnect that it
186 	 * implies.
187 	 */
188 	uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
189 	mb();
190 	udelay(5);
191 	if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
192 		dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
193 
194 	/* Just to be safe, disable interrupt requests and
195 	 * make sure the controller is stopped.
196 	 */
197 	uhci_writew(uhci, 0, USBINTR);
198 	uhci_writew(uhci, 0, USBCMD);
199 }
200 
201 /*
202  * Initialize a controller that was newly discovered or has just been
203  * resumed.  In either case we can't be sure of its previous state.
204  *
205  * Returns: 1 if the controller was reset, 0 otherwise.
206  */
uhci_generic_check_and_reset_hc(struct uhci_hcd * uhci)207 static int uhci_generic_check_and_reset_hc(struct uhci_hcd *uhci)
208 {
209 	unsigned int cmd, intr;
210 
211 	/*
212 	 * When restarting a suspended controller, we expect all the
213 	 * settings to be the same as we left them:
214 	 *
215 	 *	Controller is stopped and configured with EGSM set;
216 	 *	No interrupts enabled except possibly Resume Detect.
217 	 *
218 	 * If any of these conditions are violated we do a complete reset.
219 	 */
220 
221 	cmd = uhci_readw(uhci, USBCMD);
222 	if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) {
223 		dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n",
224 				__func__, cmd);
225 		goto reset_needed;
226 	}
227 
228 	intr = uhci_readw(uhci, USBINTR);
229 	if (intr & (~USBINTR_RESUME)) {
230 		dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n",
231 				__func__, intr);
232 		goto reset_needed;
233 	}
234 	return 0;
235 
236 reset_needed:
237 	dev_dbg(uhci_dev(uhci), "Performing full reset\n");
238 	uhci_generic_reset_hc(uhci);
239 	return 1;
240 }
241 #endif /* CONFIG_USB_UHCI_SUPPORT_NON_PCI_HC */
242 
243 /*
244  * Store the basic register settings needed by the controller.
245  */
configure_hc(struct uhci_hcd * uhci)246 static void configure_hc(struct uhci_hcd *uhci)
247 {
248 	/* Set the frame length to the default: 1 ms exactly */
249 	uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
250 
251 	/* Store the frame list base address */
252 	uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
253 
254 	/* Set the current frame number */
255 	uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
256 			USBFRNUM);
257 
258 	/* perform any arch/bus specific configuration */
259 	if (uhci->configure_hc)
260 		uhci->configure_hc(uhci);
261 }
262 
resume_detect_interrupts_are_broken(struct uhci_hcd * uhci)263 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci)
264 {
265 	/* If we have to ignore overcurrent events then almost by definition
266 	 * we can't depend on resume-detect interrupts. */
267 	if (ignore_oc)
268 		return 1;
269 
270 	return uhci->resume_detect_interrupts_are_broken ?
271 		uhci->resume_detect_interrupts_are_broken(uhci) : 0;
272 }
273 
global_suspend_mode_is_broken(struct uhci_hcd * uhci)274 static int global_suspend_mode_is_broken(struct uhci_hcd *uhci)
275 {
276 	return uhci->global_suspend_mode_is_broken ?
277 		uhci->global_suspend_mode_is_broken(uhci) : 0;
278 }
279 
suspend_rh(struct uhci_hcd * uhci,enum uhci_rh_state new_state)280 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state)
281 __releases(uhci->lock)
282 __acquires(uhci->lock)
283 {
284 	int auto_stop;
285 	int int_enable, egsm_enable, wakeup_enable;
286 	struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub;
287 
288 	auto_stop = (new_state == UHCI_RH_AUTO_STOPPED);
289 	dev_dbg(&rhdev->dev, "%s%s\n", __func__,
290 			(auto_stop ? " (auto-stop)" : ""));
291 
292 	/* Start off by assuming Resume-Detect interrupts and EGSM work
293 	 * and that remote wakeups should be enabled.
294 	 */
295 	egsm_enable = USBCMD_EGSM;
296 	int_enable = USBINTR_RESUME;
297 	wakeup_enable = 1;
298 
299 	/*
300 	 * In auto-stop mode, we must be able to detect new connections.
301 	 * The user can force us to poll by disabling remote wakeup;
302 	 * otherwise we will use the EGSM/RD mechanism.
303 	 */
304 	if (auto_stop) {
305 		if (!device_may_wakeup(&rhdev->dev))
306 			egsm_enable = int_enable = 0;
307 	}
308 
309 #ifdef CONFIG_PM
310 	/*
311 	 * In bus-suspend mode, we use the wakeup setting specified
312 	 * for the root hub.
313 	 */
314 	else {
315 		if (!rhdev->do_remote_wakeup)
316 			wakeup_enable = 0;
317 	}
318 #endif
319 
320 	/*
321 	 * UHCI doesn't distinguish between wakeup requests from downstream
322 	 * devices and local connect/disconnect events.  There's no way to
323 	 * enable one without the other; both are controlled by EGSM.  Thus
324 	 * if wakeups are disallowed then EGSM must be turned off -- in which
325 	 * case remote wakeup requests from downstream during system sleep
326 	 * will be lost.
327 	 *
328 	 * In addition, if EGSM is broken then we can't use it.  Likewise,
329 	 * if Resume-Detect interrupts are broken then we can't use them.
330 	 *
331 	 * Finally, neither EGSM nor RD is useful by itself.  Without EGSM,
332 	 * the RD status bit will never get set.  Without RD, the controller
333 	 * won't generate interrupts to tell the system about wakeup events.
334 	 */
335 	if (!wakeup_enable || global_suspend_mode_is_broken(uhci) ||
336 			resume_detect_interrupts_are_broken(uhci))
337 		egsm_enable = int_enable = 0;
338 
339 	uhci->RD_enable = !!int_enable;
340 	uhci_writew(uhci, int_enable, USBINTR);
341 	uhci_writew(uhci, egsm_enable | USBCMD_CF, USBCMD);
342 	mb();
343 	udelay(5);
344 
345 	/* If we're auto-stopping then no devices have been attached
346 	 * for a while, so there shouldn't be any active URBs and the
347 	 * controller should stop after a few microseconds.  Otherwise
348 	 * we will give the controller one frame to stop.
349 	 */
350 	if (!auto_stop && !(uhci_readw(uhci, USBSTS) & USBSTS_HCH)) {
351 		uhci->rh_state = UHCI_RH_SUSPENDING;
352 		spin_unlock_irq(&uhci->lock);
353 		msleep(1);
354 		spin_lock_irq(&uhci->lock);
355 		if (uhci->dead)
356 			return;
357 	}
358 	if (!(uhci_readw(uhci, USBSTS) & USBSTS_HCH))
359 		dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n");
360 
361 	uhci_get_current_frame_number(uhci);
362 
363 	uhci->rh_state = new_state;
364 	uhci->is_stopped = UHCI_IS_STOPPED;
365 
366 	/*
367 	 * If remote wakeup is enabled but either EGSM or RD interrupts
368 	 * doesn't work, then we won't get an interrupt when a wakeup event
369 	 * occurs.  Thus the suspended root hub needs to be polled.
370 	 */
371 	if (wakeup_enable && (!int_enable || !egsm_enable))
372 		set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
373 	else
374 		clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
375 
376 	uhci_scan_schedule(uhci);
377 	uhci_fsbr_off(uhci);
378 }
379 
start_rh(struct uhci_hcd * uhci)380 static void start_rh(struct uhci_hcd *uhci)
381 {
382 	uhci->is_stopped = 0;
383 
384 	/* Mark it configured and running with a 64-byte max packet.
385 	 * All interrupts are enabled, even though RESUME won't do anything.
386 	 */
387 	uhci_writew(uhci, USBCMD_RS | USBCMD_CF | USBCMD_MAXP, USBCMD);
388 	uhci_writew(uhci, USBINTR_TIMEOUT | USBINTR_RESUME |
389 		USBINTR_IOC | USBINTR_SP, USBINTR);
390 	mb();
391 	uhci->rh_state = UHCI_RH_RUNNING;
392 	set_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
393 }
394 
wakeup_rh(struct uhci_hcd * uhci)395 static void wakeup_rh(struct uhci_hcd *uhci)
396 __releases(uhci->lock)
397 __acquires(uhci->lock)
398 {
399 	dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev,
400 			"%s%s\n", __func__,
401 			uhci->rh_state == UHCI_RH_AUTO_STOPPED ?
402 				" (auto-start)" : "");
403 
404 	/* If we are auto-stopped then no devices are attached so there's
405 	 * no need for wakeup signals.  Otherwise we send Global Resume
406 	 * for 20 ms.
407 	 */
408 	if (uhci->rh_state == UHCI_RH_SUSPENDED) {
409 		unsigned egsm;
410 
411 		/* Keep EGSM on if it was set before */
412 		egsm = uhci_readw(uhci, USBCMD) & USBCMD_EGSM;
413 		uhci->rh_state = UHCI_RH_RESUMING;
414 		uhci_writew(uhci, USBCMD_FGR | USBCMD_CF | egsm, USBCMD);
415 		spin_unlock_irq(&uhci->lock);
416 		msleep(20);
417 		spin_lock_irq(&uhci->lock);
418 		if (uhci->dead)
419 			return;
420 
421 		/* End Global Resume and wait for EOP to be sent */
422 		uhci_writew(uhci, USBCMD_CF, USBCMD);
423 		mb();
424 		udelay(4);
425 		if (uhci_readw(uhci, USBCMD) & USBCMD_FGR)
426 			dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n");
427 	}
428 
429 	start_rh(uhci);
430 
431 	/* Restart root hub polling */
432 	mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
433 }
434 
uhci_irq(struct usb_hcd * hcd)435 static irqreturn_t uhci_irq(struct usb_hcd *hcd)
436 {
437 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
438 	unsigned short status;
439 
440 	/*
441 	 * Read the interrupt status, and write it back to clear the
442 	 * interrupt cause.  Contrary to the UHCI specification, the
443 	 * "HC Halted" status bit is persistent: it is RO, not R/WC.
444 	 */
445 	status = uhci_readw(uhci, USBSTS);
446 	if (!(status & ~USBSTS_HCH))	/* shared interrupt, not mine */
447 		return IRQ_NONE;
448 	uhci_writew(uhci, status, USBSTS);		/* Clear it */
449 
450 	spin_lock(&uhci->lock);
451 	if (unlikely(!uhci->is_initialized))	/* not yet configured */
452 		goto done;
453 
454 	if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) {
455 		if (status & USBSTS_HSE)
456 			dev_err(uhci_dev(uhci),
457 				"host system error, PCI problems?\n");
458 		if (status & USBSTS_HCPE)
459 			dev_err(uhci_dev(uhci),
460 				"host controller process error, something bad happened!\n");
461 		if (status & USBSTS_HCH) {
462 			if (uhci->rh_state >= UHCI_RH_RUNNING) {
463 				dev_err(uhci_dev(uhci),
464 					"host controller halted, very bad!\n");
465 				if (debug > 1 && errbuf) {
466 					/* Print the schedule for debugging */
467 					uhci_sprint_schedule(uhci, errbuf,
468 						ERRBUF_LEN - EXTRA_SPACE);
469 					lprintk(errbuf);
470 				}
471 				uhci_hc_died(uhci);
472 				usb_hc_died(hcd);
473 
474 				/* Force a callback in case there are
475 				 * pending unlinks */
476 				mod_timer(&hcd->rh_timer, jiffies);
477 			}
478 		}
479 	}
480 
481 	if (status & USBSTS_RD) {
482 		spin_unlock(&uhci->lock);
483 		usb_hcd_poll_rh_status(hcd);
484 	} else {
485 		uhci_scan_schedule(uhci);
486  done:
487 		spin_unlock(&uhci->lock);
488 	}
489 
490 	return IRQ_HANDLED;
491 }
492 
493 /*
494  * Store the current frame number in uhci->frame_number if the controller
495  * is running.  Expand from 11 bits (of which we use only 10) to a
496  * full-sized integer.
497  *
498  * Like many other parts of the driver, this code relies on being polled
499  * more than once per second as long as the controller is running.
500  */
uhci_get_current_frame_number(struct uhci_hcd * uhci)501 static void uhci_get_current_frame_number(struct uhci_hcd *uhci)
502 {
503 	if (!uhci->is_stopped) {
504 		unsigned delta;
505 
506 		delta = (uhci_readw(uhci, USBFRNUM) - uhci->frame_number) &
507 				(UHCI_NUMFRAMES - 1);
508 		uhci->frame_number += delta;
509 	}
510 }
511 
512 /*
513  * De-allocate all resources
514  */
release_uhci(struct uhci_hcd * uhci)515 static void release_uhci(struct uhci_hcd *uhci)
516 {
517 	int i;
518 
519 	if (DEBUG_CONFIGURED) {
520 		spin_lock_irq(&uhci->lock);
521 		uhci->is_initialized = 0;
522 		spin_unlock_irq(&uhci->lock);
523 
524 		debugfs_remove(uhci->dentry);
525 	}
526 
527 	for (i = 0; i < UHCI_NUM_SKELQH; i++)
528 		uhci_free_qh(uhci, uhci->skelqh[i]);
529 
530 	uhci_free_td(uhci, uhci->term_td);
531 
532 	dma_pool_destroy(uhci->qh_pool);
533 
534 	dma_pool_destroy(uhci->td_pool);
535 
536 	kfree(uhci->frame_cpu);
537 
538 	dma_free_coherent(uhci_dev(uhci),
539 			UHCI_NUMFRAMES * sizeof(*uhci->frame),
540 			uhci->frame, uhci->frame_dma_handle);
541 }
542 
543 /*
544  * Allocate a frame list, and then setup the skeleton
545  *
546  * The hardware doesn't really know any difference
547  * in the queues, but the order does matter for the
548  * protocols higher up.  The order in which the queues
549  * are encountered by the hardware is:
550  *
551  *  - All isochronous events are handled before any
552  *    of the queues. We don't do that here, because
553  *    we'll create the actual TD entries on demand.
554  *  - The first queue is the high-period interrupt queue.
555  *  - The second queue is the period-1 interrupt and async
556  *    (low-speed control, full-speed control, then bulk) queue.
557  *  - The third queue is the terminating bandwidth reclamation queue,
558  *    which contains no members, loops back to itself, and is present
559  *    only when FSBR is on and there are no full-speed control or bulk QHs.
560  */
uhci_start(struct usb_hcd * hcd)561 static int uhci_start(struct usb_hcd *hcd)
562 {
563 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
564 	int retval = -EBUSY;
565 	int i;
566 	struct dentry __maybe_unused *dentry;
567 
568 	hcd->uses_new_polling = 1;
569 	/* Accept arbitrarily long scatter-gather lists */
570 	if (!(hcd->driver->flags & HCD_LOCAL_MEM))
571 		hcd->self.sg_tablesize = ~0;
572 
573 	spin_lock_init(&uhci->lock);
574 	setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout,
575 			(unsigned long) uhci);
576 	INIT_LIST_HEAD(&uhci->idle_qh_list);
577 	init_waitqueue_head(&uhci->waitqh);
578 
579 #ifdef UHCI_DEBUG_OPS
580 	dentry = debugfs_create_file(hcd->self.bus_name,
581 			S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root,
582 			uhci, &uhci_debug_operations);
583 	if (!dentry) {
584 		dev_err(uhci_dev(uhci), "couldn't create uhci debugfs entry\n");
585 		return -ENOMEM;
586 	}
587 	uhci->dentry = dentry;
588 #endif
589 
590 	uhci->frame = dma_alloc_coherent(uhci_dev(uhci),
591 			UHCI_NUMFRAMES * sizeof(*uhci->frame),
592 			&uhci->frame_dma_handle, 0);
593 	if (!uhci->frame) {
594 		dev_err(uhci_dev(uhci),
595 			"unable to allocate consistent memory for frame list\n");
596 		goto err_alloc_frame;
597 	}
598 	memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame));
599 
600 	uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu),
601 			GFP_KERNEL);
602 	if (!uhci->frame_cpu) {
603 		dev_err(uhci_dev(uhci),
604 			"unable to allocate memory for frame pointers\n");
605 		goto err_alloc_frame_cpu;
606 	}
607 
608 	uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci),
609 			sizeof(struct uhci_td), 16, 0);
610 	if (!uhci->td_pool) {
611 		dev_err(uhci_dev(uhci), "unable to create td dma_pool\n");
612 		goto err_create_td_pool;
613 	}
614 
615 	uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci),
616 			sizeof(struct uhci_qh), 16, 0);
617 	if (!uhci->qh_pool) {
618 		dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n");
619 		goto err_create_qh_pool;
620 	}
621 
622 	uhci->term_td = uhci_alloc_td(uhci);
623 	if (!uhci->term_td) {
624 		dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n");
625 		goto err_alloc_term_td;
626 	}
627 
628 	for (i = 0; i < UHCI_NUM_SKELQH; i++) {
629 		uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL);
630 		if (!uhci->skelqh[i]) {
631 			dev_err(uhci_dev(uhci), "unable to allocate QH\n");
632 			goto err_alloc_skelqh;
633 		}
634 	}
635 
636 	/*
637 	 * 8 Interrupt queues; link all higher int queues to int1 = async
638 	 */
639 	for (i = SKEL_ISO + 1; i < SKEL_ASYNC; ++i)
640 		uhci->skelqh[i]->link = LINK_TO_QH(uhci, uhci->skel_async_qh);
641 	uhci->skel_async_qh->link = UHCI_PTR_TERM(uhci);
642 	uhci->skel_term_qh->link = LINK_TO_QH(uhci, uhci->skel_term_qh);
643 
644 	/* This dummy TD is to work around a bug in Intel PIIX controllers */
645 	uhci_fill_td(uhci, uhci->term_td, 0, uhci_explen(0) |
646 			(0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0);
647 	uhci->term_td->link = UHCI_PTR_TERM(uhci);
648 	uhci->skel_async_qh->element = uhci->skel_term_qh->element =
649 		LINK_TO_TD(uhci, uhci->term_td);
650 
651 	/*
652 	 * Fill the frame list: make all entries point to the proper
653 	 * interrupt queue.
654 	 */
655 	for (i = 0; i < UHCI_NUMFRAMES; i++) {
656 
657 		/* Only place we don't use the frame list routines */
658 		uhci->frame[i] = uhci_frame_skel_link(uhci, i);
659 	}
660 
661 	/*
662 	 * Some architectures require a full mb() to enforce completion of
663 	 * the memory writes above before the I/O transfers in configure_hc().
664 	 */
665 	mb();
666 
667 	spin_lock_irq(&uhci->lock);
668 	configure_hc(uhci);
669 	uhci->is_initialized = 1;
670 	start_rh(uhci);
671 	spin_unlock_irq(&uhci->lock);
672 	return 0;
673 
674 /*
675  * error exits:
676  */
677 err_alloc_skelqh:
678 	for (i = 0; i < UHCI_NUM_SKELQH; i++) {
679 		if (uhci->skelqh[i])
680 			uhci_free_qh(uhci, uhci->skelqh[i]);
681 	}
682 
683 	uhci_free_td(uhci, uhci->term_td);
684 
685 err_alloc_term_td:
686 	dma_pool_destroy(uhci->qh_pool);
687 
688 err_create_qh_pool:
689 	dma_pool_destroy(uhci->td_pool);
690 
691 err_create_td_pool:
692 	kfree(uhci->frame_cpu);
693 
694 err_alloc_frame_cpu:
695 	dma_free_coherent(uhci_dev(uhci),
696 			UHCI_NUMFRAMES * sizeof(*uhci->frame),
697 			uhci->frame, uhci->frame_dma_handle);
698 
699 err_alloc_frame:
700 	debugfs_remove(uhci->dentry);
701 
702 	return retval;
703 }
704 
uhci_stop(struct usb_hcd * hcd)705 static void uhci_stop(struct usb_hcd *hcd)
706 {
707 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
708 
709 	spin_lock_irq(&uhci->lock);
710 	if (HCD_HW_ACCESSIBLE(hcd) && !uhci->dead)
711 		uhci_hc_died(uhci);
712 	uhci_scan_schedule(uhci);
713 	spin_unlock_irq(&uhci->lock);
714 	synchronize_irq(hcd->irq);
715 
716 	del_timer_sync(&uhci->fsbr_timer);
717 	release_uhci(uhci);
718 }
719 
720 #ifdef CONFIG_PM
uhci_rh_suspend(struct usb_hcd * hcd)721 static int uhci_rh_suspend(struct usb_hcd *hcd)
722 {
723 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
724 	int rc = 0;
725 
726 	spin_lock_irq(&uhci->lock);
727 	if (!HCD_HW_ACCESSIBLE(hcd))
728 		rc = -ESHUTDOWN;
729 	else if (uhci->dead)
730 		;		/* Dead controllers tell no tales */
731 
732 	/* Once the controller is stopped, port resumes that are already
733 	 * in progress won't complete.  Hence if remote wakeup is enabled
734 	 * for the root hub and any ports are in the middle of a resume or
735 	 * remote wakeup, we must fail the suspend.
736 	 */
737 	else if (hcd->self.root_hub->do_remote_wakeup &&
738 			uhci->resuming_ports) {
739 		dev_dbg(uhci_dev(uhci),
740 			"suspend failed because a port is resuming\n");
741 		rc = -EBUSY;
742 	} else
743 		suspend_rh(uhci, UHCI_RH_SUSPENDED);
744 	spin_unlock_irq(&uhci->lock);
745 	return rc;
746 }
747 
uhci_rh_resume(struct usb_hcd * hcd)748 static int uhci_rh_resume(struct usb_hcd *hcd)
749 {
750 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
751 	int rc = 0;
752 
753 	spin_lock_irq(&uhci->lock);
754 	if (!HCD_HW_ACCESSIBLE(hcd))
755 		rc = -ESHUTDOWN;
756 	else if (!uhci->dead)
757 		wakeup_rh(uhci);
758 	spin_unlock_irq(&uhci->lock);
759 	return rc;
760 }
761 
762 #endif
763 
764 /* Wait until a particular device/endpoint's QH is idle, and free it */
uhci_hcd_endpoint_disable(struct usb_hcd * hcd,struct usb_host_endpoint * hep)765 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd,
766 		struct usb_host_endpoint *hep)
767 {
768 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
769 	struct uhci_qh *qh;
770 
771 	spin_lock_irq(&uhci->lock);
772 	qh = (struct uhci_qh *) hep->hcpriv;
773 	if (qh == NULL)
774 		goto done;
775 
776 	while (qh->state != QH_STATE_IDLE) {
777 		++uhci->num_waiting;
778 		spin_unlock_irq(&uhci->lock);
779 		wait_event_interruptible(uhci->waitqh,
780 				qh->state == QH_STATE_IDLE);
781 		spin_lock_irq(&uhci->lock);
782 		--uhci->num_waiting;
783 	}
784 
785 	uhci_free_qh(uhci, qh);
786 done:
787 	spin_unlock_irq(&uhci->lock);
788 }
789 
uhci_hcd_get_frame_number(struct usb_hcd * hcd)790 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd)
791 {
792 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
793 	unsigned frame_number;
794 	unsigned delta;
795 
796 	/* Minimize latency by avoiding the spinlock */
797 	frame_number = uhci->frame_number;
798 	barrier();
799 	delta = (uhci_readw(uhci, USBFRNUM) - frame_number) &
800 			(UHCI_NUMFRAMES - 1);
801 	return frame_number + delta;
802 }
803 
804 /* Determines number of ports on controller */
uhci_count_ports(struct usb_hcd * hcd)805 static int uhci_count_ports(struct usb_hcd *hcd)
806 {
807 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
808 	unsigned io_size = (unsigned) hcd->rsrc_len;
809 	int port;
810 
811 	/* The UHCI spec says devices must have 2 ports, and goes on to say
812 	 * they may have more but gives no way to determine how many there
813 	 * are.  However according to the UHCI spec, Bit 7 of the port
814 	 * status and control register is always set to 1.  So we try to
815 	 * use this to our advantage.  Another common failure mode when
816 	 * a nonexistent register is addressed is to return all ones, so
817 	 * we test for that also.
818 	 */
819 	for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) {
820 		unsigned int portstatus;
821 
822 		portstatus = uhci_readw(uhci, USBPORTSC1 + (port * 2));
823 		if (!(portstatus & 0x0080) || portstatus == 0xffff)
824 			break;
825 	}
826 	if (debug)
827 		dev_info(uhci_dev(uhci), "detected %d ports\n", port);
828 
829 	/* Anything greater than 7 is weird so we'll ignore it. */
830 	if (port > UHCI_RH_MAXCHILD) {
831 		dev_info(uhci_dev(uhci),
832 			"port count misdetected? forcing to 2 ports\n");
833 		port = 2;
834 	}
835 
836 	return port;
837 }
838 
839 static const char hcd_name[] = "uhci_hcd";
840 
841 #ifdef CONFIG_PCI
842 #include "uhci-pci.c"
843 #define	PCI_DRIVER		uhci_pci_driver
844 #endif
845 
846 #ifdef CONFIG_SPARC_LEON
847 #include "uhci-grlib.c"
848 #define PLATFORM_DRIVER		uhci_grlib_driver
849 #endif
850 
851 #ifdef CONFIG_USB_UHCI_PLATFORM
852 #include "uhci-platform.c"
853 #define PLATFORM_DRIVER		uhci_platform_driver
854 #endif
855 
856 #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER)
857 #error "missing bus glue for uhci-hcd"
858 #endif
859 
uhci_hcd_init(void)860 static int __init uhci_hcd_init(void)
861 {
862 	int retval = -ENOMEM;
863 
864 	if (usb_disabled())
865 		return -ENODEV;
866 
867 	printk(KERN_INFO "uhci_hcd: " DRIVER_DESC "%s\n",
868 			ignore_oc ? ", overcurrent ignored" : "");
869 	set_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
870 
871 	if (DEBUG_CONFIGURED) {
872 		errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL);
873 		if (!errbuf)
874 			goto errbuf_failed;
875 		uhci_debugfs_root = debugfs_create_dir("uhci", usb_debug_root);
876 		if (!uhci_debugfs_root)
877 			goto debug_failed;
878 	}
879 
880 	uhci_up_cachep = kmem_cache_create("uhci_urb_priv",
881 		sizeof(struct urb_priv), 0, 0, NULL);
882 	if (!uhci_up_cachep)
883 		goto up_failed;
884 
885 #ifdef PLATFORM_DRIVER
886 	retval = platform_driver_register(&PLATFORM_DRIVER);
887 	if (retval < 0)
888 		goto clean0;
889 #endif
890 
891 #ifdef PCI_DRIVER
892 	retval = pci_register_driver(&PCI_DRIVER);
893 	if (retval < 0)
894 		goto clean1;
895 #endif
896 
897 	return 0;
898 
899 #ifdef PCI_DRIVER
900 clean1:
901 #endif
902 #ifdef PLATFORM_DRIVER
903 	platform_driver_unregister(&PLATFORM_DRIVER);
904 clean0:
905 #endif
906 	kmem_cache_destroy(uhci_up_cachep);
907 
908 up_failed:
909 	debugfs_remove(uhci_debugfs_root);
910 
911 debug_failed:
912 	kfree(errbuf);
913 
914 errbuf_failed:
915 
916 	clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
917 	return retval;
918 }
919 
uhci_hcd_cleanup(void)920 static void __exit uhci_hcd_cleanup(void)
921 {
922 #ifdef PLATFORM_DRIVER
923 	platform_driver_unregister(&PLATFORM_DRIVER);
924 #endif
925 #ifdef PCI_DRIVER
926 	pci_unregister_driver(&PCI_DRIVER);
927 #endif
928 	kmem_cache_destroy(uhci_up_cachep);
929 	debugfs_remove(uhci_debugfs_root);
930 	kfree(errbuf);
931 	clear_bit(USB_UHCI_LOADED, &usb_hcds_loaded);
932 }
933 
934 module_init(uhci_hcd_init);
935 module_exit(uhci_hcd_cleanup);
936 
937 MODULE_AUTHOR(DRIVER_AUTHOR);
938 MODULE_DESCRIPTION(DRIVER_DESC);
939 MODULE_LICENSE("GPL");
940