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1 /*
2  * LCD panel driver for TPO TD043MTEA1
3  *
4  * Author: Gražvydas Ignotas <notasas@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  */
11 
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/gpio.h>
17 #include <linux/err.h>
18 #include <linux/slab.h>
19 
20 #include <video/omapdss.h>
21 #include <video/omap-panel-data.h>
22 
23 #define TPO_R02_MODE(x)		((x) & 7)
24 #define TPO_R02_MODE_800x480	7
25 #define TPO_R02_NCLK_RISING	BIT(3)
26 #define TPO_R02_HSYNC_HIGH	BIT(4)
27 #define TPO_R02_VSYNC_HIGH	BIT(5)
28 
29 #define TPO_R03_NSTANDBY	BIT(0)
30 #define TPO_R03_EN_CP_CLK	BIT(1)
31 #define TPO_R03_EN_VGL_PUMP	BIT(2)
32 #define TPO_R03_EN_PWM		BIT(3)
33 #define TPO_R03_DRIVING_CAP_100	BIT(4)
34 #define TPO_R03_EN_PRE_CHARGE	BIT(6)
35 #define TPO_R03_SOFTWARE_CTL	BIT(7)
36 
37 #define TPO_R04_NFLIP_H		BIT(0)
38 #define TPO_R04_NFLIP_V		BIT(1)
39 #define TPO_R04_CP_CLK_FREQ_1H	BIT(2)
40 #define TPO_R04_VGL_FREQ_1H	BIT(4)
41 
42 #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
43 			TPO_R03_EN_VGL_PUMP |  TPO_R03_EN_PWM | \
44 			TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
45 			TPO_R03_SOFTWARE_CTL)
46 
47 #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
48 			TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
49 
50 static const u16 tpo_td043_def_gamma[12] = {
51 	105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
52 };
53 
54 struct tpo_td043_device {
55 	struct spi_device *spi;
56 	struct regulator *vcc_reg;
57 	int nreset_gpio;
58 	u16 gamma[12];
59 	u32 mode;
60 	u32 hmirror:1;
61 	u32 vmirror:1;
62 	u32 powered_on:1;
63 	u32 spi_suspended:1;
64 	u32 power_on_resume:1;
65 };
66 
67 /* used to pass spi_device from SPI to DSS portion of the driver */
68 static struct tpo_td043_device *g_tpo_td043;
69 
tpo_td043_write(struct spi_device * spi,u8 addr,u8 data)70 static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
71 {
72 	struct spi_message	m;
73 	struct spi_transfer	xfer;
74 	u16			w;
75 	int			r;
76 
77 	spi_message_init(&m);
78 
79 	memset(&xfer, 0, sizeof(xfer));
80 
81 	w = ((u16)addr << 10) | (1 << 8) | data;
82 	xfer.tx_buf = &w;
83 	xfer.bits_per_word = 16;
84 	xfer.len = 2;
85 	spi_message_add_tail(&xfer, &m);
86 
87 	r = spi_sync(spi, &m);
88 	if (r < 0)
89 		dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
90 	return r;
91 }
92 
tpo_td043_write_gamma(struct spi_device * spi,u16 gamma[12])93 static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
94 {
95 	u8 i, val;
96 
97 	/* gamma bits [9:8] */
98 	for (val = i = 0; i < 4; i++)
99 		val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
100 	tpo_td043_write(spi, 0x11, val);
101 
102 	for (val = i = 0; i < 4; i++)
103 		val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
104 	tpo_td043_write(spi, 0x12, val);
105 
106 	for (val = i = 0; i < 4; i++)
107 		val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
108 	tpo_td043_write(spi, 0x13, val);
109 
110 	/* gamma bits [7:0] */
111 	for (val = i = 0; i < 12; i++)
112 		tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
113 }
114 
tpo_td043_write_mirror(struct spi_device * spi,bool h,bool v)115 static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
116 {
117 	u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
118 		TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
119 	if (h)
120 		reg4 &= ~TPO_R04_NFLIP_H;
121 	if (v)
122 		reg4 &= ~TPO_R04_NFLIP_V;
123 
124 	return tpo_td043_write(spi, 4, reg4);
125 }
126 
tpo_td043_set_hmirror(struct omap_dss_device * dssdev,bool enable)127 static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
128 {
129 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
130 
131 	tpo_td043->hmirror = enable;
132 	return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
133 			tpo_td043->vmirror);
134 }
135 
tpo_td043_get_hmirror(struct omap_dss_device * dssdev)136 static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
137 {
138 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
139 
140 	return tpo_td043->hmirror;
141 }
142 
tpo_td043_vmirror_show(struct device * dev,struct device_attribute * attr,char * buf)143 static ssize_t tpo_td043_vmirror_show(struct device *dev,
144 	struct device_attribute *attr, char *buf)
145 {
146 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
147 
148 	return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
149 }
150 
tpo_td043_vmirror_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)151 static ssize_t tpo_td043_vmirror_store(struct device *dev,
152 	struct device_attribute *attr, const char *buf, size_t count)
153 {
154 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
155 	int val;
156 	int ret;
157 
158 	ret = kstrtoint(buf, 0, &val);
159 	if (ret < 0)
160 		return ret;
161 
162 	val = !!val;
163 
164 	ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
165 	if (ret < 0)
166 		return ret;
167 
168 	tpo_td043->vmirror = val;
169 
170 	return count;
171 }
172 
tpo_td043_mode_show(struct device * dev,struct device_attribute * attr,char * buf)173 static ssize_t tpo_td043_mode_show(struct device *dev,
174 	struct device_attribute *attr, char *buf)
175 {
176 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
177 
178 	return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
179 }
180 
tpo_td043_mode_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)181 static ssize_t tpo_td043_mode_store(struct device *dev,
182 	struct device_attribute *attr, const char *buf, size_t count)
183 {
184 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
185 	long val;
186 	int ret;
187 
188 	ret = kstrtol(buf, 0, &val);
189 	if (ret != 0 || val & ~7)
190 		return -EINVAL;
191 
192 	tpo_td043->mode = val;
193 
194 	val |= TPO_R02_NCLK_RISING;
195 	tpo_td043_write(tpo_td043->spi, 2, val);
196 
197 	return count;
198 }
199 
tpo_td043_gamma_show(struct device * dev,struct device_attribute * attr,char * buf)200 static ssize_t tpo_td043_gamma_show(struct device *dev,
201 	struct device_attribute *attr, char *buf)
202 {
203 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
204 	ssize_t len = 0;
205 	int ret;
206 	int i;
207 
208 	for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
209 		ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
210 				tpo_td043->gamma[i]);
211 		if (ret < 0)
212 			return ret;
213 		len += ret;
214 	}
215 	buf[len - 1] = '\n';
216 
217 	return len;
218 }
219 
tpo_td043_gamma_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)220 static ssize_t tpo_td043_gamma_store(struct device *dev,
221 	struct device_attribute *attr, const char *buf, size_t count)
222 {
223 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
224 	unsigned int g[12];
225 	int ret;
226 	int i;
227 
228 	ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
229 			&g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
230 			&g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
231 
232 	if (ret != 12)
233 		return -EINVAL;
234 
235 	for (i = 0; i < 12; i++)
236 		tpo_td043->gamma[i] = g[i];
237 
238 	tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
239 
240 	return count;
241 }
242 
243 static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
244 		tpo_td043_vmirror_show, tpo_td043_vmirror_store);
245 static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
246 		tpo_td043_mode_show, tpo_td043_mode_store);
247 static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
248 		tpo_td043_gamma_show, tpo_td043_gamma_store);
249 
250 static struct attribute *tpo_td043_attrs[] = {
251 	&dev_attr_vmirror.attr,
252 	&dev_attr_mode.attr,
253 	&dev_attr_gamma.attr,
254 	NULL,
255 };
256 
257 static struct attribute_group tpo_td043_attr_group = {
258 	.attrs = tpo_td043_attrs,
259 };
260 
261 static const struct omap_video_timings tpo_td043_timings = {
262 	.x_res		= 800,
263 	.y_res		= 480,
264 
265 	.pixel_clock	= 36000,
266 
267 	.hsw		= 1,
268 	.hfp		= 68,
269 	.hbp		= 214,
270 
271 	.vsw		= 1,
272 	.vfp		= 39,
273 	.vbp		= 34,
274 
275 	.vsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
276 	.hsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
277 	.data_pclk_edge	= OMAPDSS_DRIVE_SIG_FALLING_EDGE,
278 	.de_level	= OMAPDSS_SIG_ACTIVE_HIGH,
279 	.sync_pclk_edge	= OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
280 };
281 
282 static inline struct panel_tpo_td043_data
get_panel_data(const struct omap_dss_device * dssdev)283 *get_panel_data(const struct omap_dss_device *dssdev)
284 {
285 	return (struct panel_tpo_td043_data *) dssdev->data;
286 }
287 
tpo_td043_power_on(struct tpo_td043_device * tpo_td043)288 static int tpo_td043_power_on(struct tpo_td043_device *tpo_td043)
289 {
290 	int r;
291 
292 	if (tpo_td043->powered_on)
293 		return 0;
294 
295 	r = regulator_enable(tpo_td043->vcc_reg);
296 	if (r != 0)
297 		return r;
298 
299 	/* wait for panel to stabilize */
300 	msleep(160);
301 
302 	if (gpio_is_valid(tpo_td043->nreset_gpio))
303 		gpio_set_value(tpo_td043->nreset_gpio, 1);
304 
305 	tpo_td043_write(tpo_td043->spi, 2,
306 			TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
307 	tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
308 	tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
309 	tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
310 	tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
311 			tpo_td043->vmirror);
312 	tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
313 
314 	tpo_td043->powered_on = 1;
315 	return 0;
316 }
317 
tpo_td043_power_off(struct tpo_td043_device * tpo_td043)318 static void tpo_td043_power_off(struct tpo_td043_device *tpo_td043)
319 {
320 	if (!tpo_td043->powered_on)
321 		return;
322 
323 	tpo_td043_write(tpo_td043->spi, 3,
324 			TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
325 
326 	if (gpio_is_valid(tpo_td043->nreset_gpio))
327 		gpio_set_value(tpo_td043->nreset_gpio, 0);
328 
329 	/* wait for at least 2 vsyncs before cutting off power */
330 	msleep(50);
331 
332 	tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
333 
334 	regulator_disable(tpo_td043->vcc_reg);
335 
336 	tpo_td043->powered_on = 0;
337 }
338 
tpo_td043_enable_dss(struct omap_dss_device * dssdev)339 static int tpo_td043_enable_dss(struct omap_dss_device *dssdev)
340 {
341 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
342 	int r;
343 
344 	if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
345 		return 0;
346 
347 	omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings);
348 	omapdss_dpi_set_data_lines(dssdev, dssdev->phy.dpi.data_lines);
349 
350 	r = omapdss_dpi_display_enable(dssdev);
351 	if (r)
352 		goto err0;
353 
354 	/*
355 	 * If we are resuming from system suspend, SPI clocks might not be
356 	 * enabled yet, so we'll program the LCD from SPI PM resume callback.
357 	 */
358 	if (!tpo_td043->spi_suspended) {
359 		r = tpo_td043_power_on(tpo_td043);
360 		if (r)
361 			goto err1;
362 	}
363 
364 	dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
365 
366 	return 0;
367 err1:
368 	omapdss_dpi_display_disable(dssdev);
369 err0:
370 	return r;
371 }
372 
tpo_td043_disable_dss(struct omap_dss_device * dssdev)373 static void tpo_td043_disable_dss(struct omap_dss_device *dssdev)
374 {
375 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
376 
377 	if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
378 		return;
379 
380 	omapdss_dpi_display_disable(dssdev);
381 
382 	if (!tpo_td043->spi_suspended)
383 		tpo_td043_power_off(tpo_td043);
384 }
385 
tpo_td043_enable(struct omap_dss_device * dssdev)386 static int tpo_td043_enable(struct omap_dss_device *dssdev)
387 {
388 	dev_dbg(&dssdev->dev, "enable\n");
389 
390 	return tpo_td043_enable_dss(dssdev);
391 }
392 
tpo_td043_disable(struct omap_dss_device * dssdev)393 static void tpo_td043_disable(struct omap_dss_device *dssdev)
394 {
395 	dev_dbg(&dssdev->dev, "disable\n");
396 
397 	tpo_td043_disable_dss(dssdev);
398 
399 	dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
400 }
401 
tpo_td043_probe(struct omap_dss_device * dssdev)402 static int tpo_td043_probe(struct omap_dss_device *dssdev)
403 {
404 	struct tpo_td043_device *tpo_td043 = g_tpo_td043;
405 	struct panel_tpo_td043_data *pdata = get_panel_data(dssdev);
406 	int ret = 0;
407 
408 	dev_dbg(&dssdev->dev, "probe\n");
409 
410 	if (tpo_td043 == NULL) {
411 		dev_err(&dssdev->dev, "missing tpo_td043_device\n");
412 		return -ENODEV;
413 	}
414 
415 	if (!pdata)
416 		return -EINVAL;
417 
418 	tpo_td043->nreset_gpio = pdata->nreset_gpio;
419 
420 	dssdev->panel.timings = tpo_td043_timings;
421 	dssdev->ctrl.pixel_size = 24;
422 
423 	tpo_td043->mode = TPO_R02_MODE_800x480;
424 	memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
425 
426 	tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
427 	if (IS_ERR(tpo_td043->vcc_reg)) {
428 		dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
429 		ret = PTR_ERR(tpo_td043->vcc_reg);
430 		goto fail_regulator;
431 	}
432 
433 	if (gpio_is_valid(tpo_td043->nreset_gpio)) {
434 		ret = devm_gpio_request_one(&dssdev->dev,
435 				tpo_td043->nreset_gpio, GPIOF_OUT_INIT_LOW,
436 				"lcd reset");
437 		if (ret < 0) {
438 			dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
439 			goto fail_gpio_req;
440 		}
441 	}
442 
443 	ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
444 	if (ret)
445 		dev_warn(&dssdev->dev, "failed to create sysfs files\n");
446 
447 	dev_set_drvdata(&dssdev->dev, tpo_td043);
448 
449 	return 0;
450 
451 fail_gpio_req:
452 	regulator_put(tpo_td043->vcc_reg);
453 fail_regulator:
454 	kfree(tpo_td043);
455 	return ret;
456 }
457 
tpo_td043_remove(struct omap_dss_device * dssdev)458 static void tpo_td043_remove(struct omap_dss_device *dssdev)
459 {
460 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
461 
462 	dev_dbg(&dssdev->dev, "remove\n");
463 
464 	sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
465 	regulator_put(tpo_td043->vcc_reg);
466 }
467 
tpo_td043_set_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)468 static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
469 		struct omap_video_timings *timings)
470 {
471 	omapdss_dpi_set_timings(dssdev, timings);
472 
473 	dssdev->panel.timings = *timings;
474 }
475 
tpo_td043_check_timings(struct omap_dss_device * dssdev,struct omap_video_timings * timings)476 static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
477 		struct omap_video_timings *timings)
478 {
479 	return dpi_check_timings(dssdev, timings);
480 }
481 
482 static struct omap_dss_driver tpo_td043_driver = {
483 	.probe		= tpo_td043_probe,
484 	.remove		= tpo_td043_remove,
485 
486 	.enable		= tpo_td043_enable,
487 	.disable	= tpo_td043_disable,
488 	.set_mirror	= tpo_td043_set_hmirror,
489 	.get_mirror	= tpo_td043_get_hmirror,
490 
491 	.set_timings	= tpo_td043_set_timings,
492 	.check_timings	= tpo_td043_check_timings,
493 
494 	.driver         = {
495 		.name	= "tpo_td043mtea1_panel",
496 		.owner  = THIS_MODULE,
497 	},
498 };
499 
tpo_td043_spi_probe(struct spi_device * spi)500 static int tpo_td043_spi_probe(struct spi_device *spi)
501 {
502 	struct omap_dss_device *dssdev = spi->dev.platform_data;
503 	struct tpo_td043_device *tpo_td043;
504 	int ret;
505 
506 	if (dssdev == NULL) {
507 		dev_err(&spi->dev, "missing dssdev\n");
508 		return -ENODEV;
509 	}
510 
511 	if (g_tpo_td043 != NULL)
512 		return -EBUSY;
513 
514 	spi->bits_per_word = 16;
515 	spi->mode = SPI_MODE_0;
516 
517 	ret = spi_setup(spi);
518 	if (ret < 0) {
519 		dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
520 		return ret;
521 	}
522 
523 	tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
524 	if (tpo_td043 == NULL)
525 		return -ENOMEM;
526 
527 	tpo_td043->spi = spi;
528 	dev_set_drvdata(&spi->dev, tpo_td043);
529 	g_tpo_td043 = tpo_td043;
530 
531 	omap_dss_register_driver(&tpo_td043_driver);
532 
533 	return 0;
534 }
535 
tpo_td043_spi_remove(struct spi_device * spi)536 static int tpo_td043_spi_remove(struct spi_device *spi)
537 {
538 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
539 
540 	omap_dss_unregister_driver(&tpo_td043_driver);
541 	kfree(tpo_td043);
542 	g_tpo_td043 = NULL;
543 
544 	return 0;
545 }
546 
547 #ifdef CONFIG_PM_SLEEP
tpo_td043_spi_suspend(struct device * dev)548 static int tpo_td043_spi_suspend(struct device *dev)
549 {
550 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
551 
552 	dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", tpo_td043);
553 
554 	tpo_td043->power_on_resume = tpo_td043->powered_on;
555 	tpo_td043_power_off(tpo_td043);
556 	tpo_td043->spi_suspended = 1;
557 
558 	return 0;
559 }
560 
tpo_td043_spi_resume(struct device * dev)561 static int tpo_td043_spi_resume(struct device *dev)
562 {
563 	struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
564 	int ret;
565 
566 	dev_dbg(dev, "tpo_td043_spi_resume\n");
567 
568 	if (tpo_td043->power_on_resume) {
569 		ret = tpo_td043_power_on(tpo_td043);
570 		if (ret)
571 			return ret;
572 	}
573 	tpo_td043->spi_suspended = 0;
574 
575 	return 0;
576 }
577 #endif
578 
579 static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
580 	tpo_td043_spi_suspend, tpo_td043_spi_resume);
581 
582 static struct spi_driver tpo_td043_spi_driver = {
583 	.driver = {
584 		.name	= "tpo_td043mtea1_panel_spi",
585 		.owner	= THIS_MODULE,
586 		.pm	= &tpo_td043_spi_pm,
587 	},
588 	.probe	= tpo_td043_spi_probe,
589 	.remove	= tpo_td043_spi_remove,
590 };
591 
592 module_spi_driver(tpo_td043_spi_driver);
593 
594 MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
595 MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
596 MODULE_LICENSE("GPL");
597