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1 /*
2  * Structures and registers for GPIO access in the Nomadik SoC
3  *
4  * Copyright (C) 2008 STMicroelectronics
5  *     Author: Prafulla WADASKAR <prafulla.wadaskar@st.com>
6  * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #ifndef __PLAT_NOMADIK_GPIO
14 #define __PLAT_NOMADIK_GPIO
15 
16 /*
17  * pin configurations are represented by 32-bit integers:
18  *
19  *	bit  0.. 8 - Pin Number (512 Pins Maximum)
20  *	bit  9..10 - Alternate Function Selection
21  *	bit 11..12 - Pull up/down state
22  *	bit     13 - Sleep mode behaviour
23  *	bit     14 - Direction
24  *	bit     15 - Value (if output)
25  *	bit 16..18 - SLPM pull up/down state
26  *	bit 19..20 - SLPM direction
27  *	bit 21..22 - SLPM Value (if output)
28  *	bit 23..25 - PDIS value (if input)
29  *	bit	26 - Gpio mode
30  *	bit	27 - Sleep mode
31  *
32  * to facilitate the definition, the following macros are provided
33  *
34  * PIN_CFG_DEFAULT - default config (0):
35  *		     pull up/down = disabled
36  *		     sleep mode = input/wakeup
37  *		     direction = input
38  *		     value = low
39  *		     SLPM direction = same as normal
40  *		     SLPM pull = same as normal
41  *		     SLPM value = same as normal
42  *
43  * PIN_CFG	   - default config with alternate function
44  */
45 
46 typedef unsigned long pin_cfg_t;
47 
48 #define PIN_NUM_MASK		0x1ff
49 #define PIN_NUM(x)		((x) & PIN_NUM_MASK)
50 
51 #define PIN_ALT_SHIFT		9
52 #define PIN_ALT_MASK		(0x3 << PIN_ALT_SHIFT)
53 #define PIN_ALT(x)		(((x) & PIN_ALT_MASK) >> PIN_ALT_SHIFT)
54 #define PIN_GPIO		(NMK_GPIO_ALT_GPIO << PIN_ALT_SHIFT)
55 #define PIN_ALT_A		(NMK_GPIO_ALT_A << PIN_ALT_SHIFT)
56 #define PIN_ALT_B		(NMK_GPIO_ALT_B << PIN_ALT_SHIFT)
57 #define PIN_ALT_C		(NMK_GPIO_ALT_C << PIN_ALT_SHIFT)
58 
59 #define PIN_PULL_SHIFT		11
60 #define PIN_PULL_MASK		(0x3 << PIN_PULL_SHIFT)
61 #define PIN_PULL(x)		(((x) & PIN_PULL_MASK) >> PIN_PULL_SHIFT)
62 #define PIN_PULL_NONE		(NMK_GPIO_PULL_NONE << PIN_PULL_SHIFT)
63 #define PIN_PULL_UP		(NMK_GPIO_PULL_UP << PIN_PULL_SHIFT)
64 #define PIN_PULL_DOWN		(NMK_GPIO_PULL_DOWN << PIN_PULL_SHIFT)
65 
66 #define PIN_SLPM_SHIFT		13
67 #define PIN_SLPM_MASK		(0x1 << PIN_SLPM_SHIFT)
68 #define PIN_SLPM(x)		(((x) & PIN_SLPM_MASK) >> PIN_SLPM_SHIFT)
69 #define PIN_SLPM_MAKE_INPUT	(NMK_GPIO_SLPM_INPUT << PIN_SLPM_SHIFT)
70 #define PIN_SLPM_NOCHANGE	(NMK_GPIO_SLPM_NOCHANGE << PIN_SLPM_SHIFT)
71 /* These two replace the above in DB8500v2+ */
72 #define PIN_SLPM_WAKEUP_ENABLE	(NMK_GPIO_SLPM_WAKEUP_ENABLE << PIN_SLPM_SHIFT)
73 #define PIN_SLPM_WAKEUP_DISABLE	(NMK_GPIO_SLPM_WAKEUP_DISABLE << PIN_SLPM_SHIFT)
74 #define PIN_SLPM_USE_MUX_SETTINGS_IN_SLEEP PIN_SLPM_WAKEUP_DISABLE
75 
76 #define PIN_SLPM_GPIO  PIN_SLPM_WAKEUP_ENABLE /* In SLPM, pin is a gpio */
77 #define PIN_SLPM_ALTFUNC PIN_SLPM_WAKEUP_DISABLE /* In SLPM, pin is altfunc */
78 
79 #define PIN_DIR_SHIFT		14
80 #define PIN_DIR_MASK		(0x1 << PIN_DIR_SHIFT)
81 #define PIN_DIR(x)		(((x) & PIN_DIR_MASK) >> PIN_DIR_SHIFT)
82 #define PIN_DIR_INPUT		(0 << PIN_DIR_SHIFT)
83 #define PIN_DIR_OUTPUT		(1 << PIN_DIR_SHIFT)
84 
85 #define PIN_VAL_SHIFT		15
86 #define PIN_VAL_MASK		(0x1 << PIN_VAL_SHIFT)
87 #define PIN_VAL(x)		(((x) & PIN_VAL_MASK) >> PIN_VAL_SHIFT)
88 #define PIN_VAL_LOW		(0 << PIN_VAL_SHIFT)
89 #define PIN_VAL_HIGH		(1 << PIN_VAL_SHIFT)
90 
91 #define PIN_SLPM_PULL_SHIFT	16
92 #define PIN_SLPM_PULL_MASK	(0x7 << PIN_SLPM_PULL_SHIFT)
93 #define PIN_SLPM_PULL(x)	\
94 	(((x) & PIN_SLPM_PULL_MASK) >> PIN_SLPM_PULL_SHIFT)
95 #define PIN_SLPM_PULL_NONE	\
96 	((1 + NMK_GPIO_PULL_NONE) << PIN_SLPM_PULL_SHIFT)
97 #define PIN_SLPM_PULL_UP	\
98 	((1 + NMK_GPIO_PULL_UP) << PIN_SLPM_PULL_SHIFT)
99 #define PIN_SLPM_PULL_DOWN	\
100 	((1 + NMK_GPIO_PULL_DOWN) << PIN_SLPM_PULL_SHIFT)
101 
102 #define PIN_SLPM_DIR_SHIFT	19
103 #define PIN_SLPM_DIR_MASK	(0x3 << PIN_SLPM_DIR_SHIFT)
104 #define PIN_SLPM_DIR(x)		\
105 	(((x) & PIN_SLPM_DIR_MASK) >> PIN_SLPM_DIR_SHIFT)
106 #define PIN_SLPM_DIR_INPUT	((1 + 0) << PIN_SLPM_DIR_SHIFT)
107 #define PIN_SLPM_DIR_OUTPUT	((1 + 1) << PIN_SLPM_DIR_SHIFT)
108 
109 #define PIN_SLPM_VAL_SHIFT	21
110 #define PIN_SLPM_VAL_MASK	(0x3 << PIN_SLPM_VAL_SHIFT)
111 #define PIN_SLPM_VAL(x)		\
112 	(((x) & PIN_SLPM_VAL_MASK) >> PIN_SLPM_VAL_SHIFT)
113 #define PIN_SLPM_VAL_LOW	((1 + 0) << PIN_SLPM_VAL_SHIFT)
114 #define PIN_SLPM_VAL_HIGH	((1 + 1) << PIN_SLPM_VAL_SHIFT)
115 
116 #define PIN_SLPM_PDIS_SHIFT		23
117 #define PIN_SLPM_PDIS_MASK		(0x3 << PIN_SLPM_PDIS_SHIFT)
118 #define PIN_SLPM_PDIS(x)	\
119 	(((x) & PIN_SLPM_PDIS_MASK) >> PIN_SLPM_PDIS_SHIFT)
120 #define PIN_SLPM_PDIS_NO_CHANGE		(0 << PIN_SLPM_PDIS_SHIFT)
121 #define PIN_SLPM_PDIS_DISABLED		(1 << PIN_SLPM_PDIS_SHIFT)
122 #define PIN_SLPM_PDIS_ENABLED		(2 << PIN_SLPM_PDIS_SHIFT)
123 
124 #define PIN_LOWEMI_SHIFT	25
125 #define PIN_LOWEMI_MASK		(0x1 << PIN_LOWEMI_SHIFT)
126 #define PIN_LOWEMI(x)		(((x) & PIN_LOWEMI_MASK) >> PIN_LOWEMI_SHIFT)
127 #define PIN_LOWEMI_DISABLED	(0 << PIN_LOWEMI_SHIFT)
128 #define PIN_LOWEMI_ENABLED	(1 << PIN_LOWEMI_SHIFT)
129 
130 #define PIN_GPIOMODE_SHIFT	26
131 #define PIN_GPIOMODE_MASK	(0x1 << PIN_GPIOMODE_SHIFT)
132 #define PIN_GPIOMODE(x)		(((x) & PIN_GPIOMODE_MASK) >> PIN_GPIOMODE_SHIFT)
133 #define PIN_GPIOMODE_DISABLED	(0 << PIN_GPIOMODE_SHIFT)
134 #define PIN_GPIOMODE_ENABLED	(1 << PIN_GPIOMODE_SHIFT)
135 
136 #define PIN_SLEEPMODE_SHIFT	27
137 #define PIN_SLEEPMODE_MASK	(0x1 << PIN_SLEEPMODE_SHIFT)
138 #define PIN_SLEEPMODE(x)	(((x) & PIN_SLEEPMODE_MASK) >> PIN_SLEEPMODE_SHIFT)
139 #define PIN_SLEEPMODE_DISABLED	(0 << PIN_SLEEPMODE_SHIFT)
140 #define PIN_SLEEPMODE_ENABLED	(1 << PIN_SLEEPMODE_SHIFT)
141 
142 
143 /* Shortcuts.  Use these instead of separate DIR, PULL, and VAL.  */
144 #define PIN_INPUT_PULLDOWN	(PIN_DIR_INPUT | PIN_PULL_DOWN)
145 #define PIN_INPUT_PULLUP	(PIN_DIR_INPUT | PIN_PULL_UP)
146 #define PIN_INPUT_NOPULL	(PIN_DIR_INPUT | PIN_PULL_NONE)
147 #define PIN_OUTPUT_LOW		(PIN_DIR_OUTPUT | PIN_VAL_LOW)
148 #define PIN_OUTPUT_HIGH		(PIN_DIR_OUTPUT | PIN_VAL_HIGH)
149 
150 #define PIN_SLPM_INPUT_PULLDOWN	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_DOWN)
151 #define PIN_SLPM_INPUT_PULLUP	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_UP)
152 #define PIN_SLPM_INPUT_NOPULL	(PIN_SLPM_DIR_INPUT | PIN_SLPM_PULL_NONE)
153 #define PIN_SLPM_OUTPUT_LOW	(PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_LOW)
154 #define PIN_SLPM_OUTPUT_HIGH	(PIN_SLPM_DIR_OUTPUT | PIN_SLPM_VAL_HIGH)
155 
156 #define PIN_CFG_DEFAULT		(0)
157 
158 #define PIN_CFG(num, alt)		\
159 	(PIN_CFG_DEFAULT |\
160 	 (PIN_NUM(num) | PIN_##alt))
161 
162 #define PIN_CFG_INPUT(num, alt, pull)		\
163 	(PIN_CFG_DEFAULT |\
164 	 (PIN_NUM(num) | PIN_##alt | PIN_INPUT_##pull))
165 
166 #define PIN_CFG_OUTPUT(num, alt, val)		\
167 	(PIN_CFG_DEFAULT |\
168 	 (PIN_NUM(num) | PIN_##alt | PIN_OUTPUT_##val))
169 
170 /*
171  * "nmk_gpio" and "NMK_GPIO" stand for "Nomadik GPIO", leaving
172  * the "gpio" namespace for generic and cross-machine functions
173  */
174 
175 #define GPIO_BLOCK_SHIFT 5
176 #define NMK_GPIO_PER_CHIP (1 << GPIO_BLOCK_SHIFT)
177 
178 /* Register in the logic block */
179 #define NMK_GPIO_DAT	0x00
180 #define NMK_GPIO_DATS	0x04
181 #define NMK_GPIO_DATC	0x08
182 #define NMK_GPIO_PDIS	0x0c
183 #define NMK_GPIO_DIR	0x10
184 #define NMK_GPIO_DIRS	0x14
185 #define NMK_GPIO_DIRC	0x18
186 #define NMK_GPIO_SLPC	0x1c
187 #define NMK_GPIO_AFSLA	0x20
188 #define NMK_GPIO_AFSLB	0x24
189 #define NMK_GPIO_LOWEMI	0x28
190 
191 #define NMK_GPIO_RIMSC	0x40
192 #define NMK_GPIO_FIMSC	0x44
193 #define NMK_GPIO_IS	0x48
194 #define NMK_GPIO_IC	0x4c
195 #define NMK_GPIO_RWIMSC	0x50
196 #define NMK_GPIO_FWIMSC	0x54
197 #define NMK_GPIO_WKS	0x58
198 /* These appear in DB8540 and later ASICs */
199 #define NMK_GPIO_EDGELEVEL 0x5C
200 #define NMK_GPIO_LEVEL	0x60
201 
202 /* Alternate functions: function C is set in hw by setting both A and B */
203 #define NMK_GPIO_ALT_GPIO	0
204 #define NMK_GPIO_ALT_A	1
205 #define NMK_GPIO_ALT_B	2
206 #define NMK_GPIO_ALT_C	(NMK_GPIO_ALT_A | NMK_GPIO_ALT_B)
207 
208 #define NMK_GPIO_ALT_CX_SHIFT 2
209 #define NMK_GPIO_ALT_C1	((1<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
210 #define NMK_GPIO_ALT_C2	((2<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
211 #define NMK_GPIO_ALT_C3	((3<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
212 #define NMK_GPIO_ALT_C4	((4<<NMK_GPIO_ALT_CX_SHIFT) | NMK_GPIO_ALT_C)
213 
214 /* Pull up/down values */
215 enum nmk_gpio_pull {
216 	NMK_GPIO_PULL_NONE,
217 	NMK_GPIO_PULL_UP,
218 	NMK_GPIO_PULL_DOWN,
219 };
220 
221 /* Sleep mode */
222 enum nmk_gpio_slpm {
223 	NMK_GPIO_SLPM_INPUT,
224 	NMK_GPIO_SLPM_WAKEUP_ENABLE = NMK_GPIO_SLPM_INPUT,
225 	NMK_GPIO_SLPM_NOCHANGE,
226 	NMK_GPIO_SLPM_WAKEUP_DISABLE = NMK_GPIO_SLPM_NOCHANGE,
227 };
228 
229 /* Older deprecated pin config API that should go away soon */
230 extern int nmk_config_pin(pin_cfg_t cfg, bool sleep);
231 extern int nmk_config_pins(pin_cfg_t *cfgs, int num);
232 extern int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num);
233 extern int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode);
234 extern int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull);
235 #ifdef CONFIG_PINCTRL_NOMADIK
236 extern int nmk_gpio_set_mode(int gpio, int gpio_mode);
237 #else
nmk_gpio_set_mode(int gpio,int gpio_mode)238 static inline int nmk_gpio_set_mode(int gpio, int gpio_mode)
239 {
240 	return -ENODEV;
241 }
242 #endif
243 extern int nmk_gpio_get_mode(int gpio);
244 
245 extern void nmk_gpio_wakeups_suspend(void);
246 extern void nmk_gpio_wakeups_resume(void);
247 
248 extern void nmk_gpio_clocks_enable(void);
249 extern void nmk_gpio_clocks_disable(void);
250 
251 extern void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up);
252 
253 /*
254  * Platform data to register a block: only the initial gpio/irq number.
255  */
256 struct nmk_gpio_platform_data {
257 	char *name;
258 	int first_gpio;
259 	int first_irq;
260 	int num_gpio;
261 	u32 (*get_secondary_status)(unsigned int bank);
262 	void (*set_ioforce)(bool enable);
263 	bool supports_sleepmode;
264 };
265 
266 #endif /* __PLAT_NOMADIK_GPIO */
267