1 /********************************************************************* 2 * 3 * msnd_pinnacle.h 4 * 5 * Turtle Beach MultiSound Sound Card Driver for Linux 6 * 7 * Some parts of this header file were derived from the Turtle Beach 8 * MultiSound Driver Development Kit. 9 * 10 * Copyright (C) 1998 Andrew Veliath 11 * Copyright (C) 1993 Turtle Beach Systems, Inc. 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 * 27 ********************************************************************/ 28 #ifndef __MSND_PINNACLE_H 29 #define __MSND_PINNACLE_H 30 31 32 #define DSP_NUMIO 0x08 33 34 #define IREG_LOGDEVICE 0x07 35 #define IREG_ACTIVATE 0x30 36 #define LD_ACTIVATE 0x01 37 #define LD_DISACTIVATE 0x00 38 #define IREG_EECONTROL 0x3F 39 #define IREG_MEMBASEHI 0x40 40 #define IREG_MEMBASELO 0x41 41 #define IREG_MEMCONTROL 0x42 42 #define IREG_MEMRANGEHI 0x43 43 #define IREG_MEMRANGELO 0x44 44 #define MEMTYPE_8BIT 0x00 45 #define MEMTYPE_16BIT 0x02 46 #define MEMTYPE_RANGE 0x00 47 #define MEMTYPE_HIADDR 0x01 48 #define IREG_IO0_BASEHI 0x60 49 #define IREG_IO0_BASELO 0x61 50 #define IREG_IO1_BASEHI 0x62 51 #define IREG_IO1_BASELO 0x63 52 #define IREG_IRQ_NUMBER 0x70 53 #define IREG_IRQ_TYPE 0x71 54 #define IRQTYPE_HIGH 0x02 55 #define IRQTYPE_LOW 0x00 56 #define IRQTYPE_LEVEL 0x01 57 #define IRQTYPE_EDGE 0x00 58 59 #define HP_DSPR 0x04 60 #define HP_BLKS 0x04 61 62 #define HPDSPRESET_OFF 2 63 #define HPDSPRESET_ON 0 64 65 #define HPBLKSEL_0 2 66 #define HPBLKSEL_1 3 67 68 #define HIMT_DAT_OFF 0x03 69 70 #define HIDSP_PLAY_UNDER 0x00 71 #define HIDSP_INT_PLAY_UNDER 0x01 72 #define HIDSP_SSI_TX_UNDER 0x02 73 #define HIDSP_RECQ_OVERFLOW 0x08 74 #define HIDSP_INT_RECORD_OVER 0x09 75 #define HIDSP_SSI_RX_OVERFLOW 0x0a 76 77 #define HIDSP_MIDI_IN_OVER 0x10 78 79 #define HIDSP_MIDI_FRAME_ERR 0x11 80 #define HIDSP_MIDI_PARITY_ERR 0x12 81 #define HIDSP_MIDI_OVERRUN_ERR 0x13 82 83 #define HIDSP_INPUT_CLIPPING 0x20 84 #define HIDSP_MIX_CLIPPING 0x30 85 #define HIDSP_DAT_IN_OFF 0x21 86 87 #define HDEXAR_SET_ANA_IN 0 88 #define HDEXAR_CLEAR_PEAKS 1 89 #define HDEXAR_IN_SET_POTS 2 90 #define HDEXAR_AUX_SET_POTS 3 91 #define HDEXAR_CAL_A_TO_D 4 92 #define HDEXAR_RD_EXT_DSP_BITS 5 93 94 #define HDEXAR_SET_SYNTH_IN 4 95 #define HDEXAR_READ_DAT_IN 5 96 #define HDEXAR_MIC_SET_POTS 6 97 #define HDEXAR_SET_DAT_IN 7 98 99 #define HDEXAR_SET_SYNTH_48 8 100 #define HDEXAR_SET_SYNTH_44 9 101 102 #define TIME_PRO_RESET_DONE 0x028A 103 #define TIME_PRO_SYSEX 0x001E 104 #define TIME_PRO_RESET 0x0032 105 106 #define AGND 0x01 107 #define SIGNAL 0x02 108 109 #define EXT_DSP_BIT_DCAL 0x0001 110 #define EXT_DSP_BIT_MIDI_CON 0x0002 111 112 #define BUFFSIZE 0x8000 113 #define HOSTQ_SIZE 0x40 114 115 #define SRAM_CNTL_START 0x7F00 116 #define SMA_STRUCT_START 0x7F40 117 118 #define DAP_BUFF_SIZE 0x2400 119 #define DAR_BUFF_SIZE 0x2000 120 121 #define DAPQ_STRUCT_SIZE 0x10 122 #define DARQ_STRUCT_SIZE 0x10 123 #define DAPQ_BUFF_SIZE (3 * 0x10) 124 #define DARQ_BUFF_SIZE (3 * 0x10) 125 #define MODQ_BUFF_SIZE 0x400 126 #define MIDQ_BUFF_SIZE 0x800 127 #define DSPQ_BUFF_SIZE 0x5A0 128 129 #define DAPQ_DATA_BUFF 0x6C00 130 #define DARQ_DATA_BUFF 0x6C30 131 #define MODQ_DATA_BUFF 0x6C60 132 #define MIDQ_DATA_BUFF 0x7060 133 #define DSPQ_DATA_BUFF 0x7860 134 135 #define DAPQ_OFFSET SRAM_CNTL_START 136 #define DARQ_OFFSET (SRAM_CNTL_START + 0x08) 137 #define MODQ_OFFSET (SRAM_CNTL_START + 0x10) 138 #define MIDQ_OFFSET (SRAM_CNTL_START + 0x18) 139 #define DSPQ_OFFSET (SRAM_CNTL_START + 0x20) 140 141 #define MOP_WAVEHDR 0 142 #define MOP_EXTOUT 1 143 #define MOP_HWINIT 0xfe 144 #define MOP_NONE 0xff 145 #define MOP_MAX 1 146 147 #define MIP_EXTIN 0 148 #define MIP_WAVEHDR 1 149 #define MIP_HWINIT 0xfe 150 #define MIP_MAX 1 151 152 /* Pinnacle/Fiji SMA Common Data */ 153 #define SMA_wCurrPlayBytes 0x0000 154 #define SMA_wCurrRecordBytes 0x0002 155 #define SMA_wCurrPlayVolLeft 0x0004 156 #define SMA_wCurrPlayVolRight 0x0006 157 #define SMA_wCurrInVolLeft 0x0008 158 #define SMA_wCurrInVolRight 0x000a 159 #define SMA_wCurrMHdrVolLeft 0x000c 160 #define SMA_wCurrMHdrVolRight 0x000e 161 #define SMA_dwCurrPlayPitch 0x0010 162 #define SMA_dwCurrPlayRate 0x0014 163 #define SMA_wCurrMIDIIOPatch 0x0018 164 #define SMA_wCurrPlayFormat 0x001a 165 #define SMA_wCurrPlaySampleSize 0x001c 166 #define SMA_wCurrPlayChannels 0x001e 167 #define SMA_wCurrPlaySampleRate 0x0020 168 #define SMA_wCurrRecordFormat 0x0022 169 #define SMA_wCurrRecordSampleSize 0x0024 170 #define SMA_wCurrRecordChannels 0x0026 171 #define SMA_wCurrRecordSampleRate 0x0028 172 #define SMA_wCurrDSPStatusFlags 0x002a 173 #define SMA_wCurrHostStatusFlags 0x002c 174 #define SMA_wCurrInputTagBits 0x002e 175 #define SMA_wCurrLeftPeak 0x0030 176 #define SMA_wCurrRightPeak 0x0032 177 #define SMA_bMicPotPosLeft 0x0034 178 #define SMA_bMicPotPosRight 0x0035 179 #define SMA_bMicPotMaxLeft 0x0036 180 #define SMA_bMicPotMaxRight 0x0037 181 #define SMA_bInPotPosLeft 0x0038 182 #define SMA_bInPotPosRight 0x0039 183 #define SMA_bAuxPotPosLeft 0x003a 184 #define SMA_bAuxPotPosRight 0x003b 185 #define SMA_bInPotMaxLeft 0x003c 186 #define SMA_bInPotMaxRight 0x003d 187 #define SMA_bAuxPotMaxLeft 0x003e 188 #define SMA_bAuxPotMaxRight 0x003f 189 #define SMA_bInPotMaxMethod 0x0040 190 #define SMA_bAuxPotMaxMethod 0x0041 191 #define SMA_wCurrMastVolLeft 0x0042 192 #define SMA_wCurrMastVolRight 0x0044 193 #define SMA_wCalFreqAtoD 0x0046 194 #define SMA_wCurrAuxVolLeft 0x0048 195 #define SMA_wCurrAuxVolRight 0x004a 196 #define SMA_wCurrPlay1VolLeft 0x004c 197 #define SMA_wCurrPlay1VolRight 0x004e 198 #define SMA_wCurrPlay2VolLeft 0x0050 199 #define SMA_wCurrPlay2VolRight 0x0052 200 #define SMA_wCurrPlay3VolLeft 0x0054 201 #define SMA_wCurrPlay3VolRight 0x0056 202 #define SMA_wCurrPlay4VolLeft 0x0058 203 #define SMA_wCurrPlay4VolRight 0x005a 204 #define SMA_wCurrPlay1PeakLeft 0x005c 205 #define SMA_wCurrPlay1PeakRight 0x005e 206 #define SMA_wCurrPlay2PeakLeft 0x0060 207 #define SMA_wCurrPlay2PeakRight 0x0062 208 #define SMA_wCurrPlay3PeakLeft 0x0064 209 #define SMA_wCurrPlay3PeakRight 0x0066 210 #define SMA_wCurrPlay4PeakLeft 0x0068 211 #define SMA_wCurrPlay4PeakRight 0x006a 212 #define SMA_wCurrPlayPeakLeft 0x006c 213 #define SMA_wCurrPlayPeakRight 0x006e 214 #define SMA_wCurrDATSR 0x0070 215 #define SMA_wCurrDATRXCHNL 0x0072 216 #define SMA_wCurrDATTXCHNL 0x0074 217 #define SMA_wCurrDATRXRate 0x0076 218 #define SMA_dwDSPPlayCount 0x0078 219 #define SMA__size 0x007c 220 221 #ifdef HAVE_DSPCODEH 222 # include "pndsperm.c" 223 # include "pndspini.c" 224 # define PERMCODE pndsperm 225 # define INITCODE pndspini 226 # define PERMCODESIZE sizeof(pndsperm) 227 # define INITCODESIZE sizeof(pndspini) 228 #else 229 # ifndef CONFIG_MSNDPIN_INIT_FILE 230 # define CONFIG_MSNDPIN_INIT_FILE \ 231 "/etc/sound/pndspini.bin" 232 # endif 233 # ifndef CONFIG_MSNDPIN_PERM_FILE 234 # define CONFIG_MSNDPIN_PERM_FILE \ 235 "/etc/sound/pndsperm.bin" 236 # endif 237 # define PERMCODEFILE CONFIG_MSNDPIN_PERM_FILE 238 # define INITCODEFILE CONFIG_MSNDPIN_INIT_FILE 239 # define PERMCODE dspini 240 # define INITCODE permini 241 # define PERMCODESIZE sizeof_dspini 242 # define INITCODESIZE sizeof_permini 243 #endif 244 #define LONGNAME "MultiSound (Pinnacle/Fiji)" 245 246 #endif /* __MSND_PINNACLE_H */ 247