Lines Matching refs:c
73 static inline void cpu_set_fpu_fcsr_mask(struct cpuinfo_mips *c) in cpu_set_fpu_fcsr_mask() argument
77 fcsr = c->fpu_csr31; in cpu_set_fpu_fcsr_mask()
95 c->fpu_msk31 = ~(fcsr0 ^ fcsr1) & ~mask; in cpu_set_fpu_fcsr_mask()
101 static void cpu_set_nofpu_id(struct cpuinfo_mips *c) in cpu_set_nofpu_id() argument
106 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_nofpu_id()
110 if (c->isa_level & (MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2 | in cpu_set_nofpu_id()
113 if (c->options & MIPS_CPU_NAN_2008) in cpu_set_nofpu_id()
115 c->fpu_id = value; in cpu_set_nofpu_id()
124 static void cpu_set_fpu_opts(struct cpuinfo_mips *c) in cpu_set_fpu_opts() argument
126 c->fpu_id = cpu_get_fpu_id(); in cpu_set_fpu_opts()
127 mips_nofpu_msk31 = c->fpu_msk31; in cpu_set_fpu_opts()
129 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1 | in cpu_set_fpu_opts()
132 if (c->fpu_id & MIPS_FPIR_3D) in cpu_set_fpu_opts()
133 c->ases |= MIPS_ASE_MIPS3D; in cpu_set_fpu_opts()
134 if (c->fpu_id & MIPS_FPIR_FREP) in cpu_set_fpu_opts()
135 c->options |= MIPS_CPU_FRE; in cpu_set_fpu_opts()
138 cpu_set_fpu_fcsr_mask(c); in cpu_set_fpu_opts()
139 c->options |= MIPS_CPU_NAN_LEGACY; in cpu_set_fpu_opts()
145 static void cpu_set_nofpu_opts(struct cpuinfo_mips *c) in cpu_set_nofpu_opts() argument
147 c->options &= ~MIPS_CPU_FPU; in cpu_set_nofpu_opts()
148 c->fpu_msk31 = mips_nofpu_msk31; in cpu_set_nofpu_opts()
150 c->options |= MIPS_CPU_NAN_LEGACY; in cpu_set_nofpu_opts()
151 cpu_set_nofpu_id(c); in cpu_set_nofpu_opts()
195 static void set_ftlb_enable(struct cpuinfo_mips *c, int enable);
251 struct cpuinfo_mips *c = ¤t_cpu_data; in check_errata() local
260 if ((c->processor_id & PRID_REV_MASK) <= PRID_REV_34K_V1_0_2) in check_errata()
301 static inline void cpu_probe_vmbits(struct cpuinfo_mips *c) in cpu_probe_vmbits() argument
306 c->vmbits = fls64(read_c0_entryhi() & 0x3fffffffffffe000ULL); in cpu_probe_vmbits()
310 static void set_isa(struct cpuinfo_mips *c, unsigned int isa) in set_isa() argument
314 c->isa_level |= MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M64R2; in set_isa()
316 c->isa_level |= MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M64R1; in set_isa()
318 c->isa_level |= MIPS_CPU_ISA_V; in set_isa()
320 c->isa_level |= MIPS_CPU_ISA_IV; in set_isa()
322 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; in set_isa()
327 c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6; in set_isa()
329 c->isa_level |= MIPS_CPU_ISA_M32R6; in set_isa()
333 c->isa_level |= MIPS_CPU_ISA_M32R2; in set_isa()
335 c->isa_level |= MIPS_CPU_ISA_M32R1; in set_isa()
337 c->isa_level |= MIPS_CPU_ISA_II; in set_isa()
345 static unsigned int calculate_ftlb_probability(struct cpuinfo_mips *c) in calculate_ftlb_probability() argument
348 unsigned int probability = c->tlbsize / c->tlbsizevtlb; in calculate_ftlb_probability()
371 static void set_ftlb_enable(struct cpuinfo_mips *c, int enable) in set_ftlb_enable() argument
376 switch (c->cputype) { in set_ftlb_enable()
386 (calculate_ftlb_probability(c) in set_ftlb_enable()
397 static inline unsigned int decode_config0(struct cpuinfo_mips *c) in decode_config0() argument
409 c->options |= MIPS_CPU_TLB; in decode_config0()
411 c->options |= MIPS_CPU_TLB | MIPS_CPU_FTLB; in decode_config0()
418 set_isa(c, MIPS_CPU_ISA_M32R1); in decode_config0()
421 set_isa(c, MIPS_CPU_ISA_M32R2); in decode_config0()
424 set_isa(c, MIPS_CPU_ISA_M32R6); in decode_config0()
433 set_isa(c, MIPS_CPU_ISA_M64R1); in decode_config0()
436 set_isa(c, MIPS_CPU_ISA_M64R2); in decode_config0()
439 set_isa(c, MIPS_CPU_ISA_M64R6); in decode_config0()
455 static inline unsigned int decode_config1(struct cpuinfo_mips *c) in decode_config1() argument
462 c->ases |= MIPS_ASE_MDMX; in decode_config1()
464 c->options |= MIPS_CPU_WATCH; in decode_config1()
466 c->ases |= MIPS_ASE_MIPS16; in decode_config1()
468 c->options |= MIPS_CPU_EJTAG; in decode_config1()
470 c->options |= MIPS_CPU_FPU; in decode_config1()
471 c->options |= MIPS_CPU_32FPR; in decode_config1()
474 c->tlbsize = ((config1 & MIPS_CONF1_TLBS) >> 25) + 1; in decode_config1()
475 c->tlbsizevtlb = c->tlbsize; in decode_config1()
476 c->tlbsizeftlbsets = 0; in decode_config1()
482 static inline unsigned int decode_config2(struct cpuinfo_mips *c) in decode_config2() argument
489 c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; in decode_config2()
494 static inline unsigned int decode_config3(struct cpuinfo_mips *c) in decode_config3() argument
501 c->ases |= MIPS_ASE_SMARTMIPS; in decode_config3()
502 c->options |= MIPS_CPU_RIXI; in decode_config3()
505 c->options |= MIPS_CPU_RIXI; in decode_config3()
507 c->ases |= MIPS_ASE_DSP; in decode_config3()
509 c->ases |= MIPS_ASE_DSP2P; in decode_config3()
511 c->options |= MIPS_CPU_VINT; in decode_config3()
513 c->options |= MIPS_CPU_VEIC; in decode_config3()
515 c->ases |= MIPS_ASE_MIPSMT; in decode_config3()
517 c->options |= MIPS_CPU_ULRI; in decode_config3()
519 c->options |= MIPS_CPU_MICROMIPS; in decode_config3()
521 c->ases |= MIPS_ASE_VZ; in decode_config3()
523 c->options |= MIPS_CPU_SEGMENTS; in decode_config3()
525 c->ases |= MIPS_ASE_MSA; in decode_config3()
528 c->htw_seq = 0; in decode_config3()
529 c->options |= MIPS_CPU_HTW; in decode_config3()
532 c->options |= MIPS_CPU_CDMM; in decode_config3()
534 c->options |= MIPS_CPU_SP; in decode_config3()
539 static inline unsigned int decode_config4(struct cpuinfo_mips *c) in decode_config4() argument
550 c->options |= MIPS_CPU_TLBINV; in decode_config4()
566 c->tlbsize += (config4 & MIPS_CONF4_MMUSIZEEXT) * 0x40; in decode_config4()
567 c->tlbsizevtlb = c->tlbsize; in decode_config4()
570 c->tlbsizevtlb += in decode_config4()
573 c->tlbsize = c->tlbsizevtlb; in decode_config4()
589 set_ftlb_enable(c, 0); in decode_config4()
592 c->tlbsizeftlbsets = 1 << in decode_config4()
595 c->tlbsizeftlbways = ((config4 & MIPS_CONF4_FTLBWAYS) >> in decode_config4()
597 c->tlbsize += c->tlbsizeftlbways * c->tlbsizeftlbsets; in decode_config4()
603 c->kscratch_mask = (config4 >> 16) & 0xff; in decode_config4()
608 static inline unsigned int decode_config5(struct cpuinfo_mips *c) in decode_config5() argument
617 c->options |= MIPS_CPU_EVA; in decode_config5()
619 c->options |= MIPS_CPU_MAAR; in decode_config5()
621 c->options |= MIPS_CPU_RW_LLB; in decode_config5()
624 c->options |= MIPS_CPU_XPA; in decode_config5()
630 static void decode_configs(struct cpuinfo_mips *c) in decode_configs() argument
635 c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | in decode_configs()
638 c->scache.flags = MIPS_CACHE_NOT_PRESENT; in decode_configs()
641 set_ftlb_enable(c, !mips_ftlb_disabled); in decode_configs()
643 ok = decode_config0(c); /* Read Config registers. */ in decode_configs()
646 ok = decode_config1(c); in decode_configs()
648 ok = decode_config2(c); in decode_configs()
650 ok = decode_config3(c); in decode_configs()
652 ok = decode_config4(c); in decode_configs()
654 ok = decode_config5(c); in decode_configs()
656 mips_probe_watch_registers(c); in decode_configs()
664 c->options |= MIPS_CPU_RIXIEX; in decode_configs()
669 c->core = get_ebase_cpunum(); in decode_configs()
671 c->core >>= fls(core_nvpes()) - 1; in decode_configs()
679 static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_legacy() argument
681 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_legacy()
683 c->cputype = CPU_R2000; in cpu_probe_legacy()
685 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
686 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
689 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
690 c->tlbsize = 64; in cpu_probe_legacy()
693 if ((c->processor_id & PRID_REV_MASK) == PRID_REV_R3000A) { in cpu_probe_legacy()
695 c->cputype = CPU_R3081E; in cpu_probe_legacy()
698 c->cputype = CPU_R3000A; in cpu_probe_legacy()
702 c->cputype = CPU_R3000; in cpu_probe_legacy()
705 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
706 c->options = MIPS_CPU_TLB | MIPS_CPU_3K_CACHE | in cpu_probe_legacy()
709 c->options |= MIPS_CPU_FPU; in cpu_probe_legacy()
710 c->tlbsize = 64; in cpu_probe_legacy()
714 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
716 c->cputype = CPU_R4400PC; in cpu_probe_legacy()
719 c->cputype = CPU_R4000PC; in cpu_probe_legacy()
743 if ((c->processor_id & PRID_REV_MASK) >= in cpu_probe_legacy()
745 c->cputype = mc ? CPU_R4400MC : CPU_R4400SC; in cpu_probe_legacy()
748 c->cputype = mc ? CPU_R4000MC : CPU_R4000SC; in cpu_probe_legacy()
753 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
754 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
755 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
758 c->tlbsize = 48; in cpu_probe_legacy()
761 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
762 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
763 c->options = R4K_OPTS; in cpu_probe_legacy()
764 c->tlbsize = 32; in cpu_probe_legacy()
765 switch (c->processor_id & 0xf0) { in cpu_probe_legacy()
767 c->cputype = CPU_VR4111; in cpu_probe_legacy()
771 c->cputype = CPU_VR4121; in cpu_probe_legacy()
775 if ((c->processor_id & 0xf) < 0x3) { in cpu_probe_legacy()
776 c->cputype = CPU_VR4122; in cpu_probe_legacy()
779 c->cputype = CPU_VR4181A; in cpu_probe_legacy()
784 if ((c->processor_id & 0xf) < 0x4) { in cpu_probe_legacy()
785 c->cputype = CPU_VR4131; in cpu_probe_legacy()
788 c->cputype = CPU_VR4133; in cpu_probe_legacy()
789 c->options |= MIPS_CPU_LLSC; in cpu_probe_legacy()
795 c->cputype = CPU_VR41XX; in cpu_probe_legacy()
801 c->cputype = CPU_R4300; in cpu_probe_legacy()
803 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
804 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
805 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
807 c->tlbsize = 32; in cpu_probe_legacy()
810 c->cputype = CPU_R4600; in cpu_probe_legacy()
812 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
813 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
814 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
816 c->tlbsize = 48; in cpu_probe_legacy()
826 c->cputype = CPU_R4650; in cpu_probe_legacy()
828 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
829 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
830 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_LLSC; in cpu_probe_legacy()
831 c->tlbsize = 48; in cpu_probe_legacy()
835 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
836 c->options = MIPS_CPU_TLB | MIPS_CPU_TX39_CACHE; in cpu_probe_legacy()
838 if ((c->processor_id & 0xf0) == (PRID_REV_TX3927 & 0xf0)) { in cpu_probe_legacy()
839 c->cputype = CPU_TX3927; in cpu_probe_legacy()
841 c->tlbsize = 64; in cpu_probe_legacy()
843 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
845 c->cputype = CPU_TX3912; in cpu_probe_legacy()
847 c->tlbsize = 32; in cpu_probe_legacy()
850 c->cputype = CPU_TX3922; in cpu_probe_legacy()
852 c->tlbsize = 64; in cpu_probe_legacy()
858 c->cputype = CPU_R4700; in cpu_probe_legacy()
860 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
861 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
862 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
864 c->tlbsize = 48; in cpu_probe_legacy()
867 c->cputype = CPU_TX49XX; in cpu_probe_legacy()
869 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
870 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
871 c->options = R4K_OPTS | MIPS_CPU_LLSC; in cpu_probe_legacy()
872 if (!(c->processor_id & 0x08)) in cpu_probe_legacy()
873 c->options |= MIPS_CPU_FPU | MIPS_CPU_32FPR; in cpu_probe_legacy()
874 c->tlbsize = 48; in cpu_probe_legacy()
877 c->cputype = CPU_R5000; in cpu_probe_legacy()
879 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
880 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
882 c->tlbsize = 48; in cpu_probe_legacy()
885 c->cputype = CPU_R5432; in cpu_probe_legacy()
887 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
888 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
890 c->tlbsize = 48; in cpu_probe_legacy()
893 c->cputype = CPU_R5500; in cpu_probe_legacy()
895 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
896 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
898 c->tlbsize = 48; in cpu_probe_legacy()
901 c->cputype = CPU_NEVADA; in cpu_probe_legacy()
903 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
904 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
906 c->tlbsize = 48; in cpu_probe_legacy()
909 c->cputype = CPU_R6000; in cpu_probe_legacy()
911 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
912 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
913 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
915 c->tlbsize = 32; in cpu_probe_legacy()
918 c->cputype = CPU_R6000A; in cpu_probe_legacy()
920 set_isa(c, MIPS_CPU_ISA_II); in cpu_probe_legacy()
921 c->fpu_msk31 |= FPU_CSR_CONDX | FPU_CSR_FS; in cpu_probe_legacy()
922 c->options = MIPS_CPU_TLB | MIPS_CPU_FPU | in cpu_probe_legacy()
924 c->tlbsize = 32; in cpu_probe_legacy()
927 c->cputype = CPU_RM7000; in cpu_probe_legacy()
929 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
930 c->options = R4K_OPTS | MIPS_CPU_FPU | MIPS_CPU_32FPR | in cpu_probe_legacy()
940 c->tlbsize = (read_c0_info() & (1 << 29)) ? 64 : 48; in cpu_probe_legacy()
943 c->cputype = CPU_R8000; in cpu_probe_legacy()
945 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
946 c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX | in cpu_probe_legacy()
949 c->tlbsize = 384; /* has weird TLB: 3-way x 128 */ in cpu_probe_legacy()
952 c->cputype = CPU_R10000; in cpu_probe_legacy()
954 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
955 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
959 c->tlbsize = 64; in cpu_probe_legacy()
962 c->cputype = CPU_R12000; in cpu_probe_legacy()
964 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
965 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
969 c->tlbsize = 64; in cpu_probe_legacy()
972 c->cputype = CPU_R14000; in cpu_probe_legacy()
974 set_isa(c, MIPS_CPU_ISA_IV); in cpu_probe_legacy()
975 c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | in cpu_probe_legacy()
979 c->tlbsize = 64; in cpu_probe_legacy()
982 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
984 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
987 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
988 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
991 c->cputype = CPU_LOONGSON2; in cpu_probe_legacy()
994 set_isa(c, MIPS_CPU_ISA_III); in cpu_probe_legacy()
995 c->fpu_msk31 |= FPU_CSR_CONDX; in cpu_probe_legacy()
998 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
1001 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1005 c->cputype = CPU_LOONGSON3; in cpu_probe_legacy()
1008 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_legacy()
1012 c->options = R4K_OPTS | in cpu_probe_legacy()
1015 c->tlbsize = 64; in cpu_probe_legacy()
1016 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_legacy()
1019 decode_configs(c); in cpu_probe_legacy()
1021 c->cputype = CPU_LOONGSON1; in cpu_probe_legacy()
1023 switch (c->processor_id & PRID_REV_MASK) { in cpu_probe_legacy()
1033 static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_mips() argument
1035 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_mips()
1036 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_mips()
1038 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1039 c->cputype = CPU_QEMU_GENERIC; in cpu_probe_mips()
1043 c->cputype = CPU_4KC; in cpu_probe_mips()
1044 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1049 c->cputype = CPU_4KEC; in cpu_probe_mips()
1050 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1055 c->cputype = CPU_4KSC; in cpu_probe_mips()
1056 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1060 c->cputype = CPU_5KC; in cpu_probe_mips()
1061 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1065 c->cputype = CPU_5KE; in cpu_probe_mips()
1066 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1070 c->cputype = CPU_20KC; in cpu_probe_mips()
1071 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1075 c->cputype = CPU_24K; in cpu_probe_mips()
1076 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1080 c->cputype = CPU_24K; in cpu_probe_mips()
1081 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1085 c->cputype = CPU_25KF; in cpu_probe_mips()
1086 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1090 c->cputype = CPU_34K; in cpu_probe_mips()
1091 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1095 c->cputype = CPU_74K; in cpu_probe_mips()
1096 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1100 c->cputype = CPU_M14KC; in cpu_probe_mips()
1101 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1105 c->cputype = CPU_M14KEC; in cpu_probe_mips()
1106 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1110 c->cputype = CPU_1004K; in cpu_probe_mips()
1111 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1115 c->cputype = CPU_1074K; in cpu_probe_mips()
1116 c->writecombine = _CACHE_UNCACHED; in cpu_probe_mips()
1120 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1124 c->cputype = CPU_INTERAPTIV; in cpu_probe_mips()
1128 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1132 c->cputype = CPU_PROAPTIV; in cpu_probe_mips()
1136 c->cputype = CPU_P5600; in cpu_probe_mips()
1140 c->cputype = CPU_M5150; in cpu_probe_mips()
1145 decode_configs(c); in cpu_probe_mips()
1150 static inline void cpu_probe_alchemy(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_alchemy() argument
1152 decode_configs(c); in cpu_probe_alchemy()
1153 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_alchemy()
1156 c->cputype = CPU_ALCHEMY; in cpu_probe_alchemy()
1157 switch ((c->processor_id >> 24) & 0xff) { in cpu_probe_alchemy()
1172 if ((c->processor_id & PRID_REV_MASK) == 2) in cpu_probe_alchemy()
1186 static inline void cpu_probe_sibyte(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sibyte() argument
1188 decode_configs(c); in cpu_probe_sibyte()
1190 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_sibyte()
1191 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sibyte()
1193 c->cputype = CPU_SB1; in cpu_probe_sibyte()
1196 if ((c->processor_id & PRID_REV_MASK) < 0x02) in cpu_probe_sibyte()
1197 c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); in cpu_probe_sibyte()
1200 c->cputype = CPU_SB1A; in cpu_probe_sibyte()
1206 static inline void cpu_probe_sandcraft(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_sandcraft() argument
1208 decode_configs(c); in cpu_probe_sandcraft()
1209 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_sandcraft()
1211 c->cputype = CPU_SR71000; in cpu_probe_sandcraft()
1213 c->scache.ways = 8; in cpu_probe_sandcraft()
1214 c->tlbsize = 64; in cpu_probe_sandcraft()
1219 static inline void cpu_probe_nxp(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_nxp() argument
1221 decode_configs(c); in cpu_probe_nxp()
1222 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_nxp()
1224 c->cputype = CPU_PR4450; in cpu_probe_nxp()
1226 set_isa(c, MIPS_CPU_ISA_M32R1); in cpu_probe_nxp()
1231 static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_broadcom() argument
1233 decode_configs(c); in cpu_probe_broadcom()
1234 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_broadcom()
1237 c->cputype = CPU_BMIPS32; in cpu_probe_broadcom()
1244 c->cputype = CPU_BMIPS3300; in cpu_probe_broadcom()
1249 int rev = c->processor_id & PRID_REV_MASK; in cpu_probe_broadcom()
1253 c->cputype = CPU_BMIPS4380; in cpu_probe_broadcom()
1257 c->cputype = CPU_BMIPS4350; in cpu_probe_broadcom()
1264 c->cputype = CPU_BMIPS5000; in cpu_probe_broadcom()
1267 c->options |= MIPS_CPU_ULRI; in cpu_probe_broadcom()
1272 static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_cavium() argument
1274 decode_configs(c); in cpu_probe_cavium()
1275 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_cavium()
1279 c->cputype = CPU_CAVIUM_OCTEON; in cpu_probe_cavium()
1286 c->cputype = CPU_CAVIUM_OCTEON_PLUS; in cpu_probe_cavium()
1296 c->cputype = CPU_CAVIUM_OCTEON2; in cpu_probe_cavium()
1302 c->cputype = CPU_CAVIUM_OCTEON3; in cpu_probe_cavium()
1308 c->cputype = CPU_UNKNOWN; in cpu_probe_cavium()
1313 static inline void cpu_probe_ingenic(struct cpuinfo_mips *c, unsigned int cpu) in cpu_probe_ingenic() argument
1315 decode_configs(c); in cpu_probe_ingenic()
1317 c->options &= ~MIPS_CPU_COUNTER; in cpu_probe_ingenic()
1319 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_ingenic()
1321 c->cputype = CPU_JZRISC; in cpu_probe_ingenic()
1322 c->writecombine = _CACHE_UNCACHED_ACCELERATED; in cpu_probe_ingenic()
1331 static inline void cpu_probe_netlogic(struct cpuinfo_mips *c, int cpu) in cpu_probe_netlogic() argument
1333 decode_configs(c); in cpu_probe_netlogic()
1335 if ((c->processor_id & PRID_IMP_MASK) == PRID_IMP_NETLOGIC_AU13XX) { in cpu_probe_netlogic()
1336 c->cputype = CPU_ALCHEMY; in cpu_probe_netlogic()
1342 c->options = (MIPS_CPU_TLB | in cpu_probe_netlogic()
1350 switch (c->processor_id & PRID_IMP_MASK) { in cpu_probe_netlogic()
1354 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1360 c->cputype = CPU_XLP; in cpu_probe_netlogic()
1372 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1389 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1395 c->processor_id); in cpu_probe_netlogic()
1396 c->cputype = CPU_XLR; in cpu_probe_netlogic()
1400 if (c->cputype == CPU_XLP) { in cpu_probe_netlogic()
1401 set_isa(c, MIPS_CPU_ISA_M64R2); in cpu_probe_netlogic()
1402 c->options |= (MIPS_CPU_FPU | MIPS_CPU_ULRI | MIPS_CPU_MCHECK); in cpu_probe_netlogic()
1404 c->tlbsize = ((read_c0_config6() >> 16) & 0xffff) + 1; in cpu_probe_netlogic()
1406 set_isa(c, MIPS_CPU_ISA_M64R1); in cpu_probe_netlogic()
1407 c->tlbsize = ((read_c0_config1() >> 25) & 0x3f) + 1; in cpu_probe_netlogic()
1409 c->kscratch_mask = 0xf; in cpu_probe_netlogic()
1423 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_probe() local
1426 c->processor_id = PRID_IMP_UNKNOWN; in cpu_probe()
1427 c->fpu_id = FPIR_IMP_NONE; in cpu_probe()
1428 c->cputype = CPU_UNKNOWN; in cpu_probe()
1429 c->writecombine = _CACHE_UNCACHED; in cpu_probe()
1431 c->fpu_csr31 = FPU_CSR_RN; in cpu_probe()
1432 c->fpu_msk31 = FPU_CSR_RSVD | FPU_CSR_ABS2008 | FPU_CSR_NAN2008; in cpu_probe()
1434 c->processor_id = read_c0_prid(); in cpu_probe()
1435 switch (c->processor_id & PRID_COMP_MASK) { in cpu_probe()
1437 cpu_probe_legacy(c, cpu); in cpu_probe()
1440 cpu_probe_mips(c, cpu); in cpu_probe()
1443 cpu_probe_alchemy(c, cpu); in cpu_probe()
1446 cpu_probe_sibyte(c, cpu); in cpu_probe()
1449 cpu_probe_broadcom(c, cpu); in cpu_probe()
1452 cpu_probe_sandcraft(c, cpu); in cpu_probe()
1455 cpu_probe_nxp(c, cpu); in cpu_probe()
1458 cpu_probe_cavium(c, cpu); in cpu_probe()
1461 cpu_probe_ingenic(c, cpu); in cpu_probe()
1464 cpu_probe_netlogic(c, cpu); in cpu_probe()
1469 BUG_ON(c->cputype == CPU_UNKNOWN); in cpu_probe()
1476 BUG_ON(current_cpu_type() != c->cputype); in cpu_probe()
1479 c->options &= ~MIPS_CPU_FPU; in cpu_probe()
1482 c->ases &= ~(MIPS_ASE_DSP | MIPS_ASE_DSP2P); in cpu_probe()
1485 c->options &= ~MIPS_CPU_HTW; in cpu_probe()
1490 if (c->options & MIPS_CPU_FPU) in cpu_probe()
1491 cpu_set_fpu_opts(c); in cpu_probe()
1493 cpu_set_nofpu_opts(c); in cpu_probe()
1500 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; in cpu_probe()
1502 c->options |= MIPS_CPU_PCI; in cpu_probe()
1505 c->srsets = 1; in cpu_probe()
1508 c->msa_id = cpu_get_msa_id(); in cpu_probe()
1509 WARN(c->msa_id & MSA_IR_WRPF, in cpu_probe()
1513 cpu_probe_vmbits(c); in cpu_probe()
1523 struct cpuinfo_mips *c = ¤t_cpu_data; in cpu_report() local
1526 smp_processor_id(), c->processor_id, cpu_name_string()); in cpu_report()
1527 if (c->options & MIPS_CPU_FPU) in cpu_report()
1528 printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id); in cpu_report()
1530 pr_info("MSA revision is: %08x\n", c->msa_id); in cpu_report()