151 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_read_shr()
158 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_DATA_REG, val);  in iwl_trans_pcie_write_shr()
159 	iwl_write32(trans, HEEP_CTRL_WRD_PCIEX_CTRL_REG,  in iwl_trans_pcie_write_shr()
841 		iwl_write32(trans, CSR_RESET, 0);  in iwl_pcie_load_given_ucode()
884 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
893 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
894 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR,  in iwl_trans_pcie_start_fw()
898 	iwl_write32(trans, CSR_INT, 0xFFFFFFFF);  in iwl_trans_pcie_start_fw()
902 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
903 	iwl_write32(trans, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);  in iwl_trans_pcie_start_fw()
963 	iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);  in iwl_trans_pcie_stop_device()
1096 	iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);  in iwl_trans_pcie_start_hw()
1283 		iwl_write32(trans, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);  in iwl_trans_pcie_grab_nic_access()
1340 		iwl_write32(trans, HBUS_TARG_MEM_RADDR, addr);  in iwl_trans_pcie_read_mem()
1358 		iwl_write32(trans, HBUS_TARG_MEM_WADDR, addr);  in iwl_trans_pcie_write_mem()
1360 			iwl_write32(trans, HBUS_TARG_MEM_WDAT,  in iwl_trans_pcie_write_mem()