Home
last modified time | relevance | path

Searched defs:post_div (Results 1 – 12 of 12) sorted by relevance

/drivers/gpu/drm/radeon/
Dradeon_clocks.c38 uint32_t fb_div, ref_div, post_div, sclk; in radeon_legacy_get_engine_clock() local
68 uint32_t fb_div, ref_div, post_div, mclk; in radeon_legacy_get_memory_clock() local
348 int *fb_div, int *post_div) in calc_eng_mem_clock()
389 int fb_div, post_div; in radeon_legacy_set_engine_clock() local
Dradeon_display.c896 static void avivo_get_fb_ref_div(unsigned nom, unsigned den, unsigned post_div, in avivo_get_fb_ref_div()
939 unsigned post_div_min, post_div_max, post_div; in radeon_compute_pll_avivo() local
1102 uint32_t post_div; in radeon_compute_pll_legacy() local
Datombios_crtc.c819 u32 post_div, in atombios_crtc_program_pll()
1057 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; in atombios_crtc_set_pll() local
Dradeon_uvd.c874 unsigned post_div = vco_freq / target_freq; in radeon_uvd_calc_upll_post_div() local
Dradeon_legacy_crtc.c756 } *post_div, post_divs[] = { in radeon_set_pll() local
Dradeon_legacy_tv.c869 int post_div; in get_post_div() local
Dradeon_mode.h163 uint32_t post_div; member
532 u32 post_div; member
572 u32 post_div; member
Drs780_dpm.c988 u32 post_div = ((func_cntl & SPLL_SW_HILEN_MASK) >> SPLL_SW_HILEN_SHIFT) + 1 + in rs780_dpm_debugfs_print_current_performance_level() local
/drivers/gpu/drm/nouveau/core/subdev/clock/
Dnvaa.c55 u32 post_div = 0; in read_pll() local
/drivers/media/tuners/
Dtda18271-maps.c1069 u32 *freq, u8 *post_div, u8 *div) in tda18271_lookup_pll_map()
/drivers/video/fbdev/aty/
Dradeon_base.c1418 } *post_div, in radeon_calc_pll_regs() local
Dradeonfb.h232 int post_div; member