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Searched refs:AT91_SDRAMC_LPR (Results 1 – 3 of 3) sorted by relevance

/arch/arm/mach-at91/
Dpm.h94 saved_lpr1 = at91_ramc_read(1, AT91_SDRAMC_LPR); in at91sam9_sdram_standby()
99 saved_lpr0 = at91_ramc_read(0, AT91_SDRAMC_LPR); in at91sam9_sdram_standby()
104 at91_ramc_write(0, AT91_SDRAMC_LPR, lpr0); in at91sam9_sdram_standby()
106 at91_ramc_write(1, AT91_SDRAMC_LPR, lpr1); in at91sam9_sdram_standby()
110 at91_ramc_write(0, AT91_SDRAMC_LPR, saved_lpr0); in at91sam9_sdram_standby()
112 at91_ramc_write(1, AT91_SDRAMC_LPR, saved_lpr1); in at91sam9_sdram_standby()
Dpm_slowclock.S170 ldr tmp1, [sdramc, #AT91_SDRAMC_LPR]
175 str tmp1, [sdramc, #AT91_SDRAMC_LPR]
309 str tmp1, [sdramc, #AT91_SDRAMC_LPR]
/arch/arm/mach-at91/include/mach/
Dat91sam9_sdramc.h60 #define AT91_SDRAMC_LPR 0x10 /* SDRAM Controller Low Power Register */ macro