Searched refs:DMA3_CONFIG (Results 1 – 14 of 14) sorted by relevance
228 #define DMA3_CONFIG 0xFFC00CC8 /* DMA Channel 3 Configuration Register */ macro
222 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)223 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG,val)
265 #define DMA3_CONFIG 0xFFC00CC8 /* DMA Channel 3 Configuration Register */ macro
475 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)476 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
458 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)459 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
241 #define DMA3_CONFIG 0xFFC00CC8 /* DMA Channel 3 Configuration Register … macro
437 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)438 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG,val)
242 #define DMA3_CONFIG 0xFFC00CC8 /* DMA Channel 3 Configuration Register */ macro
568 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)569 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
257 #define DMA3_CONFIG 0xffc00cc8 /* DMA Channel 3 Configuration Register */ macro
400 #define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)401 #define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
1585 #define DMA3_CONFIG 0xFFC41188 /* DMA3 Configuration Register */ macro
442 #define bfin_read_DMA3_CONFIG() bfin_read32(DMA3_CONFIG)443 #define bfin_write_DMA3_CONFIG(val) bfin_write32(DMA3_CONFIG, val)