Searched refs:EBIU_SDRRC (Results 1 – 13 of 13) sorted by relevance
178 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
476 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)477 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val)
212 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
381 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)382 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val)
213 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
364 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)365 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val)
289 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
489 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)490 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val)
189 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
344 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)345 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC,val)
184 #define EBIU_SDRRC 0xFFC00A18 /* SDRAM Refresh Rate Control Register */ macro
478 #define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)479 #define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val)
899 D16(EBIU_SDRRC); in bfin_debug_mmrs_init()