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Searched refs:ID_AA64ISAR0_AES_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dsysreg.h101 #define ID_AA64ISAR0_AES_SHIFT 4 macro
/arch/arm64/kernel/
Dcpufeature.c82 ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, ID_AA64ISAR0_AES_SHIFT, 4, 0),
711 HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_AES_SHIFT, 2, CAP_HWCAP, HWCAP_PMULL),
712 HWCAP_CAP(SYS_ID_AA64ISAR0_EL1, ID_AA64ISAR0_AES_SHIFT, 1, CAP_HWCAP, HWCAP_AES),