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Searched refs:ID_ISAR5_AES_SHIFT (Results 1 – 2 of 2) sorted by relevance

/arch/arm64/include/asm/
Dsysreg.h159 #define ID_ISAR5_AES_SHIFT 4 macro
/arch/arm64/kernel/
Dcpufeature.c195 ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, ID_ISAR5_AES_SHIFT, 4, 0),
719 HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, 2, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_PMULL),
720 HWCAP_CAP(SYS_ID_ISAR5_EL1, ID_ISAR5_AES_SHIFT, 1, CAP_COMPAT_HWCAP2, COMPAT_HWCAP2_AES),