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Searched refs:IMX_CHIP_REVISION_1_1 (Results 1 – 6 of 6) sorted by relevance

/arch/arm/mach-imx/
Dcpu-imx31.c27 { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
28 { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
29 { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
30 { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
Dcpu-imx25.c29 return IMX_CHIP_REVISION_1_1; in mx25_read_cpu_rev()
Danatop.c102 revision = IMX_CHIP_REVISION_1_1; in imx_init_revision_from_anatop()
Dmxc.h43 #define IMX_CHIP_REVISION_1_1 0x11 macro
Dmach-imx6q.c375 if (imx_get_soc_revision() > IMX_CHIP_REVISION_1_1) in imx6q_init_late()
Dclk-imx51-imx53.c368 imx_print_silicon_rev("i.MX50", IMX_CHIP_REVISION_1_1); in mx50_clocks_init()